698312b98e
The occurrences of T6 and T1 have been corrected. T6 now only occurs when a BRK instruction is executing, it is a synonym for when the VEC1 node is logic high. T1 now occurs when node 862 is logic high, which drives the SYNC pin, among other control effects. Formerly, T1 and T6 were displayed only when all the nodes that affect the PLA were inactive. Node 1357's state was used in that case to choose between displaying T1 (1357 high) or T6 (1357 low). That turned out to be incorrect pair of inferences. The result was that T1 was absent when it should have been present (when T+ was present without T0), and T6 was present when it should have been absent (for instructions other than BRK). Among the corrective changes, node 1357 is no longer consulted. Expansion of state display adds V0, SD1, and SD2 indications. The last two are in their own field (an eighth field). V0 is in the seventh field (square bracketed, the same field occupied by T1 and T6). It is a two-character representation of node VEC0 being at logic high. VEC0 high causes VEC1 to be high one cycle later, which is T6. V0 is, like T6, activated only by execution of a BRK instruction. SD1 and SD2 are nodes 440 and 1258 respectively, which lie in the RCL block outside of the timing generation (clock) block. They serve the needs of the RMW (Read-Modify-Write) instructions for their addressing modes that use external memory instead of the accumulator. All of the corrected and new features has increased the total number of displayed states to 24 from 10. Hopefully, this is the ultimate, final, most fully comprehensive clock display possible, but we'll see. |
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| 3rdparty | ||
| chip-6800 | ||
| images | ||
| .gitattributes | ||
| .gitignore | ||
| README | ||
| browsertrouble.html | ||
| chipsim.js | ||
| expert-6800.html | ||
| expert-allinone.js | ||
| expert.css | ||
| expert.html | ||
| expertWires.js | ||
| index.html | ||
| kiosk.css | ||
| kioskWires.js | ||
| macros.js | ||
| memtable.js | ||
| nodenames.js | ||
| segdefs.js | ||
| testprogram.js | ||
| transdefs.js | ||
| wires.js | ||
README
This is the JavaScript simulator from the visual5602.org project: www.visual6502.org/JSSim It includes a general purpose transistor-level simulator, layout browser, and the data from a 6502 revD chip. It also includes a similar simulator for the 6800 chip. Note the various licenses and Copyright associated with each file. Enjoy! - The Visual 6502 Team