259 lines
7.9 KiB
JavaScript
259 lines
7.9 KiB
JavaScript
// chip-specific support functions
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//
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// may override function definitions made previously
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chipname='z80';
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// DMB: Update this
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grChipSize=7000;
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ngnd = nodenames['vss'];
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npwr = nodenames['vcc'];
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nodenamereset = '_reset';
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presetLogLists=[
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['cycle',],
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['ab','db','_m1','_rd','_wr','_mreq','_iorq','pc'],
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['af', 'bc', 'de', 'hl', 'ix', 'iy', 'sp'],
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['State'],
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['_int','_nmi',nodenamereset],
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];
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function setupTransistors(){
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for(i in transdefs){
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var tdef = transdefs[i];
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var name = tdef[0];
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var gate = tdef[1];
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var c1 = tdef[2];
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var c2 = tdef[3];
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var bb = tdef[4];
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if(tdef[6])
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// just ignore all the 'weak' transistors for now
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continue;
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if(c1==ngnd) {c1=c2;c2=ngnd;}
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if(c1==npwr) {c1=c2;c2=npwr;}
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var trans = {name: name, on: false, gate: gate, c1: c1, c2: c2, bb: bb};
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nodes[gate].gates.push(trans);
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nodes[c1].c1c2s.push(trans);
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nodes[c2].c1c2s.push(trans);
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transistors[name] = trans;
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}
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}
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// simulate a single clock phase with no update to graphics or trace
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function halfStep(){
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var clk = isNodeHigh(nodenames['clk']);
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eval(clockTriggers[cycle]);
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if (clk) {setLow('clk'); }
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else {setHigh('clk'); }
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// DMB: It's almost certainly wrong to execute the on both clock edges
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handleBusRead();
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handleBusWrite;
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}
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function goUntilSyncOrWrite(){
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halfStep();
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cycle++;
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while(
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!isNodeHigh(nodenames['clk']) ||
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( isNodeHigh(nodenames['_m1']) && isNodeHigh(nodenames['_wr']) )
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) {
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halfStep();
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cycle++;
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}
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chipStatus();
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}
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function initChip(){
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var start = now();
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for(var nn in nodes) {
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nodes[nn].state = false;
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nodes[nn].float = true;
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}
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nodes[ngnd].state = false;
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nodes[ngnd].float = false;
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nodes[npwr].state = true;
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nodes[npwr].float = false;
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for(var tn in transistors) transistors[tn].on = false;
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setLow(nodenamereset);
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setLow('clk');
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setHigh('_busrq');
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setHigh('_int');
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setHigh('_nmi');
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setHigh('_wait');
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recalcNodeList(allNodes());
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// DMB: Not sure why the 6800 sim did something like this
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//for(var i=0;i<8;i++){
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// setHigh('clk');
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// setLow('clk');
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//}
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for(var i=0;i<31;i++){halfStep();} // avoid updating graphics and trace buffer before user code
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setHigh(nodenamereset);
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refresh();
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cycle = 0;
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trace = Array();
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if(typeof expertMode != "undefined")
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updateLogList();
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chipStatus();
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if(ctrace)console.log('initChip done after', now()-start);
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}
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function handleBusRead(){
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if(!isNodeHigh(nodenames['_rd'])){
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var a = readAddressBus();
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var d = eval(readTriggers[a]);
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if(d == undefined)
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d = mRead(readAddressBus());
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if(!isNodeHigh(nodenames['_m1']))
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eval(fetchTriggers[d]);
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writeDataBus(d);
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}
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}
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function handleBusWrite(){
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if(!isNodeHigh(nodenames['_wr'])){
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var a = readAddressBus();
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var d = readDataBus();
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eval(writeTriggers[a]);
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mWrite(a,d);
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if(a<0x200) setCellValue(a,d);
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}
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}
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function readA(){return 0xFF ^ readBits('reg_a', 8);}
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function readF(){return 0xFF ^ readBits('reg_f', 8);}
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function readB(){return 0xFF ^ readBits('reg_b', 8);}
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function readC(){return 0xFF ^ readBits('reg_c', 8);}
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function readD(){return 0xFF ^ readBits('reg_d', 8);}
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function readE(){return 0xFF ^ readBits('reg_e', 8);}
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function readH(){return 0xFF ^ readBits('reg_h', 8);}
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function readL(){return 0xFF ^ readBits('reg_l', 8);}
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function readIX(){return 0xFFFF ^ ((readBits('reg_ixh', 8)<<8) + readBits('reg_ixl', 8));}
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function readIY(){return 0xFFFF ^ ((readBits('reg_iyh', 8)<<8) + readBits('reg_iyl', 8));}
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function readSP(){return 0xFFFF ^ ((readBits('reg_sph', 8)<<8) + readBits('reg_spl', 8));}
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function readPC(){return 0xFFFF ^ ((readBits('reg_pch', 8)<<8) + readBits('reg_pcl', 8));}
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function readPCL(){return 0xFF ^ readBits('reg_pcl', 8);}
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function readPCH(){return 0xFF ^ readBits('reg_pch', 8);}
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// The 6800 state control is something like a branching shift register
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// ... but not quite like that
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TCStates=[
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"m1", "m2", "m3", "m4", "m5",
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"t1", "t2", "t3", "t4", "t5", "t6",
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];
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function listActiveTCStates() {
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var s=[];
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for(var i=0;i<TCStates.length;i++){
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var t=TCStates[i];
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if (isNodeHigh(nodenames[t])) s.push(t.slice(0,3));
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}
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return s.join(" ");
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}
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function busToHexInv(busname){
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var value=busToHex(busname)
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if (typeof value != "undefined")
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return value.replace(/./g,function(x){return (15-parseInt(x,16)).toString(16)});
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else
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return undefined;;
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}
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function busToString(busname){
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// takes a signal name or prefix
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// returns an appropriate string representation
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// some 'signal names' are CPU-specific aliases to user-friendly string output
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if(busname=='cycle')
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return cycle>>1;
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if(busname=='af')
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return busToHexInv('reg_a') + busToHexInv('reg_f');
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if(busname=='bc')
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return busToHexInv('reg_b') + busToHexInv('reg_c');
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if(busname=='de')
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return busToHexInv('reg_d') + busToHexInv('reg_e');
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if(busname=='hl')
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return busToHexInv('reg_h') + busToHexInv('reg_l');
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if(busname=='pc')
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return busToHexInv('reg_pch') + busToHexInv('reg_pcl');
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if(busname=='sp')
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return busToHexInv('reg_sph') + busToHexInv('reg_spl');
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if(busname=='ix')
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return busToHexInv('reg_ixh') + busToHexInv('reg_ixl');
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if(busname=='iy')
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return busToHexInv('reg_iyh') + busToHexInv('reg_iyl');
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if(busname=='State')
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return listActiveTCStates();
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// DMB: TODO
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// if(busname=='Execute')
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// return disassemblytoHTML(readBits('ir',8));
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// if(busname=='Fetch')
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// return !isNodeHigh(nodenames['_m1'])?disassemblytoHTML(readDataBus()):"";
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// if(busname=='plaOutputs')
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// // PLA outputs are mostly ^op- but some have a prefix too
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// // - we'll allow the x and xx prefix but ignore the #
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// return listActiveSignals('^([x]?x-)?op-');
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// if(busname=='DPControl')
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// return listActiveSignals('^dpc[0-9]+_');
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if(busname[0]=="-"){
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// invert the value of the bus for display
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var value=busToHex(busname.slice(1))
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if(typeof value != "undefined")
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return value.replace(/./g,function(x){return (15-parseInt(x,16)).toString(16)});
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else
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return undefined;;
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} else {
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return busToHex(busname);
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}
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}
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function chipStatus(){
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var ab = readAddressBus();
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var machine1 =
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' halfcyc:' + cycle +
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' clk:' + readBit('clk') +
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' AB:' + hexWord(ab) +
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' D:' + hexByte(readDataBus()) +
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' M1:' + readBit('_m1') +
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' RD:' + readBit('_rd') +
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' WR:' + readBit('_wr') +
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' MREQ:' + readBit('_mreq') +
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' IORQ:' + readBit('_iorq');
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var machine2 =
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' PC:' + hexWord(readPC()) +
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' A:' + hexByte(readA()) +
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' F:' + hexByte(readF()) +
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' B:' + hexByte(readB()) +
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' C:' + hexByte(readC()) +
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' D:' + hexByte(readD()) +
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' E:' + hexByte(readE()) +
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' H:' + hexByte(readH()) +
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' L:' + hexByte(readL()) +
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' IX:' + hexWord(readIX()) +
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' IY:' + hexWord(readIY()) +
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' SP:' + hexWord(readSP());
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var machine3 =
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'State: ' + busToString('State') +
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'Hz: ' + estimatedHz().toFixed(1);
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if(typeof expertMode != "undefined") {
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machine3 += ' Exec: ' + busToString('Execute'); // no T-state info for 6800 yet
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if(!isNodeHigh(nodenames['_m1']))
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machine3 += ' (Fetch: ' + busToString('Fetch') + ')';
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if(goldenChecksum != undefined)
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machine3 += " Chk:" + traceChecksum + ((traceChecksum==goldenChecksum)?" OK":" no match");
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}
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setStatus(machine1, machine2, machine3);
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if (logThese.length>1) {
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updateLogbox(logThese);
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}
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selectCell(ab);
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}
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// DMB: TODO
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var disassembly={
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0x00: "nop",
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};
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