    Setting log file to 'C:/Dev/Apple1Display/impl1/hdla_gen_hierarchy.html'.
    Starting: parse design source files
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/standard.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/standard.vhd(9,9-9,17) (VHDL-1014) analyzing package standard
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/std_1164.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/std_1164.vhd(15,9-15,23) (VHDL-1014) analyzing package std_logic_1164
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/std_1164.vhd(178,14-178,28) (VHDL-1013) analyzing package body std_logic_1164
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/mgc_qsim.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/mgc_qsim.vhd(18,9-18,19) (VHDL-1014) analyzing package qsim_logic
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/mgc_qsim.vhd(753,14-753,24) (VHDL-1013) analyzing package body qsim_logic
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/numeric_bit.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/numeric_bit.vhd(54,9-54,20) (VHDL-1014) analyzing package numeric_bit
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/numeric_bit.vhd(834,14-834,25) (VHDL-1013) analyzing package body numeric_bit
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/numeric_std.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/numeric_std.vhd(57,9-57,20) (VHDL-1014) analyzing package numeric_std
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/numeric_std.vhd(874,14-874,25) (VHDL-1013) analyzing package body numeric_std
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/textio.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/textio.vhd(13,9-13,15) (VHDL-1014) analyzing package textio
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/textio.vhd(114,14-114,20) (VHDL-1013) analyzing package body textio
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/std_logic_textio.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/std_logic_textio.vhd(26,9-26,25) (VHDL-1014) analyzing package std_logic_textio
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/std_logic_textio.vhd(72,14-72,30) (VHDL-1013) analyzing package body std_logic_textio
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_attr.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_attr.vhd(39,9-39,19) (VHDL-1014) analyzing package attributes
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_misc.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_misc.vhd(30,9-30,23) (VHDL-1014) analyzing package std_logic_misc
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_misc.vhd(182,14-182,28) (VHDL-1013) analyzing package body std_logic_misc
    INFO - ./.__tmp_vxr_0_(56,9-56,18) (VHDL-1014) analyzing package math_real
    INFO - ./.__tmp_vxr_0_(685,14-685,23) (VHDL-1013) analyzing package body math_real
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/mixed_lang_vltype.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/mixed_lang_vltype.vhd(9,9-9,17) (VHDL-1014) analyzing package vl_types
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/mixed_lang_vltype.vhd(88,14-88,22) (VHDL-1013) analyzing package body vl_types
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_arit.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_arit.vhd(25,9-25,24) (VHDL-1014) analyzing package std_logic_arith
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_arit.vhd(206,14-206,29) (VHDL-1013) analyzing package body std_logic_arith
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_sign.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_sign.vhd(35,9-35,25) (VHDL-1014) analyzing package std_logic_signed
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_sign.vhd(96,14-96,30) (VHDL-1013) analyzing package body std_logic_signed
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_unsi.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_unsi.vhd(35,9-35,27) (VHDL-1014) analyzing package std_logic_unsigned
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/syn_unsi.vhd(94,14-94,32) (VHDL-1013) analyzing package body std_logic_unsigned
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/synattr.vhd
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/vhdl_packages/synattr.vhd(50,9-50,19) (VHDL-1014) analyzing package attributes
    (VERI-1482) Analyzing Verilog file C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v
    (VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.vhd
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/impl1/master_clk.vhd
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(14,8-14,18) (VHDL-1012) analyzing entity master_clk
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(21,14-21,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm74175.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm74175.vhd(8,8-8,15) (VHDL-1012) analyzing entity dm74175
    INFO - C:/Dev/Apple1Display/ttl/dm74175.vhd(23,14-23,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm74161.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(6,8-6,15) (VHDL-1012) analyzing entity dm74161
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(17,14-17,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm74160.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm74160.vhd(6,8-6,15) (VHDL-1012) analyzing entity dm74160
    INFO - C:/Dev/Apple1Display/ttl/dm74160.vhd(17,14-17,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/sig2513.vhd
    INFO - C:/Dev/Apple1Display/sig2513.vhd(14,8-14,15) (VHDL-1012) analyzing entity sig2513
    INFO - C:/Dev/Apple1Display/sig2513.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm74166.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm74166.vhd(6,8-6,15) (VHDL-1012) analyzing entity dm74166
    INFO - C:/Dev/Apple1Display/ttl/dm74166.vhd(17,14-17,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7402.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7402.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7402
    INFO - C:/Dev/Apple1Display/ttl/dm7402.vhd(15,14-15,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7404.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7404.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7404
    INFO - C:/Dev/Apple1Display/ttl/dm7404.vhd(15,14-15,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7400.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7400.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7400
    INFO - C:/Dev/Apple1Display/ttl/dm7400.vhd(15,14-15,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ShiftReg40.vhd
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(14,8-14,18) (VHDL-1012) analyzing entity shiftreg40
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/2519.vhd
    INFO - C:/Dev/Apple1Display/ttl/2519.vhd(8,8-8,15) (VHDL-1012) analyzing entity ttl2519
    INFO - C:/Dev/Apple1Display/ttl/2519.vhd(19,14-19,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/sig2504.vhd
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1012) analyzing entity sig2504
    INFO - C:/Dev/Apple1Display/sig2504.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm74157.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm74157.vhd(6,8-6,15) (VHDL-1012) analyzing entity dm74157
    INFO - C:/Dev/Apple1Display/ttl/dm74157.vhd(18,14-18,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm74174.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm74174.vhd(8,8-8,15) (VHDL-1012) analyzing entity dm74174
    INFO - C:/Dev/Apple1Display/ttl/dm74174.vhd(28,14-28,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/ne555.vhd
    INFO - C:/Dev/Apple1Display/ttl/ne555.vhd(7,8-7,13) (VHDL-1012) analyzing entity ne555
    INFO - C:/Dev/Apple1Display/ttl/ne555.vhd(16,14-16,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7427.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7427.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7427
    INFO - C:/Dev/Apple1Display/ttl/dm7427.vhd(17,14-17,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7410.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7410.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7410
    INFO - C:/Dev/Apple1Display/ttl/dm7410.vhd(17,14-17,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7450.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7450.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7450
    INFO - C:/Dev/Apple1Display/ttl/dm7450.vhd(18,14-18,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7408.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7408.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7408
    INFO - C:/Dev/Apple1Display/ttl/dm7408.vhd(15,14-15,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm7432.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm7432.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm7432
    INFO - C:/Dev/Apple1Display/ttl/dm7432.vhd(15,14-15,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/impl1/Apple1Display.vhd
    INFO - C:/Dev/Apple1Display/impl1/Apple1Display.vhd(7,8-7,21) (VHDL-1012) analyzing entity apple1display
    INFO - C:/Dev/Apple1Display/impl1/Apple1Display.vhd(21,14-21,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/UART_RX.vhd
    INFO - C:/Dev/Apple1Display/UART_RX.vhd(18,8-18,15) (VHDL-1012) analyzing entity uart_rx
    INFO - C:/Dev/Apple1Display/UART_RX.vhd(31,14-31,17) (VHDL-1010) analyzing architecture rtl
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/impl1/source/FleaFPGA_Uno_Top.vhd
    INFO - C:/Dev/Apple1Display/impl1/source/FleaFPGA_Uno_Top.vhd(17,8-17,23) (VHDL-1012) analyzing entity fleafpga_uno_e1
    INFO - C:/Dev/Apple1Display/impl1/source/FleaFPGA_Uno_Top.vhd(89,14-89,18) (VHDL-1010) analyzing architecture arch
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/impl1/source/ntsc.vhd
    INFO - C:/Dev/Apple1Display/impl1/source/ntsc.vhd(24,8-24,12) (VHDL-1012) analyzing entity ntsc
    INFO - C:/Dev/Apple1Display/impl1/source/ntsc.vhd(33,14-33,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/impl1/divider.vhd
    INFO - C:/Dev/Apple1Display/impl1/divider.vhd(5,8-5,15) (VHDL-1012) analyzing entity divider
    INFO - C:/Dev/Apple1Display/impl1/divider.vhd(14,14-14,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/2504.vhd
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ttl/dm2513.vhd
    INFO - C:/Dev/Apple1Display/ttl/dm2513.vhd(6,8-6,14) (VHDL-1012) analyzing entity dm2513
    INFO - C:/Dev/Apple1Display/ttl/dm2513.vhd(15,14-15,22) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/CharacterRom.vhd
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(14,8-14,20) (VHDL-1012) analyzing entity characterrom
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ScreenRom.vhd
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(14,8-14,17) (VHDL-1012) analyzing entity screenrom
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/test_entity.vhd
    INFO - C:/Dev/Apple1Display/test_entity.vhd(6,8-6,19) (VHDL-1012) analyzing entity test_entity
    INFO - C:/Dev/Apple1Display/test_entity.vhd(16,15-16,23) (VHDL-1010) analyzing architecture behavior
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ShiftReg1024.vhd
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(14,8-14,20) (VHDL-1012) analyzing entity shiftreg1024
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ScreenRom2.vhd
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(14,8-14,18) (VHDL-1012) analyzing entity screenrom2
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/ScreenRam.vhd
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(14,8-14,17) (VHDL-1012) analyzing entity screenram
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    (VHDL-1481) Analyzing VHDL file C:/Dev/Apple1Display/CursorRam.vhd
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(14,8-14,17) (VHDL-1012) analyzing entity cursorram
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(23,14-23,23) (VHDL-1010) analyzing architecture structure
    INFO - C:/Dev/Apple1Display/impl1/source/FleaFPGA_Uno_Top.vhd(17,8-17,23) (VHDL-1067) elaborating FleaFPGA_Uno_E1(arch)
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(14,8-14,18) (VHDL-1067) elaborating master_clk_uniq_0(Structure)
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(106,5-107,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_1'
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(106,5-107,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(109,5-145,45) (VHDL-1399) going to verilog side to elaborate module EHXPLLJ
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1730,8-1730,15) (VERI-1018) compiling module EHXPLLJ_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1730,1-1786,10) (VERI-9000) elaborating module 'EHXPLLJ_uniq_1'
    INFO - C:/Dev/Apple1Display/impl1/master_clk.vhd(109,5-145,45) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/impl1/Apple1Display.vhd(7,8-7,21) (VHDL-1067) elaborating apple1display_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74175.vhd(8,8-8,15) (VHDL-1067) elaborating dm74175_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(6,8-6,15) (VHDL-1067) elaborating dm74161_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74160.vhd(6,8-6,15) (VHDL-1067) elaborating dm74160_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(6,8-6,15) (VHDL-1067) elaborating dm74161_uniq_1(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(6,8-6,15) (VHDL-1067) elaborating dm74161_uniq_2(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(6,8-6,15) (VHDL-1067) elaborating dm74161_uniq_3(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74161.vhd(6,8-6,15) (VHDL-1067) elaborating dm74161_uniq_4(behavior)
    INFO - C:/Dev/Apple1Display/sig2513.vhd(14,8-14,15) (VHDL-1067) elaborating sig2513_uniq_0(Structure)
    INFO - C:/Dev/Apple1Display/sig2513.vhd(106,5-107,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_1'
    INFO - C:/Dev/Apple1Display/sig2513.vhd(106,5-107,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2513.vhd(109,5-110,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_2'
    INFO - C:/Dev/Apple1Display/sig2513.vhd(109,5-110,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2513.vhd(112,5-173,37) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_1'
    INFO - C:/Dev/Apple1Display/sig2513.vhd(112,5-173,37) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ttl/dm74166.vhd(6,8-6,15) (VHDL-1067) elaborating dm74166_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7402.vhd(6,8-6,14) (VHDL-1067) elaborating dm7402_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7404.vhd(6,8-6,14) (VHDL-1067) elaborating dm7404_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7400.vhd(6,8-6,14) (VHDL-1067) elaborating dm7400_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/2519.vhd(8,8-8,15) (VHDL-1067) elaborating ttl2519_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(14,8-14,18) (VHDL-1067) elaborating ShiftReg40_uniq_0(Structure)
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(160,5-161,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_1'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(160,5-161,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(163,5-164,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_2'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(163,5-164,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(166,5-167,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_3'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(166,5-167,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(169,5-173,33) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_1'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(169,5-173,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(175,5-178,63) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_2'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(175,5-178,63) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(180,5-181,57) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_1'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(180,5-181,57) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(183,5-184,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_4'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(183,5-184,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(186,5-247,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_2'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(186,5-247,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(249,5-251,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_1'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(249,5-251,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(253,5-255,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_2'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(253,5-255,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(257,5-259,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_3'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(257,5-259,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(261,5-263,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_4'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(261,5-263,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(265,5-267,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_5'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(265,5-267,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(269,5-271,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_6'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(269,5-271,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(273,5-274,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_3'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(273,5-274,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(276,5-277,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_2'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(276,5-277,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(279,5-282,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_1'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(279,5-282,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(284,5-287,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_1
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_1'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(284,5-287,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(289,5-291,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_2'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(289,5-291,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(293,5-295,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_3'
    INFO - C:/Dev/Apple1Display/ShiftReg40.vhd(293,5-295,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_0(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_3'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_2'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_3'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_10'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_11'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_12'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_13'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_14'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_15'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_16
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_16'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_3'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_2'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_1(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_10'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_3'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_17
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_17'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_18
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_18'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_19
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_19'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_20
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_20'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_21
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_21'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_22
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_22'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_23
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_23'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_24
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_24'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_25
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_25'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_26
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_26'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_3
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_3'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_10'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_11'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_12'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_13'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_2(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_11'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_12'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_13'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_14'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_10'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_27
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_27'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_28
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_28'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_29
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_29'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_30
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_30'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_31
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_31'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_32
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_32'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_33
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_33'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_34
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_34'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_35
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_35'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_36
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_36'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_4
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_4'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_14'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_15'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_16
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_16'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_17
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_17'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_18
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_18'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_3(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_11'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_15'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_16
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_16'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_17
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_17'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_18
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_18'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_12'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_37
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_37'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_38
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_38'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_39
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_39'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_40
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_40'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_41
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_41'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_42
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_42'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_43
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_43'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_44
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_44'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_45
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_45'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_46
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_46'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_5
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_5'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_19
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_19'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_20
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_20'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_21
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_21'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_22
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_22'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_23
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_23'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_4(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_13'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_19
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_19'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_20
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_20'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_21
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_21'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_22
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_22'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_14'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_47
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_47'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_48
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_48'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_49
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_49'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_50
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_50'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_51
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_51'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_52
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_52'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_53
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_53'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_54
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_54'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_55
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_55'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_56
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_56'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_6
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_6'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_24
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_24'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_25
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_25'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_26
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_26'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_27
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_27'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_28
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_28'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_5(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_15'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_23
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_23'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_24
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_24'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_25
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_25'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_26
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_26'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_16
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_16'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_57
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_57'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_58
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_58'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_59
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_59'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_60
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_60'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_61
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_61'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_62
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_62'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_63
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_63'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_64
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_64'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_65
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_65'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_66
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_66'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_7
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_7'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_29
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_29'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_30
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_30'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_31
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_31'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_32
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_32'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_33
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_33'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(14,8-14,15) (VHDL-1067) elaborating sig2504_uniq_6(Structure)
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_17
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_17'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_27
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_27'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_28
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_28'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_29
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_29'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_30
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_30'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_18
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_18'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_67
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_67'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_68
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_68'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_69
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_69'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_70
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_70'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_71
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_71'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_72
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_72'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_73
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_73'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_74
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_74'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_75
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_75'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_76
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_76'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_10'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_9'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_8
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_8'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_34
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_34'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_35
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_35'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_36
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_36'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_37
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_37'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_38
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_38'
    INFO - C:/Dev/Apple1Display/sig2504.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ttl/dm74157.vhd(6,8-6,15) (VHDL-1067) elaborating dm74157_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74157.vhd(6,8-6,15) (VHDL-1067) elaborating dm74157_uniq_1(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm74174.vhd(8,8-8,15) (VHDL-1067) elaborating dm74174_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/ne555.vhd(7,8-7,13) (VHDL-1067) elaborating ne555_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7427.vhd(6,8-6,14) (VHDL-1067) elaborating dm7427_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7410.vhd(6,8-6,14) (VHDL-1067) elaborating dm7410_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7450.vhd(6,8-6,14) (VHDL-1067) elaborating dm7450_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7408.vhd(6,8-6,14) (VHDL-1067) elaborating dm7408_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7432.vhd(6,8-6,14) (VHDL-1067) elaborating dm7432_uniq_0(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7410.vhd(6,8-6,14) (VHDL-1067) elaborating dm7410_uniq_1(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm7400.vhd(6,8-6,14) (VHDL-1067) elaborating dm7400_uniq_1(behavior)
    INFO - C:/Dev/Apple1Display/UART_RX.vhd(18,8-18,15) (VHDL-1067) elaborating UART_RX_uniq_0(rtl)
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1730,1-1786,10) (VERI-9000) elaborating module 'EHXPLLJ_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_12'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_14'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_16'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_17'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_18'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_19'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_20'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_21'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_22'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_23'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_24'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_25'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_26'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_12'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_12'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_14'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_27'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_28'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_29'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_30'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_31'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_32'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_33'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_34'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_35'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_36'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_14'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_16'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_17'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_18'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_16'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_17'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_18'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_12'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_37'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_38'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_39'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_40'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_41'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_42'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_43'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_44'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_45'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_46'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_19'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_20'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_21'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_22'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_23'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_19'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_20'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_21'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_22'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_14'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_47'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_48'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_49'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_50'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_51'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_52'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_53'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_54'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_55'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_56'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_24'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_25'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_26'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_27'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_28'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_23'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_24'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_25'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_26'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_16'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_57'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_58'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_59'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_60'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_61'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_62'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_63'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_64'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_65'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_66'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_7'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_29'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_30'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_31'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_32'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_33'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_17'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_27'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_28'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_29'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_30'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_18'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_67'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_68'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_69'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_70'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_71'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_72'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_73'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_74'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_75'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_76'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_8'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_34'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_35'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_36'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_37'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_38'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_4'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_5'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_6'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_3'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_1'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_2'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_3'
    INFO - C:/Dev/Apple1Display/impl1/source/ntsc.vhd(24,8-24,12) (VHDL-1067) elaborating ntsc(behavior)
    INFO - C:/Dev/Apple1Display/impl1/divider.vhd(5,8-5,15) (VHDL-1067) elaborating divider(behavior)
    INFO - C:/Dev/Apple1Display/ttl/dm2513.vhd(6,8-6,14) (VHDL-1067) elaborating dm2513(behavior)
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(14,8-14,20) (VHDL-1067) elaborating CharacterRom(Structure)
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(106,5-107,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_10'
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(106,5-107,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(109,5-110,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_11'
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(109,5-110,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(112,5-173,37) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_10'
    INFO - C:/Dev/Apple1Display/CharacterRom.vhd(112,5-173,37) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_10'
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(14,8-14,17) (VHDL-1067) elaborating ScreenRom(Structure)
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(108,5-169,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_11'
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(108,5-169,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(171,5-172,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_11'
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(171,5-172,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(174,5-175,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_12'
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(174,5-175,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(177,5-238,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_12'
    INFO - C:/Dev/Apple1Display/ScreenRom.vhd(177,5-238,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_12'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_12'
    INFO - C:/Dev/Apple1Display/test_entity.vhd(6,8-6,19) (VHDL-1067) elaborating test_entity(behavior)
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(14,8-14,20) (VHDL-1067) elaborating ShiftReg1024(Structure)
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(174,5-175,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_19
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_19'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(174,5-175,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(177,5-180,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_31
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_31'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(177,5-180,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(182,5-185,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_32
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_32'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(182,5-185,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(187,5-190,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_33
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_33'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(187,5-190,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(192,5-195,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_34
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_34'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(192,5-195,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(197,5-198,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_9'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(197,5-198,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(200,5-201,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_20
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_20'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(200,5-201,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(203,5-265,25) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_13'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(203,5-265,25) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(267,5-269,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_77
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_77'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(267,5-269,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(271,5-273,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_78
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_78'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(271,5-273,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(275,5-277,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_79
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_79'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(275,5-277,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(279,5-281,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_80
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_80'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(279,5-281,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(283,5-285,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_81
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_81'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(283,5-285,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(287,5-289,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_82
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_82'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(287,5-289,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(291,5-293,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_83
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_83'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(291,5-293,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(295,5-297,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_84
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_84'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(295,5-297,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(299,5-301,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_85
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_85'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(299,5-301,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(303,5-305,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_86
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_86'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(303,5-305,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(307,5-308,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_13'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(307,5-308,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(310,5-311,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_12
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_12'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(310,5-311,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(313,5-316,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_9
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_9'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(313,5-316,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(318,5-321,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_39
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_39'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(318,5-321,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(323,5-325,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_40
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_40'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(323,5-325,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(327,5-329,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_41
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_41'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(327,5-329,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(331,5-333,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_42
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_42'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(331,5-333,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(335,5-337,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_43
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_43'
    INFO - C:/Dev/Apple1Display/ShiftReg1024.vhd(335,5-337,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_19'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_31'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_32'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_33'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_34'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_20'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_77'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_78'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_79'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_80'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_81'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_82'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_83'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_84'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_85'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_86'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_12'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_9'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_39'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_40'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_41'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_42'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_43'
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(14,8-14,18) (VHDL-1067) elaborating ScreenRom2(Structure)
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(106,5-107,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_13
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_13'
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(106,5-107,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(109,5-110,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_14'
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(109,5-110,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(112,5-173,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_14'
    INFO - C:/Dev/Apple1Display/ScreenRom2.vhd(112,5-173,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_13'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_14'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_14'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(14,8-14,17) (VHDL-1067) elaborating ScreenRam(Structure)
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_21
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_21'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_35
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_35'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_36
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_36'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_37
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_37'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_38
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_38'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_10'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_22
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_22'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(187,5-217,25) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_15'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(187,5-217,25) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_87
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_87'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_88
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_88'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_89
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_89'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_90
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_90'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_91
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_91'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_92
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_92'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_93
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_93'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_94
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_94'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_95
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_95'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_96
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_96'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_15'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_14
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_14'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_10
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_10'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_44
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_44'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_45
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_45'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_46
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_46'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_47
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_47'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_48
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_48'
    INFO - C:/Dev/Apple1Display/ScreenRam.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_21'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_35'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_36'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_37'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_38'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_22'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_87'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_88'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_89'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_90'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_91'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_92'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_93'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_94'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_95'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_96'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_14'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_10'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_44'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_45'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_46'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_47'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_48'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(14,8-14,17) (VHDL-1067) elaborating CursorRam(Structure)
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(158,5-159,59) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_23
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_23'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(158,5-159,59) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(161,5-164,73) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_39
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_39'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(161,5-164,73) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(166,5-169,75) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_40
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_40'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(166,5-169,75) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(171,5-174,51) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_41
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_41'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(171,5-174,51) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(176,5-179,68) (VHDL-1399) going to verilog side to elaborate module ROM16X1A
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,8-1051,16) (VERI-1018) compiling module ROM16X1A_uniq_42
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_42'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(176,5-179,68) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(181,5-182,58) (VHDL-1399) going to verilog side to elaborate module OR2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,8-930,11) (VERI-1018) compiling module OR2_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_11'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(181,5-182,58) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(184,5-185,43) (VHDL-1399) going to verilog side to elaborate module INV
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,8-563,11) (VERI-1018) compiling module INV_uniq_24
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_24'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(184,5-185,43) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(187,5-217,49) (VHDL-1399) going to verilog side to elaborate module DP8KC
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,8-1291,13) (VERI-1018) compiling module DP8KC_uniq_16
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_16'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(187,5-217,49) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(219,5-221,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_97
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_97'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(219,5-221,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(223,5-225,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_98
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_98'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(223,5-225,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(227,5-229,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_99
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_99'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(227,5-229,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(231,5-233,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_100
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_100'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(231,5-233,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(235,5-237,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_101
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_101'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(235,5-237,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(239,5-241,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_102
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_102'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(239,5-241,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(243,5-245,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_103
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_103'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(243,5-245,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(247,5-249,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_104
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_104'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(247,5-249,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(251,5-253,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_105
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_105'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(251,5-253,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(255,5-257,46) (VHDL-1399) going to verilog side to elaborate module FD1P3IX
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,8-198,15) (VERI-1018) compiling module FD1P3IX_uniq_106
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_106'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(255,5-257,46) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(259,5-260,33) (VHDL-1399) going to verilog side to elaborate module VLO
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,8-1124,11) (VERI-1018) compiling module VLO_uniq_16
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_16'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(259,5-260,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(262,5-263,33) (VHDL-1399) going to verilog side to elaborate module VHI
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,8-1120,11) (VERI-1018) compiling module VHI_uniq_15
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_15'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(262,5-263,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(265,5-268,33) (VHDL-1399) going to verilog side to elaborate module FADD2B
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,8-138,14) (VERI-1018) compiling module FADD2B_uniq_11
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_11'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(265,5-268,33) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(270,5-273,34) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_49
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_49'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(270,5-273,34) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(275,5-277,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_50
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_50'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(275,5-277,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(279,5-281,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_51
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_51'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(279,5-281,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(283,5-285,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_52
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_52'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(283,5-285,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(287,5-289,64) (VHDL-1399) going to verilog side to elaborate module CU2
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,8-129,11) (VERI-1018) compiling module CU2_uniq_53
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_53'
    INFO - C:/Dev/Apple1Display/CursorRam.vhd(287,5-289,64) (VHDL-1400) back to vhdl to continue elaboration
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_23'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_39'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_40'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_41'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1051,1-1060,10) (VERI-9000) elaborating module 'ROM16X1A_uniq_42'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(930,1-934,10) (VERI-9000) elaborating module 'OR2_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(563,1-566,10) (VERI-9000) elaborating module 'INV_uniq_24'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1291,1-1358,10) (VERI-9000) elaborating module 'DP8KC_uniq_16'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_97'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_98'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_99'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_100'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_101'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_102'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_103'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_104'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_105'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(198,1-207,10) (VERI-9000) elaborating module 'FD1P3IX_uniq_106'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1124,1-1126,10) (VERI-9000) elaborating module 'VLO_uniq_16'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(1120,1-1122,10) (VERI-9000) elaborating module 'VHI_uniq_15'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(138,1-142,10) (VERI-9000) elaborating module 'FADD2B_uniq_11'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_49'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_50'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_51'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_52'
    INFO - C:/lscc/diamond/3.10_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v(129,1-136,10) (VERI-9000) elaborating module 'CU2_uniq_53'
    Done: design load finished with (0) errors, and (0) warnings