Running in Lattice mode

Starting:    C:\lscc\diamond\3.10_x64\synpbase\bin64\mbin\synbatch.exe
Install:     C:\lscc\diamond\3.10_x64\synpbase
Hostname:    MARKF-PRO
Date:        Thu Aug  8 18:32:42 2019
Version:     M-2017.03L-SP1-1

Arguments:   -product synplify_pro -batch Apple1Display_impl1_synplify.tcl
ProductType: synplify_pro




log file: "C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr"
Running: hdl_info_gen in foreground

Generating HDL info...

hdl_info_gen completed
# Thu Aug  8 18:32:43 2019

Return Code: 0
Run Time:00h:00m:01s
Copied C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srf
log file: "C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr"
Running: impl1 in foreground

Running proj_1|impl1

Running: compile (Compile) on proj_1|impl1
# Thu Aug  8 18:32:43 2019

Running: compile_flow (Compile Process) on proj_1|impl1
# Thu Aug  8 18:32:43 2019

Running: compiler (Compile Input) on proj_1|impl1
# Thu Aug  8 18:32:43 2019
Copied C:\Dev\Apple1Display\impl1\synwork\Apple1Display_impl1_comp.srs to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srs

compiler completed
# Thu Aug  8 18:32:45 2019

Return Code: 0
Run Time:00h:00m:02s

Running: multi_srs_gen (Multi-srs Generator) on proj_1|impl1
# Thu Aug  8 18:32:45 2019

multi_srs_gen completed
# Thu Aug  8 18:32:45 2019

Return Code: 0
Run Time:00h:00m:00s
Copied C:\Dev\Apple1Display\impl1\synwork\Apple1Display_impl1_mult.srs to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srs
Copied C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srf
Complete: Compile Process on proj_1|impl1

Running: premap (Pre-mapping) on proj_1|impl1
# Thu Aug  8 18:32:46 2019

premap completed with warnings
# Thu Aug  8 18:32:46 2019

Return Code: 1
Run Time:00h:00m:00s
Complete: Compile on proj_1|impl1

Running: map (Map) on proj_1|impl1
# Thu Aug  8 18:32:46 2019
License granted for 4 parallel jobs

Running: fpga_mapper (Map & Optimize) on proj_1|impl1
# Thu Aug  8 18:32:46 2019
Copied C:\Dev\Apple1Display\impl1\synwork\Apple1Display_impl1_m.srm to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srm

fpga_mapper completed with warnings
# Thu Aug  8 18:32:49 2019

Return Code: 1
Run Time:00h:00m:03s
Complete: Map on proj_1|impl1
Copied C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srf
Complete: Logic Synthesis on proj_1|impl1
TCL script complete: "Apple1Display_impl1_synplify.tcl"
exit status=0
exit status=0
Save changes for project:
C:\Dev\Apple1Display\impl1\proj_1.prj
batch mode default:no
