[Project]
Current Flow=Generic
VCS=0
version=3
Current Config=compile

[Configurations]
compile=work

[Library]
simulation=.\simulation\simulation.lib
work=.\work\work.lib

[Settings]
AccessRead=1
AccessReadWrite=0
AccessACCB=0
AccessACCR=0
AccessReadWriteSLP=0
AccessReadTopLevel=0
DisableC=1
ENABLE_ADV_DATAFLOW=0
FLOW_TYPE=HDL
LANGUAGE=VHDL
REFRESH_FLOW=1
fileopenfolder=C:\Dev\Apple1Display

[LocalVerilogSets]
EnableSLP=1
EnableDebug=0
PriorityLibNames=pmi_work
LibNames=ovi_machxo2

[LocalVhdlSets]
CompileWithDebug=1
ReorderOnFirstRebuild=1
ElaborationAfterCompilation=0
PrintErrWarnOnly=0
GenMultiplatformLib=0
VhdlPreservePortComments=0
NetlistCompilation=1
EnableVHDL93Key=0
EnableVHDL2002Key=0
EnableVHDL2008Key=1
DisableVHDL87Key=0
Syntax RelaxLRM=0
MaxErrorsKey=100
OptimizationLevel=3
DisableRangeChecks=0
ProtectLevel=0
IncrementalCompilation=0
AdditionalOptions=

[$LibMap$]
simulation=.
work=.

[LocalVerilogDirs]
Count=0

[DefineMacro]
Global=

[SpecTracer]
WindowVisible=0

[HierarchyViewer]
HierarchyInformation=apple1display_tb|behavior|0 
ShowHide=ShowTopLevel
Selected=

[Groups]
wave.asdbw=1
wave.asdbw\current=1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid=1

[DesignStructure]
BlockDiagram=.\src
ActiveCADTestVectors=.\src
PerlScript=.\src
Cpp=.\src
SDF=.\src
Waveform=.\src
adc=.\src
StateDiagram=.\src
SystemVerilogSourceCode=.\src
Macro=.\src
WaveformASDB=.\src
WaveformASDBAWC=.\src
Drawing=.\src
WaveformASDBC=.\src
EDIFSchematic=.\src
ExternalFile=.\src
HTMLDocument=.\src
ListFile=.\src
SymbolSheet=.\src
VHDLSourceCode=.\src
TclScript=.\src
Text=.\src
VerilogSourceCode=.\src
EDIFNetlist=.\src
OvaSourceCode=.\src
PslSourceCode=.\src
MemFile=.\src
GenerateToCustomFolder=0

[Files]
/..\..\tests\dm74175_tb.vhd=-1
/..\..\ttl\dm7408.vhd=-1
/..\..\ttl\dm7427.vhd=-1
/..\..\ttl\dm7450.vhd=-1
/..\..\ttl\dm7432.vhd=-1
/..\..\ttl\dm7410.vhd=-1
/..\..\ttl\court161.vhd=-1
/..\..\ttl\2504.vhd=-1
/..\..\ScreenRom.vhd=-1
/..\..\ScreenRom2.vhd=-1
/..\..\ttl\dm74166.vhd=-1
/..\..\UART_RX.vhd=-1
/..\..\ttl\dm74174.vhd=-1
/..\..\ttl\dm74175.vhd=-1
/..\..\ttl\dm74157.vhd=-1
/..\..\ttl\dm74161.vhd=-1
/..\..\ttl\dm74160.vhd=-1
/..\..\ttl\dm7402.vhd=-1
/..\..\ttl\dm7404.vhd=-1
/..\..\ttl\dm7400.vhd=-1
/..\..\ShiftReg40.vhd=-1
/..\..\impl1\master_clk.vhd=-1
/..\..\impl1\source\ntsc.vhd=-1
/..\..\ScreenRam.vhd=-1
/..\..\impl1\divider.vhd=-1
/..\..\CharacterRom.vhd=-1
/..\..\CursorRam.vhd=-1
/..\..\ttl\2519.vhd=-1
/..\..\impl1\Apple1Display.vhd=-1
/..\..\tests\ShiftReg40_tb.vhd=-1
/..\..\tests\ntsc_tb.vhd=-1
/..\..\tests\Apple1Display_tb.vhd=-1
/..\..\tests\dm74161_tb.vhd=-1
/..\..\tests\divider_tb.vhd=-1
/..\..\impl1\source\FleaFPGA_Uno_Top.vhd=-1
/test_run.awc=-1
/wave.asdb=-1
/..\..\ttl\ne555.vhd=-1
/untitled.awc=-1
/..\..\sig2504.vhd=-1
wave.asdbw/strings.data=-1
wave.asdbw\current/channels=-1
wave.asdbw\current/global_info=-1
wave.asdbw\current/names.data=-1
wave.asdbw\current/names.index=-1
wave.asdbw\current/pattern_lut=-1
wave.asdbw\current/scratchpad=-1
wave.asdbw\current/sources=-1
wave.asdbw\current/strings.index=-1
wave.asdbw\current/treeinfo=-1
wave.asdbw\current/typeinfo=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/channels.data=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/channels.index=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/current_time=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/global_info=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/names.data=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/names.index=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/pattern_lut=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/ref_counter=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/scratchpad.data=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/scratchpad.index=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/sources=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/status_ok=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/strings.index=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/treeinfo=-1
wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid/typeinfo=-1

[Files.Data]
.\..\tests\dm74175_tb.vhd=VHDL Source Code
.\..\ttl\dm7408.vhd=VHDL Source Code
.\..\ttl\dm7427.vhd=VHDL Source Code
.\..\ttl\dm7450.vhd=VHDL Source Code
.\..\ttl\dm7432.vhd=VHDL Source Code
.\..\ttl\dm7410.vhd=VHDL Source Code
.\..\ttl\court161.vhd=VHDL Source Code
.\..\ttl\2504.vhd=VHDL Source Code
.\..\ScreenRom.vhd=VHDL Source Code
.\..\ScreenRom2.vhd=VHDL Source Code
.\..\ttl\dm74166.vhd=VHDL Source Code
.\..\UART_RX.vhd=VHDL Source Code
.\..\ttl\dm74174.vhd=VHDL Source Code
.\..\ttl\dm74175.vhd=VHDL Source Code
.\..\ttl\dm74157.vhd=VHDL Source Code
.\..\ttl\dm74161.vhd=VHDL Source Code
.\..\ttl\dm74160.vhd=VHDL Source Code
.\..\ttl\dm7402.vhd=VHDL Source Code
.\..\ttl\dm7404.vhd=VHDL Source Code
.\..\ttl\dm7400.vhd=VHDL Source Code
.\..\ShiftReg40.vhd=VHDL Source Code
.\..\impl1\master_clk.vhd=VHDL Source Code
.\..\impl1\source\ntsc.vhd=VHDL Source Code
.\..\ScreenRam.vhd=VHDL Source Code
.\..\impl1\divider.vhd=VHDL Source Code
.\..\CharacterRom.vhd=VHDL Source Code
.\..\CursorRam.vhd=VHDL Source Code
.\..\ttl\2519.vhd=VHDL Source Code
.\..\impl1\Apple1Display.vhd=VHDL Source Code
.\..\tests\ShiftReg40_tb.vhd=VHDL Source Code
.\..\tests\ntsc_tb.vhd=VHDL Source Code
.\..\tests\Apple1Display_tb.vhd=VHDL Source Code
.\..\tests\dm74161_tb.vhd=VHDL Source Code
.\..\tests\divider_tb.vhd=VHDL Source Code
.\..\impl1\source\FleaFPGA_Uno_Top.vhd=VHDL Source Code
.\src\test_run.awc=Accelerated Waveform Configuration
.\src\wave.asdb=Accelerated Waveform File
.\..\ttl\ne555.vhd=VHDL Source Code
.\src\untitled.awc=Accelerated Waveform Configuration
.\..\sig2504.vhd=VHDL Source Code
.\src\wave.asdbw\strings.data=External File
.\src\wave.asdbw\current\channels=External File
.\src\wave.asdbw\current\global_info=External File
.\src\wave.asdbw\current\names.data=External File
.\src\wave.asdbw\current\names.index=External File
.\src\wave.asdbw\current\pattern_lut=External File
.\src\wave.asdbw\current\scratchpad=External File
.\src\wave.asdbw\current\sources=External File
.\src\wave.asdbw\current\strings.index=External File
.\src\wave.asdbw\current\treeinfo=External File
.\src\wave.asdbw\current\typeinfo=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\channels.data=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\channels.index=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\current_time=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\global_info=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\names.data=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\names.index=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\pattern_lut=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\ref_counter=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\scratchpad.data=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\scratchpad.index=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\sources=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\status_ok=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\strings.index=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\treeinfo=External File
.\src\wave.asdbw\LOCAL___78b5c55ba3b642192b00.sid\typeinfo=External File