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34 lines
1.8 KiB
Markdown
34 lines
1.8 KiB
Markdown
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Common components for MiST board
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================================
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This repository contains common components, which should be used by almost all cores.
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The modules:
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- user_io.v - communicating with the IO controller.
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- data_io.v - handling file uploads from the IO controller.
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- mist_video.v - a video pipeline, which gives an optional scandoubler, OSD and rgb2ypbpr conversion.
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- osd.v, scandoubler.v, rgb2ypbpr.sv, cofi.sv - these are used in mist_video, but can be used separately, too.
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- sd_card.v - gives an SPI interface with SD-Card commands towards the IO-Controller, accessing .VHD and other mounted files.
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- dac.vhd - a simple sigma-delta DAC for audio output.
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- arcade_inputs.v - mostly for arcade-style games, gives access to the joysticks with MAME-style keyboard mapping.
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- mist.vhd - VHDL component declarations for user_io and mist_video.
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- mist_core.qip - collects the core components, which are needed in almost every case.
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Usage hints
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===========
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All of these components should be clocked by a synchronous clock to the core. The data between the external SPI
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interface and this internal clock are synchronized. However to make Quartus' job easier, you have to tell it to
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don't try to optimize paths between the SPI and the system clock domain. Also you have to define the incoming
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27 MHz and the SPI clocks. These lines in the .sdc file do that:
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```
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set sys_clk "your_system_clock"
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create_clock -name {clk_27} -period 37.037 -waveform { 0.000 18.500 } [get_ports {CLOCK_27[0]}]
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create_clock -name {SPI_SCK} -period 41.666 -waveform { 20.8 41.666 } [get_ports {SPI_SCK}]
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set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks $sys_clk]
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```
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Replace "your_system_clock" with the name of the pll clock, like "pll|altpll_component|auto_generated|pll1|clk[0]".
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