Apple-1-HW/Apple1_MiST
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take roms out of apple1 module

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This commit is contained in:
nino-porcino 2021-12-30 20:25:51 +01:00
parent dd52677652
commit 9ef7c65254
2 changed files with 94 additions and 26 deletions
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29
rtl/apple1.v
View File

@ -99,32 +99,15 @@ assign ram_wr = we & ram_cs;
//////////////////////////////////////////////////////////////////////////
// Address Decoding
wire ram_cs = (addr[15:13] == 3'b000); // 0x0000 -> 0x1FFF
wire keyboard_cs = (addr[15:1] == 15'b110100000001000); // 0xD010 -> 0xD011
wire display_cs = (addr[15:1] == 15'b110100000001001); // 0xD012 -> 0xD013
wire basic_cs = (addr[15:12] == 4'b1110); // 0xE000 -> 0xEFFF
wire rom_cs = (addr[15:8] == 8'b11111111); // 0xFF00 -> 0xFFFF
wire ram_cs = !keyboard_cs & !display_cs;
wire [7:0] display_dout = 8'b0; // display always returns ready on the control port
//////////////////////////////////////////////////////////////////////////
// RAM and ROM
// WozMon ROM
wire [7:0] rom_dout;
rom_wozmon rom_wozmon(
.clk(clk14),
.address(addr[7:0]),
.dout(rom_dout)
);
// Basic ROM
wire [7:0] basic_dout;
rom_basic rom_basic(
.clk(clk14),
.address(addr[11:0]),
.dout(basic_dout)
);
//////////////////////////////////////////////////////////////////////////
// Peripherals
@ -165,10 +148,8 @@ assign ram_wr = we & ram_cs;
// CPU Data In MUX
// link up chip selected device to cpu input
assign cpu_din = ram_cs ? ram_dout :
rom_cs ? rom_dout :
basic_cs ? basic_dout :
display_cs ? display_dout :
keyboard_cs ? ps2_dout :
8'hFF;
assign cpu_din = display_cs ? display_dout :
keyboard_cs ? ps2_dout :
ram_cs ? ram_dout :
8'hFF;
endmodule

91
rtl/apple1_mist.sv
View File

@ -44,7 +44,7 @@ module apple1_mist(
output [1:0] SDRAM_BA, // SDRAM Bank Address
output SDRAM_CLK, // SDRAM Clock
output SDRAM_CKE, // SDRAM Clock Enable
// VGA interface
output [5:0] VGA_R,
output [5:0] VGA_G,
@ -136,12 +136,38 @@ ram ram(
.dout(ram_dout)
);
// WozMon ROM
wire [7:0] rom_dout;
rom_wozmon rom_wozmon(
.clk(clk14),
.address(cpu_addr[7:0]),
.dout(rom_dout)
);
// Basic ROM
wire [7:0] basic_dout;
rom_basic rom_basic(
.clk(clk14),
.address(cpu_addr[11:0]),
.dout(basic_dout)
);
// ram interface
wire [15:0] cpu_addr;
wire [7:0] cpu_dout;
wire cpu_rd;
wire cpu_wr;
wire ram_cs = (cpu_addr[15:13] == 3'b000); // 0x0000 -> 0x1FFF
wire basic_cs = (cpu_addr[15:12] == 4'b1110); // 0xE000 -> 0xEFFF
wire rom_cs = (cpu_addr[15:8] == 8'b11111111); // 0xFF00 -> 0xFFFF
wire [7:0] bus_dout = basic_cs ? basic_dout :
rom_cs ? rom_dout :
ram_cs ? ram_dout :
8'b0;
apple1 apple1
(
.clk14(clk14),
@ -150,7 +176,7 @@ apple1 apple1
// RAM interface
.ram_addr (cpu_addr),
.ram_din (cpu_dout),
.ram_dout (ram_dout),
.ram_dout (bus_dout),
.ram_rd (cpu_rd),
.ram_wr (cpu_wr),
@ -232,4 +258,65 @@ user_io (
.ps2_kbd_data (ps2_kbd_data ) // ps2 keyboard from mist firmware
);
/******************************************************************************************/
/******************************************************************************************/
/***************************************** @sdram *****************************************/
/******************************************************************************************/
/******************************************************************************************/
/*
// SDRAM control signals
assign SDRAM_CKE = 1'b1;
wire [24:0] sdram_addr;
wire [7:0] sdram_din;
wire sdram_wr;
wire sdram_rd;
wire [7:0] sdram_dout;
always @(*) begin
if(is_downloading && download_wr) begin
sdram_addr <= download_addr;
sdram_din <= download_data;
sdram_wr <= download_wr;
sdram_rd <= 1'b1;
end
else if(eraser_busy) begin
sdram_addr <= eraser_addr;
sdram_din <= eraser_data;
sdram_wr <= eraser_wr;
sdram_rd <= 1'b1;
end
else begin
sdram_addr <= { 9'd0, cpu_addr[15:0] };
sdram_din <= cpu_dout;
sdram_wr <= cpu_wr;
sdram_rd <= cpu_rd;
end
end
sdram sdram (
// interface to the MT48LC16M16 chip
.sd_data ( SDRAM_DQ ),
.sd_addr ( SDRAM_A ),
.sd_dqm ( {SDRAM_DQMH, SDRAM_DQML} ),
.sd_cs ( SDRAM_nCS ),
.sd_ba ( SDRAM_BA ),
.sd_we ( SDRAM_nWE ),
.sd_ras ( SDRAM_nRAS ),
.sd_cas ( SDRAM_nCAS ),
// system interface
.clk ( sys_clock ),
.clkref ( cpu_clock ),
.init ( !pll_locked ),
// cpu interface
.din ( sdram_din ),
.addr ( sdram_addr ),
.we ( sdram_wr ),
.oe ( sdram_rd ),
.dout ( sdram_dout )
);
*/
endmodule