Apple-1-HW/Apple1_MiST
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generate 7x8 sdram frequency

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This commit is contained in:
nino-porcino 2022-01-02 15:34:31 +01:00
parent 8437979d3e
commit d0a75bf54c
2 changed files with 17 additions and 18 deletions
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11
rtl/apple1_mist.sv
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@ -116,8 +116,8 @@ wire reset_button = status[0] | st_menu_reset | st_reset_switch | !pll_locked;
wire pll_locked;
wire sdram_clock; // cpu x 8 for sdram.v interface
wire sdram_clock_ph; // cpu x 8 phase shifted -2.5 ns
wire sdram_clock; // cpu x 7 x 8 for sdram.v interface
wire sdram_clock_ph; // cpu x 7 x 8 phase shifted -2.5 ns
pll pll
(
@ -125,9 +125,8 @@ pll pll
.locked(pll_locked),
.c0(clk_osd), // x2 clock for OSD menu
.c1(clk7), // 7.15909 MHz (14.318180/2)
.c2( sdram_clock ), // cpu x 8
.c3( sdram_clock_ph ) // cpu x 8 phase shifted -2.5 ns
.c2( sdram_clock ), // cpu x 7 x 8
.c3( sdram_clock_ph ) // cpu x 7 x 8 phase shifted -2.5 ns
);
/******************************************************************************************/
@ -165,7 +164,7 @@ downloader
.ROM_done ( ROM_loaded ),
// external ram interface
.clk ( clk7 ),
.clk ( clk7 ),
.clk_ena ( cpu_clken ),
.wr ( download_wr ),
.addr ( download_addr ),

24
rtl/pll.v
View File

@ -123,13 +123,13 @@ module pll (
altpll_component.clk1_duty_cycle = 50,
altpll_component.clk1_multiply_by = 715909,
altpll_component.clk1_phase_shift = "0",
altpll_component.clk2_divide_by = 27000000,
altpll_component.clk2_divide_by = 337500,
altpll_component.clk2_duty_cycle = 50,
altpll_component.clk2_multiply_by = 8181817,
altpll_component.clk2_multiply_by = 715909,
altpll_component.clk2_phase_shift = "0",
altpll_component.clk3_divide_by = 27000000,
altpll_component.clk3_divide_by = 337500,
altpll_component.clk3_duty_cycle = 50,
altpll_component.clk3_multiply_by = 8181817,
altpll_component.clk3_multiply_by = 715909,
altpll_component.clk3_phase_shift = "-2500",
altpll_component.compensate_clock = "CLK0",
altpll_component.inclk0_input_frequency = 37037,
@ -214,8 +214,8 @@ endmodule
// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING "50.00000000"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "14.318180"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "7.159090"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "8.181817"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "8.181817"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "57.272720"
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "57.272720"
// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@ -251,8 +251,8 @@ endmodule
// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "14.31818000"
// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "7.15909000"
// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "8.18181700"
// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "8.18181700"
// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "57.27272000"
// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "57.27272000"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "1"
@ -320,13 +320,13 @@ endmodule
// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "715909"
// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "27000000"
// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "337500"
// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "8181817"
// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "715909"
// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "27000000"
// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "337500"
// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC "50"
// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "8181817"
// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "715909"
// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING "-2500"
// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"