mirror of
https://github.com/tebl/RC6502-Apple-1-Replica.git
synced 2024-12-21 06:29:21 +00:00
Yeah, I'm not going to get this within 10x10cm :-(
This commit is contained in:
parent
b638f58cf2
commit
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9
RC6502 General Video Adapter/4040.bck
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9
RC6502 General Video Adapter/4040.bck
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EESchema-DOCLIB Version 2.0
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#
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$CMP 4040
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D Binary Counter 12 stages (Asynchronous)
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K CMOS CNT CNT12
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F cmos4000/MC14040.pdf
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$ENDCMP
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#
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#End Doc Library
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15
RC6502 General Video Adapter/4040.dcm
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15
RC6502 General Video Adapter/4040.dcm
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EESchema-DOCLIB Version 2.0
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#
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$CMP 4040
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D Binary Counter 12 stages (Asynchronous)
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K CMOS CNT CNT12
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F cmos4000/MC14040.pdf
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$ENDCMP
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#
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$CMP 4040_vcc
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D Binary Counter 12 stages (Asynchronous)
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K CMOS CNT CNT12
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F cmos4000/MC14040.pdf
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$ENDCMP
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#
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#End Doc Library
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60
RC6502 General Video Adapter/4040.lib
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60
RC6502 General Video Adapter/4040.lib
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EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# 4040
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#
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DEF 4040 U 0 40 Y Y 1 F N
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F0 "U" 100 650 50 H V C CNN
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F1 "4040" 250 -650 50 H V C CNN
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F2 "" 0 0 60 H I C CNN
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F3 "" 0 0 60 H I C CNN
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DRAW
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X GND 8 0 -600 0 U 50 50 0 0 W N
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X VCC 16 0 600 0 D 50 50 0 0 W N
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S -350 600 350 -600 0 1 0 N
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X Q11 1 650 -550 300 L 50 50 1 1 O
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X Q5 2 650 50 300 L 50 50 1 1 O
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X Q4 3 650 150 300 L 50 50 1 1 O
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X Q6 4 650 -50 300 L 50 50 1 1 O
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X Q3 5 650 250 300 L 50 50 1 1 O
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X Q2 6 650 350 300 L 50 50 1 1 O
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X Q1 7 650 450 300 L 50 50 1 1 O
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X Q0 9 650 550 300 L 50 50 1 1 O
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X CLK 10 -650 550 300 R 50 50 1 1 I IC
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X Reset 11 -650 250 300 R 50 50 1 1 I
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X Q8 12 650 -250 300 L 50 50 1 1 O
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X Q7 13 650 -150 300 L 50 50 1 1 O
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X Q9 14 650 -350 300 L 50 50 1 1 O
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X Q10 15 650 -450 300 L 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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# 4040_vcc
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#
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DEF 4040_vcc U 0 40 Y Y 1 F N
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F0 "U" 100 650 50 H V C CNN
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F1 "4040_vcc" 250 -650 50 H V C CNN
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F2 "" 0 0 60 H I C CNN
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F3 "" 0 0 60 H I C CNN
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DRAW
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X GND 8 0 -600 0 U 50 50 0 0 W N
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X VCC 16 0 600 0 D 50 50 0 0 W N
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S -350 600 350 -600 0 1 0 N
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X Q11 1 650 -550 300 L 50 50 1 1 O
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X Q5 2 650 50 300 L 50 50 1 1 O
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X Q4 3 650 150 300 L 50 50 1 1 O
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X Q6 4 650 -50 300 L 50 50 1 1 O
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X Q3 5 650 250 300 L 50 50 1 1 O
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X Q2 6 650 350 300 L 50 50 1 1 O
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X Q1 7 650 450 300 L 50 50 1 1 O
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X Q0 9 650 550 300 L 50 50 1 1 O
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X CLK 10 -650 550 300 R 50 50 1 1 I IC
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X Reset 11 -650 250 300 R 50 50 1 1 I
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X Q8 12 650 -250 300 L 50 50 1 1 O
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X Q7 13 650 -150 300 L 50 50 1 1 O
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X Q9 14 650 -350 300 L 50 50 1 1 O
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X Q10 15 650 -450 300 L 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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#End Library
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9
RC6502 General Video Adapter/4040_vcc.dcm
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9
RC6502 General Video Adapter/4040_vcc.dcm
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EESchema-DOCLIB Version 2.0
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#
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$CMP 4040
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D Binary Counter 12 stages (Asynchronous)
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K CMOS CNT CNT12
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F cmos4000/MC14040.pdf
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$ENDCMP
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#
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#End Doc Library
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32
RC6502 General Video Adapter/4040_vcc.lib
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RC6502 General Video Adapter/4040_vcc.lib
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EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# 4040
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#
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DEF 4040 U 0 40 Y Y 1 F N
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F0 "U" 100 650 50 H V C CNN
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F1 "4040" 250 -650 50 H V C CNN
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F2 "" 0 0 60 H I C CNN
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F3 "" 0 0 60 H I C CNN
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DRAW
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X VSS 8 0 -600 0 U 50 50 0 0 W N
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X VDD 16 0 600 0 D 50 50 0 0 W N
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S -350 600 350 -600 0 1 0 N
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X Q11 1 650 -550 300 L 50 50 1 1 O
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X Q5 2 650 50 300 L 50 50 1 1 O
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X Q4 3 650 150 300 L 50 50 1 1 O
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X Q6 4 650 -50 300 L 50 50 1 1 O
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X Q3 5 650 250 300 L 50 50 1 1 O
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X Q2 6 650 350 300 L 50 50 1 1 O
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X Q1 7 650 450 300 L 50 50 1 1 O
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X Q0 9 650 550 300 L 50 50 1 1 O
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X CLK 10 -650 550 300 R 50 50 1 1 I IC
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X Reset 11 -650 250 300 R 50 50 1 1 I
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X Q8 12 650 -250 300 L 50 50 1 1 O
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X Q7 13 650 -150 300 L 50 50 1 1 O
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X Q9 14 650 -350 300 L 50 50 1 1 O
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X Q10 15 650 -450 300 L 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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#End Library
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@ -1,16 +1,16 @@
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EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# 4040
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# 4040_vcc
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#
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DEF 4040 U 0 40 Y Y 1 F N
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DEF 4040_vcc U 0 40 Y Y 1 F N
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F0 "U" 100 650 50 H V C CNN
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F1 "4040" 250 -650 50 H V C CNN
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F1 "4040_vcc" 250 -650 50 H V C CNN
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F2 "" 0 0 60 H I C CNN
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F3 "" 0 0 60 H I C CNN
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DRAW
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X VSS 8 0 -600 0 U 50 50 0 0 W N
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X VDD 16 0 600 0 D 50 50 0 0 W N
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X GND 8 0 -600 0 U 50 50 0 0 W N
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X VCC 16 0 600 0 D 50 50 0 0 W N
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S -350 600 350 -600 0 1 0 N
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X Q11 1 650 -550 300 L 50 50 1 1 O
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X Q5 2 650 50 300 L 50 50 1 1 O
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File diff suppressed because it is too large
Load Diff
1570
RC6502 General Video Adapter/RC6502 General Video Adapter.net
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1570
RC6502 General Video Adapter/RC6502 General Video Adapter.net
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@ -1,4 +1,4 @@
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update=15/06/2017 19:12:05
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update=17/06/2017 16:47:50
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version=1
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last_client=kicad
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[pcbnew]
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@ -23,6 +23,8 @@ ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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[general]
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version=1
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[eeschema]
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version=1
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LibDir=
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@ -56,5 +58,5 @@ LibName26=opto
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LibName27=atmel
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LibName28=contrib
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LibName29=valves
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[general]
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version=1
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LibName30=rca
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LibName31=4040
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File diff suppressed because it is too large
Load Diff
3
RC6502 General Video Adapter/fp-lib-table
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3
RC6502 General Video Adapter/fp-lib-table
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(fp_lib_table
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(lib (name rca)(type KiCad)(uri "$(KIPRJMOD)/rca.pretty")(options "")(descr ""))
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)
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13
RC6502 General Video Adapter/rca.dcm
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13
RC6502 General Video Adapter/rca.dcm
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EESchema-DOCLIB Version 2.0
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#
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$CMP CONN_COAXIAL
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D coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)
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K BNC SMA SMB SMC coaxial connector CINCH RCA
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$ENDCMP
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#
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$CMP RCA_PLUG
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D coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)
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K BNC SMA SMB SMC coaxial connector CINCH RCA
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$ENDCMP
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#
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#End Doc Library
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54
RC6502 General Video Adapter/rca.lib
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54
RC6502 General Video Adapter/rca.lib
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EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# CONN_COAXIAL
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#
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DEF CONN_COAXIAL J 0 40 Y N 1 F N
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F0 "J" 10 120 50 H V C CNN
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F1 "CONN_COAXIAL" 115 0 50 V V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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*BNC*
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*SMA*
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*SMB*
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*SMC*
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*Cinch*
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$ENDFPLIST
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DRAW
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A -2 0 71 1636 0 0 1 10 N -70 20 70 0
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A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
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C 0 0 20 0 1 8 N
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P 2 0 1 0 -50 0 -20 0 N
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P 2 0 1 0 0 -100 0 -70 N
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X Ext 1 0 -200 100 U 50 50 1 1 P
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X In 2 -150 0 100 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# RCA_PLUG
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#
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DEF RCA_PLUG J 0 40 Y N 1 F N
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F0 "J" 10 120 50 H V C CNN
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F1 "RCA_PLUG" 115 0 50 V V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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*BNC*
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*SMA*
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*SMB*
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*SMC*
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*Cinch*
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$ENDFPLIST
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DRAW
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A -2 0 71 1636 0 0 1 10 N -70 20 70 0
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A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
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C 0 0 20 0 1 8 N
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P 2 0 1 0 -50 0 -20 0 N
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P 2 0 1 0 0 -100 0 -70 N
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X Ext 1 0 -200 100 U 50 50 1 1 P
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X In 2 -150 0 100 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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#End Library
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41
RC6502 General Video Adapter/rca.pretty/rca_yellow.kicad_mod
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41
RC6502 General Video Adapter/rca.pretty/rca_yellow.kicad_mod
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(module w_conn_av:rca_yellow (layer F.Cu) (tedit 593D80CA)
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(descr "RCA Audio connector, yellow, Pro Signal p/n PSG01547")
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(tags "rca, audio")
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(fp_text reference J3 (at 0 15.7988) (layer F.SilkS)
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(effects (font (thickness 0.3048)))
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)
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(fp_text value Video (at 0 -8.89) (layer F.SilkS)
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(effects (font (thickness 0.3048)))
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)
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(fp_circle (center -3.2512 -5.79882) (end -3.79984 -5.79882) (layer F.SilkS) (width 0.381))
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(fp_circle (center 3.2512 -5.79882) (end 2.70002 -5.84962) (layer F.SilkS) (width 0.381))
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(fp_circle (center 3.2512 4.0005) (end 2.70002 4.04876) (layer F.SilkS) (width 0.381))
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(fp_circle (center -3.2512 4.0005) (end -3.79984 3.9497) (layer F.SilkS) (width 0.381))
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(fp_circle (center -3.2512 0) (end -3.79984 0) (layer F.SilkS) (width 0.381))
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(fp_circle (center 3.2512 0) (end 2.70002 -0.0508) (layer F.SilkS) (width 0.381))
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(fp_line (start -4.30022 5.00126) (end -4.30022 14.00048) (layer F.SilkS) (width 0.381))
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(fp_line (start -4.30022 14.00048) (end 4.30022 14.00048) (layer F.SilkS) (width 0.381))
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(fp_line (start 4.30022 14.00048) (end 4.30022 5.00126) (layer F.SilkS) (width 0.381))
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(fp_line (start 4.8006 -4.89966) (end 5.40004 -4.89966) (layer F.SilkS) (width 0.381))
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(fp_line (start 5.40004 -4.89966) (end 5.40004 -3.0988) (layer F.SilkS) (width 0.381))
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(fp_line (start 5.40004 -3.0988) (end 4.8006 -3.0988) (layer F.SilkS) (width 0.381))
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(fp_line (start -5.40004 -4.89966) (end -4.8006 -4.89966) (layer F.SilkS) (width 0.381))
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(fp_line (start -4.8006 -3.0988) (end -5.40004 -3.0988) (layer F.SilkS) (width 0.381))
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(fp_line (start -5.40004 -3.0988) (end -5.40004 -4.89966) (layer F.SilkS) (width 0.381))
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(fp_line (start -4.8006 -6.79958) (end -1.80086 -6.79958) (layer F.SilkS) (width 0.381))
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(fp_line (start -1.80086 -6.79958) (end -1.80086 -5.99948) (layer F.SilkS) (width 0.381))
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(fp_line (start -1.80086 -5.99948) (end 1.80086 -5.99948) (layer F.SilkS) (width 0.381))
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(fp_line (start 1.80086 -5.99948) (end 1.80086 -6.79958) (layer F.SilkS) (width 0.381))
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(fp_line (start 1.80086 -6.79958) (end 4.8006 -6.79958) (layer F.SilkS) (width 0.381))
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(fp_line (start 4.8006 5.00126) (end -4.8006 5.00126) (layer F.SilkS) (width 0.381))
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(fp_line (start -4.8006 4.99872) (end -4.8006 -6.80212) (layer F.SilkS) (width 0.381))
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(fp_line (start 4.8006 -6.79958) (end 4.8006 5.00126) (layer F.SilkS) (width 0.381))
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(pad 2 thru_hole oval (at 3.81 -3.81) (size 1.99898 3.19786) (drill oval 0.99568 2.1971) (layers *.Cu *.Mask F.SilkS))
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(pad 1 thru_hole oval (at 0 -1.27) (size 3.19786 1.99898) (drill oval 2.1971 0.99568) (layers *.Cu *.Mask F.SilkS))
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(pad 2 thru_hole oval (at -3.81 -3.81) (size 1.99898 3.19786) (drill oval 0.99568 2.1971) (layers *.Cu *.Mask F.SilkS))
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(model walter/conn_av/rca_yellow.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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