Simulation
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
vdu_amplifier.pretty
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
vdu_port.pretty
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
fp-lib-table
|
Assigned new footprints
|
2018-12-29 14:07:32 +01:00 |
RC6502 VDU-cache.lib
|
VDU PCB layout done
|
2018-12-30 11:16:17 +01:00 |
RC6502 VDU.kicad_pcb
|
VDU PCB layout done
|
2018-12-30 11:16:17 +01:00 |
RC6502 VDU.net
|
VDU PCB layout done
|
2018-12-30 11:16:17 +01:00 |
RC6502 VDU.pro
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
RC6502 VDU.sch
|
VDU PCB layout done
|
2018-12-30 11:16:17 +01:00 |
vdu_port.bck
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
vdu_port.dcm
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |
vdu_port.lib
|
Changed VDU CS logic ins schematic
|
2018-12-29 13:56:20 +01:00 |