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Alternative full RAM mapping
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README.md
13
README.md
@ -25,6 +25,8 @@ to overwrite itself in ROM.
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The A1C expansion card in RAM mode works great in conjunction with [Apple-1 Serial Interface](http://github.com/flowenol/apple1serial)
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card or the original Apple Cassette Interface, expanding the available address space to load programs.
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You can also replace the Apple-1 on-board RAM entirely using an alternative address decoder mapping (check details in the [Mappings](#mappings) section).
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## Memory map
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With physical switch in ROM position:
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@ -55,6 +57,17 @@ The contents of this repository are as following:
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* scripts/ - a bunch of useful python scripts which do the conversion between binary and Woz monitor format and vice versa
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* src/ - contains the 6502 assembly sources for the on-board ROM loader programs
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## Mappings
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There are two .jed files for the GAL22V10 based address decoder:
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1. **address_decoder.jed** - defines the standard mapping where additional RAM memory is mapped to the regions `$1000-$BFFF` as
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described above. This mapping assumes that your Apple-1 board has "X" and "W" RAM chips populated and mapped to regions
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`$0000-$0FFF` and `$E000-$EFFF`.
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2. **address_decoder1.jed** - defines an alternative mappig allowing tu run Apple-1 Computer entirely from the A1C. The regions
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`$0000-$0FFF` and `$E000-$EFFF` are additionally mapped to the A1C RAM1 chip. Be sure to remove the "X" and "W" memory chips
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from Apple-1 board for safety, and to disconnect the "X" and "W" lines (if they were mapped to the "0" and "E" segments).
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## Requirements
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You need the following to successfully build and install the firmware:
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22
mapping/address_decoder1.eqn
Normal file
22
mapping/address_decoder1.eqn
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@ -0,0 +1,22 @@
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chip GAL22V10
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NC=1 PHI=2 RW=3 MOD=4 A3=11 A4=10 A5=9 A6=8 A7=7 A8=6 A9=5 A10=17 GND=12
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A11=18 A12=16 A13=14 A14=15 A15=13 RAM2=19 RAM1=20 ROM=21 FF=22 BANK=23 VCC=24
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equations
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/ROM = /A15 * A14 * /A13 * /A12 * /A11 * RW * MOD
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+ /A15 * A14 * RW * BANK * MOD
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+ A15 * /A14 * RW * BANK * MOD
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/RAM1 = /A15 * /A14 * /A13 * /A12 * PHI
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+ /A15 * /A14 * /A13 * A12 * PHI
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+ /A15 * /A14 * A13 * /A12 * PHI
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+ /A15 * /A14 * A13 * A12 * PHI
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+ A15 * A14 * A13 * /A12 * PHI
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/RAM2 = /A15 * A14 * /A13 * /A12 * A11 * /BANK * PHI * MOD
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+ A15 * /A14 * /BANK * PHI * MOD
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+ /A15 * A14 * A13 * /BANK * PHI * MOD
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+ /A15 * A14 * /A13 * A12 * /BANK * PHI * MOD
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+ /A15 * A14 * PHI * /MOD
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+ A15 * /A14 * PHI * /MOD
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FF = A3 * A4 * A5 * A6 * A7 * A8 * A9 * A10 * /A11 * /A12 * /A13 * A14 * /A15 * /RW * PHI * MOD
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37
mapping/address_decoder1.jed
Normal file
37
mapping/address_decoder1.jed
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@ -0,0 +1,37 @@
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GAL22V10
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Assembled from "e:/MAPPING/ADDRES~2.EQN". Date: 12-7-122
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*
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NOTE PINS PHI:2 RW:3 MOD:4 A9:5 A8:6 A7:7 A6:8 A5:9 A4:10 A3:11*
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NOTE PINS GND:12 A15:13 A13:14 A14:15 A12:16 A10:17 A11:18 RAM2:19*
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NOTE PINS RAM1:20 ROM:21 FF:22 BANK:23 VCC:24*
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QF5828*QP24*F0*
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L0440
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11111111111111111111111111111111111111111111
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11110111101101110111011001010110010101100110*
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L0924
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11111111111111111111111111111111111111111111
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11111111011101111111111011111110110111101110
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11011111011101111111111111111111110111111110
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11011111011101111111111111111111111011111101*
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L1496
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11111111111111111111111111111111111111111111
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11110111111111111111111111111110111011101110
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11110111111111111111111111111101111011101110
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11110111111111111111111111111110111011011110
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11110111111111111111111111111101111011011110
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11110111111111111111111111111110110111011101*
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L2156
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11111111111111111111111111111111111111111111
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11100111111101111111110111111110110111101110
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11100111111101111111111111111111111011111101
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11100111111101111111111111111111110111011110
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11100111111101111111111111111101110111101110
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11110111111110111111111111111111110111111110
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11110111111110111111111111111111111011111101*
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L5808
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01110101010101010101*
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C5BFC*
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0000
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76
mapping/address_decoder1.log
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76
mapping/address_decoder1.log
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@ -0,0 +1,76 @@
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Log file for e:/MAPPING/ADDRES~2.EQN
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Device: G22V10
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Pin Label Type
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--- ----- ----
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2 PHI pos,com input
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3 RW pos,com input
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4 MOD pos,com input
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5 A9 pos,com input
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6 A8 pos,com input
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7 A7 pos,com input
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8 A6 pos,com input
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9 A5 pos,com input
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10 A4 pos,com input
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11 A3 pos,com input
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12 GND ground pin
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13 A15 pos,com input
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14 A13 pos,com input
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15 A14 pos,com input
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16 A12 pos,com input
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17 A10 pos,com input
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18 A11 pos,com input
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19 RAM2 neg,trst,com output
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20 RAM1 neg,trst,com output
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21 ROM neg,trst,com output
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22 FF pos,trst,com output
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23 BANK pos,com input
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24 VCC power pin
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Device Utilization:
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No of dedicated inputs used : 12/12 (100.0%)
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No of feedbacks used as dedicated inputs : 5/10 (50.0%)
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No of feedbacks used as dedicated outputs : 4/10 (40.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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22 FF.oe 1/1 (100.0%)
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22 FF 1/10 (10.0%)
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21 ROM.oe 1/1 (100.0%)
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21 ROM 3/12 (25.0%)
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20 RAM1.oe 1/1 (100.0%)
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20 RAM1 5/14 (35.7%)
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19 RAM2.oe 1/1 (100.0%)
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19 RAM2 6/16 (37.5%)
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------------------------------------------
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Total Terms 19/132 (14.4%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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CLK | 1 24 | VCC
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PHI | 2 23 | BANK
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RW | 3 22 | FF
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MOD | 4 21 | ROM
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A9 | 5 20 | RAM1
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A8 | 6 19 | RAM2
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A7 | 7 18 | A11
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A6 | 8 17 | A10
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A5 | 9 16 | A12
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A4 | 10 15 | A14
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A3 | 11 14 | A13
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GND | 12 13 | A15
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|______________|
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