mirror of
https://github.com/flowenol/apple1serial.git
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220 lines
8.5 KiB
Plaintext
220 lines
8.5 KiB
Plaintext
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Log file for e:/APPLE1~1/ADDRES~1.EQN
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Device: 20V8
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Pin Label Type
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--- ----- ----
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2 RW pos,com input
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3 A0 pos,com input
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4 A1 pos,com input
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5 A2 pos,com input
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6 A3 pos,com input
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7 A4 pos,com input
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8 A5 pos,com input
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9 A6 pos,com input
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10 A7 pos,com input
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11 A8 pos,com input
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12 GND ground pin
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14 A9 pos,com input
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15 A10 pos,com input
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16 A11 pos,com input
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17 SR pos,com output
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18 RD pos,com output
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19 WD pos,com output
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20 ROM neg,com output
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21 RES pos,com output
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22 PHI pos,com input
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23 R pos,com input
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24 VCC power pin
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Device Utilization:
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No of dedicated inputs used : 14/14 (100.0%)
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No of feedbacks used as dedicated inputs : 1/6 (16.7%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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21 RES 1/8 (12.5%)
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20 ROM 4/8 (50.0%)
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19 WD 1/8 (12.5%)
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18 RD 1/8 (12.5%)
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17 SR 1/8 (12.5%)
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------------------------------------------
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Total Terms 8/64 (12.5%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 24 | VCC
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RW | 2 23 | R
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A0 | 3 22 | PHI
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A1 | 4 21 | RES
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A2 | 5 20 | ROM
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A3 | 6 19 | WD
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A4 | 7 18 | RD
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A5 | 8 17 | SR
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A6 | 9 16 | A11
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A7 | 10 15 | A10
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A8 | 11 14 | A9
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GND | 12 13 |
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|______________|
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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|
Copyright (c) National Semiconductor Corporation 1990-1993
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|||
|
|
|||
|
Log file for e:/APPLE1~1/ADDRES~1.EQN
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|||
|
Device: 20V8
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|||
|
|
|||
|
Pin Label Type
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--- ----- ----
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2 RW pos,com input
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3 A0 pos,com input
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4 A1 pos,com input
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5 A2 pos,com input
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6 A3 pos,com input
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7 A4 pos,com input
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8 A5 pos,com input
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9 A6 pos,com input
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10 A7 pos,com input
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11 A8 pos,com input
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12 GND ground pin
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14 A9 pos,com input
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15 A10 pos,com input
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16 A11 pos,com input
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17 SR pos,com output
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18 RD pos,com output
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19 WD pos,com output
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20 ROM neg,com output
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21 RES pos,com output
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22 PHI pos,com input
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23 R pos,com input
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24 VCC power pin
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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|
Copyright (c) National Semiconductor Corporation 1990-1993
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|||
|
|
|||
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Device Utilization:
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No of dedicated inputs used : 14/14 (100.0%)
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No of feedbacks used as dedicated inputs : 1/6 (16.7%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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21 RES 1/8 (12.5%)
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20 ROM 4/8 (50.0%)
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19 WD 1/8 (12.5%)
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18 RD 1/8 (12.5%)
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17 SR 1/8 (12.5%)
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------------------------------------------
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Total Terms 8/64 (12.5%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 24 | VCC
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RW | 2 23 | R
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A0 | 3 22 | PHI
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A1 | 4 21 | RES
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A2 | 5 20 | ROM
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A3 | 6 19 | WD
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A4 | 7 18 | RD
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A5 | 8 17 | SR
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A6 | 9 16 | A11
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A7 | 10 15 | A10
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A8 | 11 14 | A9
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GND | 12 13 |
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|______________|
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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|||
|
|
|||
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Log file for e:/APPLE1~1/ADDRES~1.EQN
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|
Device: 20V8
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|
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|||
|
Pin Label Type
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--- ----- ----
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2 RW pos,com input
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3 A0 pos,com input
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4 A1 pos,com input
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5 A2 pos,com input
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6 A3 pos,com input
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7 A4 pos,com input
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8 A5 pos,com input
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9 A6 pos,com input
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10 A7 pos,com input
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11 A8 pos,com input
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12 GND ground pin
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14 A9 pos,com input
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15 A10 pos,com input
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16 A11 pos,com input
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17 SR pos,com output
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18 RD pos,com output
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19 WD pos,com output
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20 ROM neg,com output
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21 RES pos,com output
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22 PHI pos,com input
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23 R pos,com input
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24 VCC power pin
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|
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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|||
|
Copyright (c) National Semiconductor Corporation 1990-1993
|
|||
|
|
|||
|
Device Utilization:
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|||
|
|
|||
|
No of dedicated inputs used : 14/14 (100.0%)
|
|||
|
No of feedbacks used as dedicated inputs : 1/6 (16.7%)
|
|||
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No of dedicated outputs used : 2/2 (100.0%)
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|||
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
|
|||
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|||
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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21 RES 1/8 (12.5%)
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20 ROM 4/8 (50.0%)
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19 WD 1/8 (12.5%)
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18 RD 1/8 (12.5%)
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17 SR 1/8 (12.5%)
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------------------------------------------
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Total Terms 8/64 (12.5%)
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------------------------------------------
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|||
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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|||
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Copyright (c) National Semiconductor Corporation 1990-1993
|
|||
|
|
|||
|
Chip diagram (DIP)
|
|||
|
|
|||
|
._____ _____.
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|||
|
| \__/ |
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| 1 24 | VCC
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RW | 2 23 | R
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A0 | 3 22 | PHI
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A1 | 4 21 | RES
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A2 | 5 20 | ROM
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A3 | 6 19 | WD
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A4 | 7 18 | RD
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A5 | 8 17 | SR
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A6 | 9 16 | A11
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A7 | 10 15 | A10
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A8 | 11 14 | A9
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GND | 12 13 |
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|______________|
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