diff --git a/apple-one.core b/apple-one.core
new file mode 100644
index 0000000..ac12eef
--- /dev/null
+++ b/apple-one.core
@@ -0,0 +1,136 @@
+CAPI=2:
+
+name : ::apple-one:0
+
+filesets:
+  cpu:
+    files:
+      - rtl/cpu/arlet/cpu.v
+      - rtl/cpu/arlet/ALU.v
+      - rtl/cpu/arlet_6502.v
+    file_type : verilogSource
+
+  main:
+    files:
+      - roms/basic.hex:  {copyto : basic.hex , is_include_file : true}
+      - rtl/rom_basic.v
+      - rtl/apple1.v
+      - roms/wozmon.hex: {copyto : wozmon.hex, is_include_file : true}
+      - rtl/rom_wozmon.v
+      - roms/ram.hex:    {copyto : ram.hex   , is_include_file : true}
+      - rtl/ram.v
+    file_type : verilogSource
+  ps2keyboard:
+    files:
+      - rtl/ps2keyboard/debounce.v
+      - rtl/ps2keyboard/ps2keyboard.v
+    file_type : verilogSource
+  synth:
+    files:
+      - rtl/pwr_reset.v
+      - rtl/clock.v
+    file_type : verilogSource
+      
+  vga:
+    files:
+      - roms/vga_font_bitreversed.hex: {copyto : vga_font_bitreversed.hex, is_include_file : true}
+      - roms/vga_vram.bin: {copyto : vga_vram.bin, is_include_file : true}
+      - rtl/vga/vram.v
+      - rtl/vga/vga.v
+      - rtl/vga/font_rom.v
+    file_type : verilogSource
+  uart:
+    files:
+      - rtl/uart/uart.v
+      - rtl/uart/async_tx_rx.v
+    file_type : verilogSource
+      
+  de0:
+    files:
+      - rtl/boards/terasic_de0/segmentdisplay.v  : {file_type : verilogSource}
+      - boards/terasic_de0/Quartus/apple-one.sdc : {file_type : SDC}
+      - boards/terasic_de0/Quartus/options.tcl   : {file_type : tclSource}
+      - boards/terasic_de0/Quartus/pinmap.tcl    : {file_type : tclSource}
+      - rtl/boards/terasic_de0/apple1_de0_top.v  : {file_type : verilogSource}
+
+  apple1_tb:
+    files:
+      - tools/iverilog/apple1_tb.v
+    file_type : verilogSource
+
+  tinyfpga_b2:
+    files:
+      - boards/tinyfpga_b2/yosys/tinyfpga.pcf : {file_type : PCF}
+      - rtl/boards/tinyfpga_b2/clock_pll.v 
+      - rtl/boards/tinyfpga_b2/apple1_hx8k.v
+    file_type : verilogSource
+  vga_tb:
+    files:
+      - tools/iverilog/vga_tb.v
+    file_type : verilogSource
+
+targets:
+  de0:
+    default_tool : quartus
+    filesets: [cpu, main, synth, ps2keyboard, uart, vga, de0]
+    parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
+    tools:
+      quartus:
+        family     : "Cyclone III"
+        device     : EP3C16F484C6
+    toplevel: [apple1_de0_top]
+  apple1_tb:
+    default_tool : icarus
+    filesets : [cpu, main, synth, ps2keyboard, uart, vga, apple1_tb]
+    parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
+    toplevel : [apple1_tb]
+    tools:
+      icarus:
+        iverilog_options : [-DSIM]
+      modelsim:
+        vlog_options : [+define+SIM]
+
+  tinyfpga_b2:
+    default_tool : icestorm
+    filesets : [main, synth, cpu, uart, vga, ps2keyboard, tinyfpga_b2]
+    parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
+    toplevel : [apple1_top]
+    tools:
+      icestorm :
+        arachne_pnr_options : [-d, 8k, -P, cm81]
+  vga_tb:
+    default_tool : icarus
+    filesets : [vga, vga_tb]
+    toplevel : [vga_tb]
+
+parameters:
+  BASIC_FILENAME:
+    datatype    : file
+    default     : basic.hex
+    description : BASIC interpreter ROM (hex format)
+    paramtype   : vlogparam
+    scope       : private
+  FONT_ROM_FILENAME:
+    datatype    : file
+    default     : vga_font_bitreversed.hex
+    description : Font ROM (hex format)
+    paramtype   : vlogparam
+    scope       : private
+  RAM_FILENAME:
+    datatype    : file
+    default     : ram.hex
+    description : Initial RAM contents (hex format)
+    paramtype   : vlogparam
+    scope       : private
+  VRAM_FILENAME:
+    datatype    : file
+    default     : vga_vram.bin
+    description : Initial Video RAM contents (bin format)
+    paramtype   : vlogparam
+    scope       : private
+  WOZMON_ROM_FILENAME:
+    datatype    : file
+    default     : wozmon.hex
+    description : WozMon ROM (hex format)
+    paramtype   : vlogparam
+    scope       : private
diff --git a/boards/terasic_de0/Quartus/options.tcl b/boards/terasic_de0/Quartus/options.tcl
new file mode 100644
index 0000000..c990641
--- /dev/null
+++ b/boards/terasic_de0/Quartus/options.tcl
@@ -0,0 +1 @@
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
diff --git a/boards/terasic_de0/Quartus/pinmap.tcl b/boards/terasic_de0/Quartus/pinmap.tcl
new file mode 100644
index 0000000..6455820
--- /dev/null
+++ b/boards/terasic_de0/Quartus/pinmap.tcl
@@ -0,0 +1,304 @@
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BUTTON[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BUTTON[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BUTTON[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDG[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0_D[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1_D[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2_D[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3_D[6]
+
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_TXD
+set_location_assignment PIN_B1 -to LEDG[9]
+set_location_assignment PIN_B2 -to LEDG[8]
+set_location_assignment PIN_C2 -to LEDG[7]
+set_location_assignment PIN_C1 -to LEDG[6]
+set_location_assignment PIN_E1 -to LEDG[5]
+set_location_assignment PIN_F2 -to LEDG[4]
+set_location_assignment PIN_H1 -to LEDG[3]
+set_location_assignment PIN_J3 -to LEDG[2]
+set_location_assignment PIN_J2 -to LEDG[1]
+set_location_assignment PIN_J1 -to LEDG[0]
+set_location_assignment PIN_D2 -to SW[9]
+set_location_assignment PIN_E4 -to SW[8]
+set_location_assignment PIN_E3 -to SW[7]
+set_location_assignment PIN_H7 -to SW[6]
+set_location_assignment PIN_J7 -to SW[5]
+set_location_assignment PIN_G5 -to SW[4]
+set_location_assignment PIN_G4 -to SW[3]
+set_location_assignment PIN_H6 -to SW[2]
+set_location_assignment PIN_H5 -to SW[1]
+set_location_assignment PIN_J6 -to SW[0]
+set_location_assignment PIN_F1 -to BUTTON[2]
+set_location_assignment PIN_G3 -to BUTTON[1]
+set_location_assignment PIN_H2 -to BUTTON[0]
+set_location_assignment PIN_R2 -to FL_ADDR[21]
+set_location_assignment PIN_P3 -to FL_ADDR[20]
+set_location_assignment PIN_P1 -to FL_ADDR[19]
+set_location_assignment PIN_M6 -to FL_ADDR[18]
+set_location_assignment PIN_M5 -to FL_ADDR[17]
+set_location_assignment PIN_AA2 -to FL_ADDR[16]
+set_location_assignment PIN_L6 -to FL_ADDR[15]
+set_location_assignment PIN_L7 -to FL_ADDR[14]
+set_location_assignment PIN_M1 -to FL_ADDR[13]
+set_location_assignment PIN_M2 -to FL_ADDR[12]
+set_location_assignment PIN_M3 -to FL_ADDR[11]
+set_location_assignment PIN_N1 -to FL_ADDR[10]
+set_location_assignment PIN_N2 -to FL_ADDR[9]
+set_location_assignment PIN_P2 -to FL_ADDR[8]
+set_location_assignment PIN_M4 -to FL_ADDR[7]
+set_location_assignment PIN_M8 -to FL_ADDR[6]
+set_location_assignment PIN_N6 -to FL_ADDR[5]
+set_location_assignment PIN_N5 -to FL_ADDR[4]
+set_location_assignment PIN_N7 -to FL_ADDR[3]
+set_location_assignment PIN_P6 -to FL_ADDR[2]
+set_location_assignment PIN_P5 -to FL_ADDR[1]
+set_location_assignment PIN_P7 -to FL_ADDR[0]
+set_location_assignment PIN_AA1 -to FL_BYTE_N
+set_location_assignment PIN_N8 -to FL_CE_N
+set_location_assignment PIN_R7 -to FL_DQ[0]
+set_location_assignment PIN_P8 -to FL_DQ[1]
+set_location_assignment PIN_R8 -to FL_DQ[2]
+set_location_assignment PIN_U1 -to FL_DQ[3]
+set_location_assignment PIN_V2 -to FL_DQ[4]
+set_location_assignment PIN_V3 -to FL_DQ[5]
+set_location_assignment PIN_W1 -to FL_DQ[6]
+set_location_assignment PIN_Y1 -to FL_DQ[7]
+set_location_assignment PIN_T5 -to FL_DQ[8]
+set_location_assignment PIN_T7 -to FL_DQ[9]
+set_location_assignment PIN_T4 -to FL_DQ[10]
+set_location_assignment PIN_U2 -to FL_DQ[11]
+set_location_assignment PIN_V1 -to FL_DQ[12]
+set_location_assignment PIN_V4 -to FL_DQ[13]
+set_location_assignment PIN_W2 -to FL_DQ[14]
+set_location_assignment PIN_R6 -to FL_OE_N
+set_location_assignment PIN_R1 -to FL_RST_N
+set_location_assignment PIN_M7 -to FL_RY
+set_location_assignment PIN_P4 -to FL_WE_N
+set_location_assignment PIN_T3 -to FL_WP_N
+set_location_assignment PIN_Y2 -to FL_DQ15_AM1
+set_location_assignment PIN_U7 -to SRAM_DATA[5]
+set_location_assignment PIN_V5 -to SRAM_DATA[4]
+set_location_assignment PIN_W6 -to SRAM_ADDR[14]
+set_location_assignment PIN_W7 -to SRAM_ADDR[13]
+set_location_assignment PIN_V8 -to SRAM_ADDR[12]
+set_location_assignment PIN_T8 -to SRAM_ADDR[11]
+set_location_assignment PIN_W10 -to SRAM_ADDR[10]
+set_location_assignment PIN_Y10 -to GPIO0_D[24]
+set_location_assignment PIN_V11 -to SRAM_ADDR[9]
+set_location_assignment PIN_R10 -to GPIO0_D[22]
+set_location_assignment PIN_V12 -to SRAM_ADDR[8]
+set_location_assignment PIN_U13 -to SRAM_ADDR[7]
+set_location_assignment PIN_W13 -to SRAM_ADDR[6]
+set_location_assignment PIN_Y13 -to SRAM_ADDR[5]
+set_location_assignment PIN_U14 -to SRAM_WE_N
+set_location_assignment PIN_V14 -to SRAM_DATA[3]
+set_location_assignment PIN_AA4 -to SRAM_DATA[2]
+set_location_assignment PIN_AB4 -to SRAM_DATA[1]
+set_location_assignment PIN_AA5 -to SRAM_DATA[0]
+set_location_assignment PIN_AB5 -to SRAM_CE_N
+set_location_assignment PIN_AA8 -to SRAM_ADDR[4]
+set_location_assignment PIN_AB8 -to SRAM_ADDR[3]
+set_location_assignment PIN_AA10 -to SRAM_ADDR[2]
+set_location_assignment PIN_AB10 -to SRAM_ADDR[1]
+set_location_assignment PIN_AA13 -to SRAM_ADDR[0]
+set_location_assignment PIN_AB13 -to SRAM_ADDR[18]
+set_location_assignment PIN_AB14 -to SRAM_ADDR[17]
+set_location_assignment PIN_AA14 -to SRAM_ADDR[16]
+set_location_assignment PIN_AB15 -to SRAM_ADDR[15]
+set_location_assignment PIN_AA15 -to SRAM_OE_N
+set_location_assignment PIN_AA16 -to SRAM_DATA[7]
+set_location_assignment PIN_AB16 -to SRAM_DATA[6]
+set_location_assignment PIN_AB12 -to GPIO0_CLKIN[0]
+set_location_assignment PIN_AA12 -to GPIO0_CLKIN[1]
+set_location_assignment PIN_AB3 -to GPIO0_CLKOUT[0]
+set_location_assignment PIN_AA3 -to GPIO0_CLKOUT[1]
+set_location_assignment PIN_AA11 -to GPIO1_CLKIN[1]
+set_location_assignment PIN_AB11 -to GPIO1_CLKIN[0]
+set_location_assignment PIN_T16 -to GPIO1_CLKOUT[1]
+set_location_assignment PIN_R16 -to GPIO1_CLKOUT[0]
+set_location_assignment PIN_V7 -to GPIO1_D[31]
+set_location_assignment PIN_V6 -to GPIO1_D[30]
+set_location_assignment PIN_U8 -to GPIO1_D[29]
+set_location_assignment PIN_Y7 -to GPIO1_D[28]
+set_location_assignment PIN_T9 -to GPIO1_D[27]
+set_location_assignment PIN_U9 -to GPIO1_D[26]
+set_location_assignment PIN_T10 -to GPIO1_D[25]
+set_location_assignment PIN_U10 -to GPIO1_D[24]
+set_location_assignment PIN_R12 -to GPIO1_D[23]
+set_location_assignment PIN_R11 -to GPIO1_D[22]
+set_location_assignment PIN_T12 -to GPIO1_D[21]
+set_location_assignment PIN_U12 -to GPIO1_D[20]
+set_location_assignment PIN_R14 -to GPIO1_D[19]
+set_location_assignment PIN_T14 -to GPIO1_D[18]
+set_location_assignment PIN_AB7 -to GPIO1_D[17]
+set_location_assignment PIN_AA7 -to GPIO1_D[16]
+set_location_assignment PIN_AA9 -to GPIO1_D[15]
+set_location_assignment PIN_AB9 -to GPIO1_D[14]
+set_location_assignment PIN_V15 -to GPIO1_D[13]
+set_location_assignment PIN_W15 -to GPIO1_D[12]
+set_location_assignment PIN_T15 -to GPIO1_D[11]
+set_location_assignment PIN_U15 -to GPIO1_D[10]
+set_location_assignment PIN_W17 -to GPIO1_D[9]
+set_location_assignment PIN_Y17 -to GPIO1_D[8]
+set_location_assignment PIN_AB17 -to GPIO1_D[7]
+set_location_assignment PIN_AA17 -to GPIO1_D[6]
+set_location_assignment PIN_AA18 -to GPIO1_D[5]
+set_location_assignment PIN_AB18 -to GPIO1_D[4]
+set_location_assignment PIN_AB19 -to GPIO1_D[3]
+set_location_assignment PIN_AA19 -to GPIO1_D[2]
+set_location_assignment PIN_AB20 -to GPIO1_D[1]
+set_location_assignment PIN_AA20 -to GPIO1_D[0]
+set_location_assignment PIN_P22 -to PS2_KBCLK
+set_location_assignment PIN_P21 -to PS2_KBDAT
+set_location_assignment PIN_R21 -to PS2_MSCLK
+set_location_assignment PIN_R22 -to PS2_MSDAT
+set_location_assignment PIN_U22 -to UART_RXD
+set_location_assignment PIN_U21 -to UART_TXD
+set_location_assignment PIN_V22 -to UART_RTS
+set_location_assignment PIN_V21 -to UART_CTS
+set_location_assignment PIN_Y21 -to SD_CLK
+set_location_assignment PIN_Y22 -to SD_CMD
+set_location_assignment PIN_AA22 -to SD_DAT0
+set_location_assignment PIN_W21 -to SD_DAT3
+set_location_assignment PIN_W20 -to SD_WP_N
+set_location_assignment PIN_C20 -to LCD_DATA[7]
+set_location_assignment PIN_D20 -to LCD_DATA[6]
+set_location_assignment PIN_B21 -to LCD_DATA[5]
+set_location_assignment PIN_B22 -to LCD_DATA[4]
+set_location_assignment PIN_C21 -to LCD_DATA[3]
+set_location_assignment PIN_C22 -to LCD_DATA[2]
+set_location_assignment PIN_D21 -to LCD_DATA[1]
+set_location_assignment PIN_D22 -to LCD_DATA[0]
+set_location_assignment PIN_E22 -to LCD_RW
+set_location_assignment PIN_F22 -to LCD_RS
+set_location_assignment PIN_E21 -to LCD_EN
+set_location_assignment PIN_F21 -to LCD_BLON
+set_location_assignment PIN_J21 -to VGA_G[3]
+set_location_assignment PIN_K17 -to VGA_G[2]
+set_location_assignment PIN_J17 -to VGA_G[1]
+set_location_assignment PIN_H22 -to VGA_G[0]
+set_location_assignment PIN_L21 -to VGA_HS
+set_location_assignment PIN_L22 -to VGA_VS
+set_location_assignment PIN_H21 -to VGA_R[3]
+set_location_assignment PIN_H20 -to VGA_R[2]
+set_location_assignment PIN_H17 -to VGA_R[1]
+set_location_assignment PIN_H19 -to VGA_R[0]
+set_location_assignment PIN_K18 -to VGA_B[3]
+set_location_assignment PIN_J22 -to VGA_B[2]
+set_location_assignment PIN_K21 -to VGA_B[1]
+set_location_assignment PIN_K22 -to VGA_B[0]
+set_location_assignment PIN_G21 -to CLOCK_50
+set_location_assignment PIN_E11 -to HEX0_D[0]
+set_location_assignment PIN_F11 -to HEX0_D[1]
+set_location_assignment PIN_H12 -to HEX0_D[2]
+set_location_assignment PIN_H13 -to HEX0_D[3]
+set_location_assignment PIN_G12 -to HEX0_D[4]
+set_location_assignment PIN_F12 -to HEX0_D[5]
+set_location_assignment PIN_F13 -to HEX0_D[6]
+set_location_assignment PIN_D13 -to HEX0_DP
+set_location_assignment PIN_A15 -to HEX1_D[6]
+set_location_assignment PIN_E14 -to HEX1_D[5]
+set_location_assignment PIN_B14 -to HEX1_D[4]
+set_location_assignment PIN_A14 -to HEX1_D[3]
+set_location_assignment PIN_C13 -to HEX1_D[2]
+set_location_assignment PIN_B13 -to HEX1_D[1]
+set_location_assignment PIN_A13 -to HEX1_D[0]
+set_location_assignment PIN_B15 -to HEX1_DP
+set_location_assignment PIN_F14 -to HEX2_D[6]
+set_location_assignment PIN_B17 -to HEX2_D[5]
+set_location_assignment PIN_A17 -to HEX2_D[4]
+set_location_assignment PIN_E15 -to HEX2_D[3]
+set_location_assignment PIN_B16 -to HEX2_D[2]
+set_location_assignment PIN_A16 -to HEX2_D[1]
+set_location_assignment PIN_D15 -to HEX2_D[0]
+set_location_assignment PIN_A18 -to HEX2_DP
+set_location_assignment PIN_G15 -to HEX3_D[6]
+set_location_assignment PIN_D19 -to HEX3_D[5]
+set_location_assignment PIN_C19 -to HEX3_D[4]
+set_location_assignment PIN_B19 -to HEX3_D[3]
+set_location_assignment PIN_A19 -to HEX3_D[2]
+set_location_assignment PIN_F15 -to HEX3_D[1]
+set_location_assignment PIN_B18 -to HEX3_D[0]
+set_location_assignment PIN_G16 -to HEX3_DP
+set_location_assignment PIN_G8 -to DRAM_CAS_N
+set_location_assignment PIN_G7 -to DRAM_CS_N
+set_location_assignment PIN_E5 -to DRAM_CLK
+set_location_assignment PIN_E6 -to DRAM_CKE
+set_location_assignment PIN_B5 -to DRAM_BA_0
+set_location_assignment PIN_A4 -to DRAM_BA_1
+set_location_assignment PIN_F10 -to DRAM_DQ[15]
+set_location_assignment PIN_E10 -to DRAM_DQ[14]
+set_location_assignment PIN_A10 -to DRAM_DQ[13]
+set_location_assignment PIN_B10 -to DRAM_DQ[12]
+set_location_assignment PIN_C10 -to DRAM_DQ[11]
+set_location_assignment PIN_A9 -to DRAM_DQ[10]
+set_location_assignment PIN_B9 -to DRAM_DQ[9]
+set_location_assignment PIN_A8 -to DRAM_DQ[8]
+set_location_assignment PIN_F8 -to DRAM_DQ[7]
+set_location_assignment PIN_H9 -to DRAM_DQ[6]
+set_location_assignment PIN_G9 -to DRAM_DQ[5]
+set_location_assignment PIN_F9 -to DRAM_DQ[4]
+set_location_assignment PIN_E9 -to DRAM_DQ[3]
+set_location_assignment PIN_H10 -to DRAM_DQ[2]
+set_location_assignment PIN_G10 -to DRAM_DQ[1]
+set_location_assignment PIN_D10 -to DRAM_DQ[0]
+set_location_assignment PIN_E7 -to DRAM_LDQM
+set_location_assignment PIN_B8 -to DRAM_UDQM
+set_location_assignment PIN_F7 -to DRAM_RAS_N
+set_location_assignment PIN_D6 -to DRAM_WE_N
+set_location_assignment PIN_B12 -to CLOCK_50_2
+set_location_assignment PIN_C8 -to DRAM_ADDR[12]
+set_location_assignment PIN_A7 -to DRAM_ADDR[11]
+set_location_assignment PIN_B4 -to DRAM_ADDR[10]
+set_location_assignment PIN_B7 -to DRAM_ADDR[9]
+set_location_assignment PIN_C7 -to DRAM_ADDR[8]
+set_location_assignment PIN_A6 -to DRAM_ADDR[7]
+set_location_assignment PIN_B6 -to DRAM_ADDR[6]
+set_location_assignment PIN_C6 -to DRAM_ADDR[5]
+set_location_assignment PIN_A5 -to DRAM_ADDR[4]
+set_location_assignment PIN_C3 -to DRAM_ADDR[3]
+set_location_assignment PIN_B3 -to DRAM_ADDR[2]
+set_location_assignment PIN_A3 -to DRAM_ADDR[1]
+set_location_assignment PIN_C4 -to DRAM_ADDR[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_CTS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RXD
diff --git a/rtl/boards/tinyfpga_b2/apple1_hx8k.v b/rtl/boards/tinyfpga_b2/apple1_hx8k.v
index 9e98263..0a584a6 100644
--- a/rtl/boards/tinyfpga_b2/apple1_hx8k.v
+++ b/rtl/boards/tinyfpga_b2/apple1_hx8k.v
@@ -85,7 +85,6 @@ module apple1_top #(
         .uart_rx(pin11),
         .uart_tx(pin12),
         .uart_cts(pin13),        
-        .clr_screen_btn(button[1]),
         .vga_h_sync(pin4),
         .vga_v_sync(pin5),
         .vga_red(vga_red),
diff --git a/tools/iverilog/vga_tb.v b/tools/iverilog/vga_tb.v
index 6fb81bd..a1f8168 100644
--- a/tools/iverilog/vga_tb.v
+++ b/tools/iverilog/vga_tb.v
@@ -88,8 +88,7 @@ module vga_tb;
         .vga_blu(vga_blu),
         .address(address),
         .w_en(w_en),
-        .din(din),
-        .blink_clken(blink_clken)
+        .din(din)
     );
 
 endmodule