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fiddled the vga module a little
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@ -4,9 +4,9 @@ module vga(
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input in_stb,
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output vga_h_sync,
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output vga_v_sync,
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output reg vga_red,
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output reg vga_grn,
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output reg vga_blu
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output vga_red,
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output vga_grn,
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output vga_blu
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);
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reg [5:0] v_ram[0:959] /* synthesis syn_ramstyle = "block_ram" */;
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@ -94,28 +94,55 @@ module vga(
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end
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end
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reg out;
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assign vga_red = out;
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assign vga_grn = out;
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assign vga_blu = out;
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always @(posedge clk25)
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begin
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if (~(vga_h_act && vga_v_act))
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begin
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// outside display area
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vga_red = 0;
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case ({vga_h_act, vga_v_act})
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default:
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begin
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// outside display area
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out = 1'b0;
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end
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end else begin
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// inside display area
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2'b11:
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begin
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// inside display frame
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case (vdot)
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5'b00000,
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5'b00001,
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5'b00010,
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5'b00011,
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5'b10010,
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5'b10011:
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// blank row for spacing
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out = 1'b0;
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if (vdot[4:1] == 0 || vdot[4:1] == 1 || vdot[4:1] == 9 || hdot[3:1] == 0 || hdot[3:1] == 6 || hdot[3:1] == 7)
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vga_red = 0;
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else
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vga_red = c_rom[(v_ram[hpos + (vpos * 40)] * 7) + (vdot[4:1] - 2)][5 - hdot[3:1]];
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default:
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case (hdot)
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4'b0000,
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4'b0001,
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4'b1100,
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4'b1101,
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4'b1110,
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4'b1111:
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// blank column for spacing
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out = 1'b0;
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end
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vga_grn = vga_red;
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vga_blu = vga_red;
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default:
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// into character pixels
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// TODO: fix this mess
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out = c_rom[(v_ram[hpos + (vpos * 40)] * 7) + (vdot[4:1] - 2)][5 - hdot[3:1]];
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endcase
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endcase
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end
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endcase
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end
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// FIXME: This is horrible
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reg [5:0] cur_pos;
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reg stb;
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always @(posedge clk25)
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