#-- Synopsys, Inc.
#-- Project file Z:\boards\tinyfpga_bx\\icecube2\icecube2_syn.prj
#project files
add_file -verilog -lib work "../../../../rtl/apple1.v"
add_file -verilog -lib work "../../../../rtl/clock.v"
add_file -verilog -lib work "../../../../rtl/pwr_reset.v"
add_file -verilog -lib work "../../../../rtl/ram.v"
add_file -verilog -lib work "../../../../rtl/rom_basic.v"
add_file -verilog -lib work "../../../../rtl/rom_wozmon.v"
add_file -verilog -lib work "../../../../rtl/boards/tinyfpga_bx/apple1_hx8k.v"
add_file -verilog -lib work "../../../../rtl/boards/tinyfpga_bx/clock_pll.v"
add_file -verilog -lib work "../../../../rtl/cpu/arlet_6502.v"
add_file -verilog -lib work "../../../../rtl/cpu/arlet/ALU.v"
add_file -verilog -lib work "../../../../rtl/cpu/arlet/cpu.v"
add_file -verilog -lib work "../../../../rtl/ps2keyboard/debounce.v"
add_file -verilog -lib work "../../../../rtl/ps2keyboard/ps2keyboard.v"
add_file -verilog -lib work "../../../../rtl/uart/async_tx_rx.v"
add_file -verilog -lib work "../../../../rtl/uart/uart.v"
add_file -verilog -lib work "../../../../rtl/vga/font_rom.v"
add_file -verilog -lib work "../../../../rtl/vga/vga.v"
add_file -verilog -lib work "../../../../rtl/vga/vram.v"

#implementation: "icecube2_Implmnt"
impl -add icecube2_Implmnt -type fpga

#implementation attributes
set_option -vlog_std v2001
set_option -project_relative_includes 1

#device options
set_option -technology SBTiCE40
set_option -part iCE40LP8K
set_option -package CM81
set_option -speed_grade 
set_option -part_companion ""

#compilation/mapping options

# mapper_options
set_option -frequency auto
set_option -write_verilog 0
set_option -write_vhdl 0

# Silicon Blue iCE40
set_option -maxfan 10000
set_option -disable_io_insertion 0
set_option -pipe 1
set_option -retiming 0
set_option -update_models_cp 0
set_option -fixgatedclocks 2
set_option -fixgeneratedclocks 0

# NFilter
set_option -popfeed 0
set_option -constprop 0
set_option -createhierarchy 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_format "edif"
project -result_file ./icecube2_Implmnt/icecube2.edf
project -log_file "./icecube2_Implmnt/icecube2.srr"
impl -active "icecube2_Implmnt"
project -run synthesis -clean