38 lines
1.5 KiB
Markdown
38 lines
1.5 KiB
Markdown
# iCE40UP5K support
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![UPDuino v1 board photo](images/upduino_v1.jpg)
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![UPDuino v2 board photo](images/upduino_v2.jpg)
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This board directory builds for the iCE40UP5K in the QFN48 (SG48) package. iCE40UP5K SG48 is the part used on the [Gnarly Grey UPDuino Mini board](http://gnarlygrey.atspace.cc/development-platform.html).
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## Peripheral support
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So far only UART is tested and supported. Three bits of the PC monitor bus are mapped to the dedicated LED drivers to give some indication of the currently running code.
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VGA is brought out to pins but have not been tested.
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PS/2, button, and TM1638 front panel are not supported.
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At this time, all ROM and RAM are mapped as block RAM, and arachne-pnr reports that 28/30 BRAMs are utilized. If larger ROMs or more RAM is needed, RAM should be moved to SPRAM instead.
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The on-chip oscillator and PLL are used to generate the 25MHz clock used by the design.
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See the .pcf for pin connections. Note that the iCE40UP5K pin numbers in the .pcf correspond to the UPDuino pin silkscreen labels.
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## Building
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Install a recent IceStorm toolchain, and:
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```
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$ cd yosys
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$ make
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```
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## Use
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Flash using your method of choice. Attach a 3.3V serial connection to uart_tx (output to PC) and uart_rx (input from PC). Start a terminal at 115200,n,8,1.
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Toggling CRESET_B restarts to the Woz monitor.
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The Woz monitor is a simple hex debugger. To run BASIC, type: "E000R". Note that both BASIC and the monitor require commands to be input as caps.
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