verilog-apple-one/boards at 04323a625695dbba044e2760353eb1c0a559d03d - verilog-apple-one - Applefritter: Git

Apple-1-HW/verilog-apple-one

mirror of https://github.com/alangarf/apple-one.git synced 2025-02-20 08:28:58 +00:00

History

Alan Garfield 04323a6256 more moving around, added params for hex files

2018-01-27 14:27:10 +11:00

..

more moving around, added params for hex files

2018-01-27 14:27:10 +11:00

Added timing constraints and pin assignments to DE0 board. Integrated the 1MHz clock enable signal into the core top level. Top level now requires a 25MHz clock signal.

2018-01-26 22:38:46 +01:00