verilog-apple-one/boards at 0ca73c561a5f4f229b6358ddaa2bba1161684fb8 - verilog-apple-one - Applefritter: Git

Apple-1-HW/verilog-apple-one

mirror of https://github.com/alangarf/apple-one.git synced 2025-08-07 15:25:53 +00:00

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Alan Garfield 0ca73c561a fixed project path for HX8K

2018-01-27 13:58:03 +11:00

..

fixed project path for HX8K

2018-01-27 13:58:03 +11:00

Added timing constraints and pin assignments to DE0 board. Integrated the 1MHz clock enable signal into the core top level. Top level now requires a 25MHz clock signal.

2018-01-26 22:38:46 +01:00