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24 lines
413 B
Verilog
24 lines
413 B
Verilog
module rom_wozmon(
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input clk,
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input [7:0] address,
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output reg [7:0] dout
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);
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`ifdef SIM
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parameter ROM_FILENAME = "../roms/wozmon.hex";
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`else
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parameter ROM_FILENAME = "../../roms/wozmon.hex";
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`endif
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reg [7:0] rom_data[0:255];
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initial
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$readmemh(ROM_FILENAME, rom_data, 0, 255);
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always @(posedge clk)
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dout <= rom_data[address];
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endmodule
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