verilog-apple-one/roms
2018-02-05 00:12:06 +11:00
..
basic.hex moved sources into rtl to clean up root 2018-01-12 13:40:44 +11:00
ram.hex moved sources into rtl to clean up root 2018-01-12 13:40:44 +11:00
vga_font.bin wip of the pipeline VGA module. stupid yosys bug, but testbench looks ok 2018-02-05 00:12:06 +11:00
vga_vram.bin wip of the pipeline VGA module. stupid yosys bug, but testbench looks ok 2018-02-05 00:12:06 +11:00
wozmon.hex more moving around, added params for hex files 2018-01-27 14:27:10 +11:00