verilog-apple-one/apple1_syn.prd
Alan Garfield 158510c299 Added basic ROM and fiddled things
Clock now runs at 6MHz while I try to simplify things to figure out a
CPU bug
2018-01-10 16:39:18 +11:00

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#-- Synopsys, Inc.
#-- Version L-2016.09L+ice40
#-- Project file C:\Users\Alan\Desktop\projects\apple1\apple1_syn.prd
#-- Written on Thu Jan 04 21:48:56 2018
#
### Watch Implementation type ###
#
watch_impl -all
#
### Watch Implementation properties ###
#
watch_prop -clear