mirror of
https://github.com/alangarf/apple-one.git
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7a7b165888
This adds support for simulating the two testbenches. Tested with
icarus, modelsim, isim or xsim. Default is icarus
fusesoc run --target=$target --tool=$tool apple-one
where $target is apple1_tb or vga_tb and $tool is icarus,isim,modelsim or xsim
It also adds targets for building for the de0 and tinyfpga_b2 boards
fusesoc build --target={de0,tinyfpga_b2} apple-one
All ROM and ROM files can be overriden on the command-line, e.g.
fusesoc build --target=de0 apple-one --BASIC_FILENAME=/path/to/file.hex
Use fusesoc build --target=$target apple-one --help to see all
parameters
137 lines
3.8 KiB
Plaintext
137 lines
3.8 KiB
Plaintext
CAPI=2:
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name : ::apple-one:0
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filesets:
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cpu:
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files:
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- rtl/cpu/arlet/cpu.v
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- rtl/cpu/arlet/ALU.v
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- rtl/cpu/arlet_6502.v
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file_type : verilogSource
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main:
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files:
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- roms/basic.hex: {copyto : basic.hex , is_include_file : true}
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- rtl/rom_basic.v
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- rtl/apple1.v
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- roms/wozmon.hex: {copyto : wozmon.hex, is_include_file : true}
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- rtl/rom_wozmon.v
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- roms/ram.hex: {copyto : ram.hex , is_include_file : true}
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- rtl/ram.v
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file_type : verilogSource
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ps2keyboard:
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files:
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- rtl/ps2keyboard/debounce.v
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- rtl/ps2keyboard/ps2keyboard.v
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file_type : verilogSource
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synth:
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files:
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- rtl/pwr_reset.v
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- rtl/clock.v
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file_type : verilogSource
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vga:
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files:
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- roms/vga_font_bitreversed.hex: {copyto : vga_font_bitreversed.hex, is_include_file : true}
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- roms/vga_vram.bin: {copyto : vga_vram.bin, is_include_file : true}
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- rtl/vga/vram.v
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- rtl/vga/vga.v
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- rtl/vga/font_rom.v
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file_type : verilogSource
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uart:
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files:
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- rtl/uart/uart.v
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- rtl/uart/async_tx_rx.v
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file_type : verilogSource
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de0:
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files:
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- rtl/boards/terasic_de0/segmentdisplay.v : {file_type : verilogSource}
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- boards/terasic_de0/Quartus/apple-one.sdc : {file_type : SDC}
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- boards/terasic_de0/Quartus/options.tcl : {file_type : tclSource}
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- boards/terasic_de0/Quartus/pinmap.tcl : {file_type : tclSource}
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- rtl/boards/terasic_de0/apple1_de0_top.v : {file_type : verilogSource}
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apple1_tb:
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files:
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- tools/iverilog/apple1_tb.v
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file_type : verilogSource
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tinyfpga_b2:
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files:
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- boards/tinyfpga_b2/yosys/tinyfpga.pcf : {file_type : PCF}
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- rtl/boards/tinyfpga_b2/clock_pll.v
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- rtl/boards/tinyfpga_b2/apple1_hx8k.v
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file_type : verilogSource
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vga_tb:
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files:
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- tools/iverilog/vga_tb.v
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file_type : verilogSource
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targets:
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de0:
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default_tool : quartus
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filesets: [cpu, main, synth, ps2keyboard, uart, vga, de0]
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parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
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tools:
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quartus:
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family : "Cyclone III"
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device : EP3C16F484C6
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toplevel: [apple1_de0_top]
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apple1_tb:
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default_tool : icarus
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filesets : [cpu, main, synth, ps2keyboard, uart, vga, apple1_tb]
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parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
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toplevel : [apple1_tb]
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tools:
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icarus:
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iverilog_options : [-DSIM]
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modelsim:
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vlog_options : [+define+SIM]
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tinyfpga_b2:
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default_tool : icestorm
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filesets : [main, synth, cpu, uart, vga, ps2keyboard, tinyfpga_b2]
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parameters : [BASIC_FILENAME, FONT_ROM_FILENAME, RAM_FILENAME, VRAM_FILENAME, WOZMON_ROM_FILENAME]
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toplevel : [apple1_top]
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tools:
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icestorm :
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arachne_pnr_options : [-d, 8k, -P, cm81]
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vga_tb:
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default_tool : icarus
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filesets : [vga, vga_tb]
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toplevel : [vga_tb]
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parameters:
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BASIC_FILENAME:
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datatype : file
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default : basic.hex
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description : BASIC interpreter ROM (hex format)
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paramtype : vlogparam
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scope : private
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FONT_ROM_FILENAME:
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datatype : file
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default : vga_font_bitreversed.hex
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description : Font ROM (hex format)
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paramtype : vlogparam
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scope : private
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RAM_FILENAME:
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datatype : file
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default : ram.hex
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description : Initial RAM contents (hex format)
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paramtype : vlogparam
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scope : private
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VRAM_FILENAME:
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datatype : file
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default : vga_vram.bin
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description : Initial Video RAM contents (bin format)
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paramtype : vlogparam
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scope : private
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WOZMON_ROM_FILENAME:
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datatype : file
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default : wozmon.hex
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description : WozMon ROM (hex format)
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paramtype : vlogparam
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scope : private
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