mirror of
https://github.com/nippur72/apple1-videocard-lib.git
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125 lines
4.1 KiB
C
125 lines
4.1 KiB
C
#pragma encoding(ascii) // encode strings in plain ascii
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#ifdef APPLE1
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const byte *VDP_DATA = 0xCC00; // TMS9918 data port (VRAM)
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const byte *VDP_REG = 0xCC01; // TMS9918 register port (write) or status (read)
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#else
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const byte *VDP_DATA = 0xA000; // TMS9918 data port (VRAM)
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const byte *VDP_REG = 0xA001; // TMS9918 register port (write) or status (read)
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#endif
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// control port bits
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const byte WRITE_TO_VRAM = 0b01000000; // write to VRAM command
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const byte READ_FROM_VRAM = 0b00000000; // read from VRAM command
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const byte HIADDRESS_MASK = 0b00111111; // bit mask for the high byte of the address
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const byte WRITE_TO_REG = 0b10000000; // write to register command
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const byte REGNUM_MASK = 0b00000111; // bit mask for register number (0-7)
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// register 0 masks
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const byte REG0_M3_MASK = 0b00000010;
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const byte REG0_EXTVID_MASK = 0b00000001;
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// register 1 masks
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const byte REG1_16K_MASK = 0b10000000;
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const byte REG1_BLANK_MASK = 0b01000000;
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const byte REG1_IE_MASK = 0b00100000;
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const byte REG1_M1M2_MASK = 0b00011000;
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const byte REG1_UNUSED_MASK = 0b00000100;
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const byte REG1_SIZE_MASK = 0b00000010;
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const byte REG1_MAG_MASK = 0b00000001;
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// TMS9918 color palette
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const byte COLOR_TRANSPARENT = 0x0;
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const byte COLOR_BLACK = 0x1;
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const byte COLOR_MEDIUM_GREEN = 0x2;
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const byte COLOR_LIGHT_GREEN = 0x3;
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const byte COLOR_DARK_BLUE = 0x4;
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const byte COLOR_LIGHT_BLUE = 0x5;
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const byte COLOR_DARK_RED = 0x6;
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const byte COLOR_CYAN = 0x7;
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const byte COLOR_MEDIUM_RED = 0x8;
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const byte COLOR_LIGHT_RED = 0x9;
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const byte COLOR_DARK_YELLOW = 0xA;
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const byte COLOR_LIGHT_YELLOW = 0xB;
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const byte COLOR_DARK_GREEN = 0xC;
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const byte COLOR_MAGENTA = 0xD;
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const byte COLOR_GREY = 0xE;
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const byte COLOR_WHITE = 0xF;
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// macro for combining foreground and background into a single byte value
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#define FG_BG(f,b) (((f)<<4)|(b))
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// status register bits (read only)
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#define FRAME_BIT(a) ((a) & 0b10000000)
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#define FIVESPR_BIT(a) ((a) & 0b01000000)
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#define COLLISION_BIT(a) ((a) & 0b00100000)
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#define SPRITE_NUM(a) ((a) & 0b00011111)
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// read/write to TMS9918 macros
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#define TMS_WRITE_CTRL_PORT(a) (*VDP_REG=(byte)(a))
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#define TMS_WRITE_DATA_PORT(a) (*VDP_DATA=(byte)(a))
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#define TMS_READ_CTRL_PORT (*VDP_REG);
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#define TMS_READ_DATA_PORT (*VDP_DATA);
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// sets the VRAM address on the TMS9918 for a write operation
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void tms_set_vram_write_addr(word addr) {
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TMS_WRITE_CTRL_PORT(LOBYTE(addr));
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TMS_WRITE_CTRL_PORT((HIBYTE(addr) & HIADDRESS_MASK)|WRITE_TO_VRAM);
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}
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// sets the VRAM address on the TMS9918 for a read operation
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void tms_set_vram_read_addr(word addr) {
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TMS_WRITE_CTRL_PORT(LOBYTE(addr));
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TMS_WRITE_CTRL_PORT((HIBYTE(addr) & HIADDRESS_MASK)|READ_FROM_VRAM);
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}
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// buffer containing the last register values, because TMS registers are write only
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byte tms_regs_latch[8];
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// writes a value to a TMS9918 register (0-7)
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void tms_write_reg(byte regnum, byte val) {
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TMS_WRITE_CTRL_PORT(val);
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TMS_WRITE_CTRL_PORT((regnum & REGNUM_MASK)|WRITE_TO_REG);
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tms_regs_latch[regnum] = val; // save value to buffer
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}
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// sets border color and background for mode 0
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inline void tms_set_color(byte col) {
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tms_write_reg(7, col);
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}
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// initialize all registers from a table
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void tms_init_regs(byte *table) {
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for(byte i=0;i<8;i++) {
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tms_write_reg(i, table[i]);
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}
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}
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const byte INTERRUPT_ENABLED = 1;
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const byte INTERRUPT_DISABLED = 0;
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// sets the interrupt enable bit on register 1
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void tms_set_interrupt_bit(byte val) {
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byte regvalue = tms_regs_latch[1] & (~REG1_IE_MASK);
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if(val) regvalue |= REG1_IE_MASK;
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tms_write_reg(1, regvalue);
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}
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const byte BLANK_ON = 0;
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const byte BLANK_OFF = 1;
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// sets the blank bit on register 1
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void tms_set_blank(byte val) {
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byte regvalue = tms_regs_latch[1] & (~REG1_BLANK_MASK);
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if(val) regvalue |= REG1_BLANK_MASK;
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tms_write_reg(1, regvalue);
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}
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// sets the external video input bit on register 0
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void tms_set_external_video(byte val) {
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byte regvalue = tms_regs_latch[0] & (~REG0_EXTVID_MASK);
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if(val) regvalue |= REG0_EXTVID_MASK;
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tms_write_reg(0, regvalue);
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}
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