2023-08-06 01:27:57 +00:00
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/* Copyright 2010-2023 Will Scullin <scullin@scullinsteel.com>
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation. No representations are made about the suitability of this
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* software for any purpose. It is provided "as is" without express or
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* implied warranty.
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*/
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2023-08-06 14:32:11 +00:00
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import { base64_decode, base64_encode } from './base64';
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import { allocMemPages } from './util';
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2023-11-22 21:52:40 +00:00
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import type { byte, memory } from '@whscullin/cpu6502';
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2023-08-06 01:27:57 +00:00
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export interface RAMState {
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start: byte;
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end: byte;
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mem: string;
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}
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export default class RAM {
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2023-11-22 21:52:40 +00:00
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mem: memory;
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2023-08-06 01:27:57 +00:00
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2023-08-19 22:07:00 +00:00
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constructor(
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private start_page: byte,
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private end_page: byte,
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) {
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2023-08-06 01:27:57 +00:00
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this.mem = allocMemPages(end_page - start_page + 1);
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2023-08-06 14:32:11 +00:00
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for (let page = 0; page <= end_page; page++) {
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for (let off = 0; off < 0x100; off++) {
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2023-08-06 01:27:57 +00:00
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this.mem[page * 0x100 + off] = 0; // Math.floor(Math.random()*256);
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}
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}
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}
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start() {
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return this.start_page;
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}
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end() {
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return this.end_page;
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}
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read(page: byte, off: byte) {
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return this.mem[(page - this.start_page) * 0x100 + off];
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}
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write(page: byte, off: byte, val: byte) {
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this.mem[(page - this.start_page) * 0x100 + off] = val;
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}
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getState(): RAMState {
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return {
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start: this.start_page,
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end: this.end_page,
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mem: base64_encode(this.mem),
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};
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}
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setState(state: RAMState) {
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this.start_page = state.start;
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this.end_page = state.end;
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this.mem = base64_decode(state.mem);
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}
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}
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