565 lines
23 KiB
Go
565 lines
23 KiB
Go
package vm
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import (
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"errors"
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)
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// operation includes the name of the operation, it's 8 bit hexidecimal opcode, how
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// many bytes it occupies (it's size), as well as it's addressing mode.
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type operation struct {
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name string
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opcode byte
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size byte
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addrMode addrMode
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exec func(a *VM, op operation) error
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}
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func newOp(name string, opcode, size byte, addrMode addrMode, exec func(a *VM, op operation) error) operation {
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return operation{
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name: name,
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opcode: opcode,
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size: size,
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addrMode: addrMode,
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exec: exec,
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}
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}
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// operationByCode takes an opcode (a single byte/word) and returns the associated operation
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func operationByCode(b byte) (operation, error) {
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o, ok := opcodes[b]
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if !ok {
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return operation{}, errors.New("unknown opcode")
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}
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return o, nil
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}
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// opcodes represent all of the Apple 1 opcodes available. Each 8 bit opcode is mapped to a corresponding
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// "op" which is just a struct holding metadata about the operation.
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var opcodes = map[byte]operation{
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// BRK Force Break
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied BRK 00 1 7
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0x00: newOp("BRK", 0x00, 1, implied, execBRK),
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// RTI Return from Interrupt
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied RTI 40 1 6
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0x40: newOp("RTI", 0x40, 1, implied, execRTI),
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// DEC Decrement Memory by One
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// zeropage DEC oper C6 2 5
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// zeropage,X DEC oper,X D6 2 6
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// absolute DEC oper CE 3 6
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// absolute,X DEC oper,X DE 3 7
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0xC6: newOp("DEC", 0xC6, 2, zeroPage, execDEC),
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0xD6: newOp("DEC", 0xD6, 2, zeroPageXIndexed, execDEC),
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0xCE: newOp("DEC", 0xCE, 3, absolute, execDEC),
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0xDE: newOp("DEC", 0xDE, 3, absoluteXIndexed, execDEC),
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// INC Increment Memory by One
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// zeropage INC oper E6 2 5
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// zeropage,X INC oper,X F6 2 6
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// absolute INC oper EE 3 6
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// absolute,X INC oper,X FE 3 7
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0xE6: newOp("INC", 0xE6, 2, zeroPage, execINC),
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0xF6: newOp("INC", 0xF6, 2, zeroPageXIndexed, execINC),
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0xEE: newOp("INC", 0xEE, 3, absolute, execINC),
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0xFE: newOp("INC", 0xFE, 3, absoluteXIndexed, execINC),
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// INX Increment Index X by One
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied INX E8 1 2
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0xE8: newOp("INX", 0xE8, 1, implied, execINX),
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// INY Increment Index Y by One
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied INY C8 1 2
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0xC8: newOp("INY", 0xC8, 1, implied, execINY),
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// TAX Transfer Accumulator to Index X
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied TAX AA 1 2
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0xAA: newOp("TAX", 0xAA, 1, implied, execTAX),
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// TAY Transfer Accumulator to Index Y
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied TAY A8 1 2
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0xA8: newOp("TAY", 0xA8, 1, implied, execTAY),
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// DEX Decrement Index X by One
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied DEC CA 1 2
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0xCA: newOp("DEX", 0xCA, 1, implied, execDEX),
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// DEY Decrement Index Y by One
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied DEC 88 1 2
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0x88: newOp("DEY", 0x88, 1, implied, execDEY),
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// LDA Load Accumulator with Memory
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate LDA #oper A9 2 2
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// zeropage LDA oper A5 2 3
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// zeropage,X LDA oper,X B5 2 4
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// absolute LDA oper AD 3 4
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// absolute,X LDA oper,X BD 3 4*
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// absolute,Y LDA oper,Y B9 3 4*
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// (indirect,X) LDA (oper,X) A1 2 6
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// (indirect),Y LDA (oper),Y B1 2 5*
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0xA9: newOp("LDA", 0xA9, 2, immediate, execLDA),
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0xA5: newOp("LDA", 0xA5, 2, zeroPage, execLDA),
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0xB5: newOp("LDA", 0xB5, 2, zeroPageXIndexed, execLDA),
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0xAD: newOp("LDA", 0xAD, 3, absolute, execLDA),
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0xBD: newOp("LDA", 0xBD, 3, absoluteXIndexed, execLDA),
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0xB9: newOp("LDA", 0xB9, 3, absoluteYIndexed, execLDA),
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0xA1: newOp("LDA", 0xA1, 2, indirectXIndexed, execLDA),
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0xB1: newOp("LDA", 0xB1, 2, indirectYIndexed, execLDA),
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// LDX Load Index X with Memory
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate LDX #oper A2 2 2
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// zeropage LDX oper A6 2 3
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// zeropage,Y LDX oper,Y B6 2 4
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// absolute LDX oper AE 3 4
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// absolute,Y LDX oper,Y BE 3 4*
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0xA2: newOp("LDX", 0xA2, 2, immediate, execLDX),
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0xA6: newOp("LDX", 0xA6, 2, zeroPage, execLDX),
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0xB6: newOp("LDX", 0xB6, 2, zeroPageYIndexed, execLDX),
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0xAE: newOp("LDX", 0xAE, 3, absolute, execLDX),
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0xBE: newOp("LDX", 0xBE, 3, absoluteYIndexed, execLDX),
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// LDY Load Index Y with Memory
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate LDY #oper A0 2 2
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// zeropage LDY oper A4 2 3
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// zeropage,X LDY oper,X B4 2 4
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// absolute LDY oper AC 3 4
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// absolute,X LDY oper,X BC 3 4*
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0xA0: newOp("LDY", 0xA0, 2, immediate, execLDY),
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0xA4: newOp("LDY", 0xA4, 2, zeroPage, execLDY),
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0xB4: newOp("LDY", 0xB4, 2, zeroPageXIndexed, execLDY),
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0xAC: newOp("LDY", 0xAC, 3, absolute, execLDY),
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0xBC: newOp("LDY", 0xBC, 3, absoluteXIndexed, execLDY),
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// ADC Add Memory to Accumulator with Carry
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate ADC #oper 69 2 2
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// zeropage ADC oper 65 2 3
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// zeropage,X ADC oper,X 75 2 4
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// absolute ADC oper 6D 3 4
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// absolute,X ADC oper,X 7D 3 4*
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// absolute,Y ADC oper,Y 79 3 4*
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// (indirect,X) ADC (oper,X) 61 2 6
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// (indirect),Y ADC (oper),Y 71 2 5*
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0x69: newOp("ADC", 0x69, 2, immediate, execADC),
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0x65: newOp("ADC", 0x65, 2, zeroPage, execADC),
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0x75: newOp("ADC", 0x75, 2, zeroPageXIndexed, execADC),
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0x6D: newOp("ADC", 0x6D, 3, absolute, execADC),
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0x7D: newOp("ADC", 0x7D, 3, absoluteXIndexed, execADC),
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0x79: newOp("ADC", 0x79, 3, absoluteYIndexed, execADC),
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0x61: newOp("ADC", 0x61, 2, indirectXIndexed, execADC),
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0x71: newOp("ADC", 0x71, 2, indirectYIndexed, execADC),
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// SBC Subtract Memory from Accumulator with Borrow
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate SBC #oper E9 2 2
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// zeropage SBC oper E5 2 3
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// zeropage,X SBC oper,X F5 2 4
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// absolute SBC oper ED 3 4
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// absolute,X SBC oper,X FD 3 4*
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// absolute,Y SBC oper,Y F9 3 4*
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// (indirect,X) SBC (oper,X) E1 2 6
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// (indirect),Y SBC (oper),Y F1 2 5*
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0xE9: newOp("SBC", 0xE9, 2, immediate, execSBC),
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0xE5: newOp("SBC", 0xE5, 2, zeroPage, execSBC),
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0xF5: newOp("SBC", 0xF5, 2, zeroPageXIndexed, execSBC),
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0xED: newOp("SBC", 0xED, 3, absolute, execSBC),
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0xFD: newOp("SBC", 0xFD, 3, absoluteXIndexed, execSBC),
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0xF9: newOp("SBC", 0xF9, 3, absoluteYIndexed, execSBC),
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0xE1: newOp("SBC", 0xE1, 2, indirectXIndexed, execSBC),
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0xF1: newOp("SBC", 0xF1, 2, indirectYIndexed, execSBC),
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// STX Store Index X in Memory
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// zeropage STX oper 86 2 3
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// zeropage,Y STX oper,Y 96 2 4
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// absolute STX oper 8E 3 4
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0x86: newOp("STX", 0x86, 2, zeroPage, execSTX),
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0x96: newOp("STX", 0x96, 2, zeroPageYIndexed, execSTX),
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0x8E: newOp("STX", 0x8E, 3, absolute, execSTX),
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// STY Store Index Y in Memory
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// zeropage STY oper 84 2 3
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// zeropage,X STY oper,X 94 2 4
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// absolute STY oper 8C 3 4
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0x84: newOp("STY", 0x84, 2, zeroPage, execSTY),
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0x94: newOp("STY", 0x94, 2, zeroPageXIndexed, execSTY),
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0x8C: newOp("STY", 0x8C, 3, absolute, execSTY),
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// STA Store Accumulator in Memory
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// zeropage STA oper 85 2 3
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// zeropage,X STA oper,X 95 2 4
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// absolute STA oper 8D 3 4
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// absolute,X STA oper,X 9D 3 5
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// absolute,Y STA oper,Y 99 3 5
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// (indirect,X) STA (oper,X) 81 2 6
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// (indirect),Y STA (oper),Y 91 2 6
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0x85: newOp("STA", 0x85, 2, zeroPage, execSTA),
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0x95: newOp("STA", 0x95, 2, zeroPageXIndexed, execSTA),
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0x8D: newOp("STA", 0x8D, 3, absolute, execSTA),
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0x9D: newOp("STA", 0x9D, 3, absoluteXIndexed, execSTA),
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0x99: newOp("STA", 0x99, 3, absoluteYIndexed, execSTA),
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0x81: newOp("STA", 0x81, 2, indirectXIndexed, execSTA),
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0x91: newOp("STA", 0x91, 2, indirectYIndexed, execSTA),
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// BEQ Branch on Result Zero
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BEQ oper F0 2 2**
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0xF0: newOp("BEQ", 0xF0, 2, relative, execBEQ),
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// BNE Branch on Result not Zero
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BNE oper D0 2 2**
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0xD0: newOp("BNE", 0xD0, 2, relative, execBNE),
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// BVC Branch on Overflow Clear
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BVC oper 50 2 2**
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0x50: newOp("BVC", 0x50, 2, relative, execBVC),
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// BVS Branch on Overflow Set
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BVC oper 70 2 2**
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0x70: newOp("BVS", 0x70, 2, relative, execBVS),
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// BIT Test Bits in Memory with Accumulator
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// zeropage BIT oper 24 2 3
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// absolute BIT oper 2C 3 4
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0x24: newOp("BIT", 0x24, 2, zeroPage, execBIT),
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0x2C: newOp("BIT", 0x2C, 3, absolute, execBIT),
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// BCC Branch on Carry Clear
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BCC oper 90 2 2**
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0x90: newOp("BCC", 0x90, 2, relative, execBCC),
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// BMI Branch on Result Minus
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BMI oper 30 2 2**
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0x30: newOp("BMI", 0x30, 2, relative, execBMI),
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// BPL Branch on Result Plus
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BPL oper 10 2 2**
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0x10: newOp("BPL", 0x10, 2, relative, execBPL),
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// BCS Branch on Carry Set
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// relative BCS oper B0 2 2**
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0xB0: newOp("BCS", 0xB0, 2, relative, execBCS),
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// CPX Compare Memory and Index X
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate CPX #oper E0 2 2
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// zeropage CPX oper E4 2 3
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// absolute CPX oper EC 3 4
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0xE0: newOp("CPX", 0xE0, 2, immediate, execCPX),
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0xE4: newOp("CPX", 0xE4, 2, zeroPage, execCPX),
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0xEC: newOp("CPX", 0xEC, 3, absolute, execCPX),
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// EOR Exclusive-OR Memory with Accumulator
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate EOR #oper 49 2 2
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// zeropage EOR oper 45 2 3
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// zeropage,X EOR oper,X 55 2 4
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// absolute EOR oper 4D 3 4
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// absolute,X EOR oper,X 5D 3 4*
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// absolute,Y EOR oper,Y 59 3 4*
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// (indirect,X) EOR (oper,X) 41 2 6
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// (indirect),Y EOR (oper),Y 51 2 5*
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0x49: newOp("EOR", 0x49, 2, immediate, execEOR),
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0x45: newOp("EOR", 0x45, 2, zeroPage, execEOR),
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0x55: newOp("EOR", 0x55, 2, zeroPageXIndexed, execEOR),
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0x4D: newOp("EOR", 0x4D, 3, absolute, execEOR),
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0x5D: newOp("EOR", 0x5D, 3, absoluteXIndexed, execEOR),
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0x59: newOp("EOR", 0x59, 3, absoluteYIndexed, execEOR),
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0x41: newOp("EOR", 0x41, 2, indirectXIndexed, execEOR),
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0x51: newOp("EOR", 0x51, 2, indirectYIndexed, execEOR),
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// CMP Compare Memory with Accumulator
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate CMP #oper C9 2 2
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// zeropage CMP oper C5 2 3
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// zeropage,X CMP oper,X D5 2 4
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// absolute CMP oper CD 3 4
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// absolute,X CMP oper,X DD 3 4*
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// absolute,Y CMP oper,Y D9 3 4*
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// (indirect,X) CMP (oper,X) C1 2 6
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// (indirect),Y CMP (oper),Y D1 2 5*
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0xC9: newOp("CMP", 0xC9, 2, immediate, execCMP),
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0xC5: newOp("CMP", 0xC5, 2, zeroPage, execCMP),
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0xD5: newOp("CMP", 0xD5, 2, zeroPageXIndexed, execCMP),
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0xCD: newOp("CMP", 0xCD, 3, absolute, execCMP),
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0xDD: newOp("CMP", 0xDD, 3, absoluteXIndexed, execCMP),
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0xD9: newOp("CMP", 0xD9, 3, absoluteYIndexed, execCMP),
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0xC1: newOp("CMP", 0xC1, 2, indirectXIndexed, execCMP),
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0xD1: newOp("CMP", 0xD1, 2, indirectYIndexed, execCMP),
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// CPY Compare Memory and Index Y
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// immidiate CPY #oper C0 2 2
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// zeropage CPY oper C4 2 3
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// absolute CPY oper CC 3 4
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0xC0: newOp("CPY", 0xC0, 2, immediate, execCPY),
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0xC4: newOp("CPY", 0xC4, 2, zeroPage, execCPY),
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0xCC: newOp("CPY", 0xCC, 3, absolute, execCPY),
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// CLC Clear Carry Flag
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied CLC 18 1 2
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0x18: newOp("CLC", 0x18, 1, implied, execCLC),
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// CLD Clear Decimal Mode
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied CLD D8 1 2
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0xD8: newOp("CLD", 0xD8, 1, implied, execCLD),
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// CLI Clear Interrupt Disable Bit
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied CLI 58 1 2
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0x58: newOp("CLI", 0x58, 1, implied, execCLI),
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// CLV Clear Overflow Flag
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied CLV B8 1 2
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0xB8: newOp("CLV", 0xB8, 1, implied, execCLV),
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// SEC Set Carry Flag
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied SEC 38 1 2
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0x38: newOp("SEC", 0x38, 1, implied, execSEC),
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// SED Set Decimal Flag
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied SED F8 1 2
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0xF8: newOp("SED", 0xF8, 1, implied, execSED),
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// SEI Set Interrupt Disable Status
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied SEI 78 1 2
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0x78: newOp("SEI", 0x78, 1, implied, execSEI),
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// NOP No Operation
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied NOP EA 1 2
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0xEA: newOp("NOP", 0xEA, 1, implied, execNOP),
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// JMP Jump to New Location
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// absolute JMP oper 4C 3 3
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// indirect JMP (oper) 6C 3 5
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0x4C: newOp("JMP", 0x4C, 3, absolute, execJMP),
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0x6C: newOp("JMP", 0x6C, 3, indirect, execJMP),
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// PHA Push Accumulator on Stack
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied PHA 48 1 3
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0x48: newOp("PHA", 0x48, 1, implied, execPHA),
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// TXA Transfer Index X to Accumulator
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied TXA 8A 1 2
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0x8A: newOp("TXA", 0x8A, 1, implied, execTXA),
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// TYA Transfer Index Y to Accumulator
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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// implied TYA 98 1 2
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0x98: newOp("TYA", 0x98, 1, implied, execTYA),
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// TSX Transfer Stack Pointer to Index X
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// addressing assembler opc bytes cyles
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// --------------------------------------------
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|
// implied TSX BA 1 2
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|
0xBA: newOp("TSX", 0xBA, 1, implied, execTSX),
|
|
|
|
// PLA Pull Accumulator from Stack
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// implied PLA 68 1 4
|
|
0x68: newOp("PLA", 0x68, 1, implied, execPLA),
|
|
|
|
// PLP Pull Processor Status from Stack
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// implied PLP 28 1 4
|
|
0x28: newOp("PLP", 0x28, 1, implied, execPLP),
|
|
|
|
// PHP Push Processor Status on Stack
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// implied PHP 08 1 3
|
|
0x08: newOp("PHP", 0x08, 1, implied, execPHP),
|
|
|
|
// JSR Jump to New Location Saving Return Address
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// absolute JSR oper 20 3 6
|
|
0x20: newOp("JSR", 0x20, 3, absolute, execJSR),
|
|
|
|
// RTS Return from Subroutine
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// implied RTS 60 1 6
|
|
0x60: newOp("RTS", 0x60, 1, implied, execRTS),
|
|
|
|
// LSR Shift One Bit Right (Memory or Accumulator)
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// accumulator LSR A 4A 1 2
|
|
// zeropage LSR oper 46 2 5
|
|
// zeropage,X LSR oper,X 56 2 6
|
|
// absolute LSR oper 4E 3 6
|
|
// absolute,X LSR oper,X 5E 3 7
|
|
0x4A: newOp("LSR", 0x4A, 1, accumulator, execLSR),
|
|
0x46: newOp("LSR", 0x46, 2, zeroPage, execLSR),
|
|
0x56: newOp("LSR", 0x56, 2, zeroPageXIndexed, execLSR),
|
|
0x4E: newOp("LSR", 0x4E, 3, absolute, execLSR),
|
|
0x5E: newOp("LSR", 0x5E, 3, absoluteXIndexed, execLSR),
|
|
|
|
// ROL Rotate One Bit Left (Memory or Accumulator)
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// accumulator ROL A 2A 1 2
|
|
// zeropage ROL oper 26 2 5
|
|
// zeropage,X ROL oper,X 36 2 6
|
|
// absolute ROL oper 2E 3 6
|
|
// absolute,X ROL oper,X 3E 3 7
|
|
0x2A: newOp("ROL", 0x2A, 1, accumulator, execROL),
|
|
0x26: newOp("ROL", 0x26, 2, zeroPage, execROL),
|
|
0x36: newOp("ROL", 0x36, 2, zeroPageXIndexed, execROL),
|
|
0x2E: newOp("ROL", 0x2E, 3, absolute, execROL),
|
|
0x3E: newOp("ROL", 0x3E, 3, absoluteXIndexed, execROL),
|
|
|
|
// TXS Transfer Index X to Stack Register
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// implied TXS 9A 1 2
|
|
0x9A: newOp("TXS", 0x9A, 1, implied, execTXS),
|
|
|
|
// ROR Rotate One Bit Right (Memory or Accumulator)
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// accumulator ROR A 6A 1 2
|
|
// zeropage ROR oper 66 2 5
|
|
// zeropage,X ROR oper,X 76 2 6
|
|
// absolute ROR oper 6E 3 6
|
|
// absolute,X ROR oper,X 7E 3 7
|
|
0x6A: newOp("ROR", 0x6A, 1, accumulator, execROR),
|
|
0x66: newOp("ROR", 0x66, 2, zeroPage, execROR),
|
|
0x76: newOp("ROR", 0x76, 2, zeroPageXIndexed, execROR),
|
|
0x6E: newOp("ROR", 0x6E, 3, absolute, execROR),
|
|
0x7E: newOp("ROR", 0x7E, 3, absoluteXIndexed, execROR),
|
|
|
|
// ASL Shift Left One Bit (Memory or Accumulator)
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// accumulator ASL A 0A 1 2
|
|
// zeropage ASL oper 06 2 5
|
|
// zeropage,X ASL oper,X 16 2 6
|
|
// absolute ASL oper 0E 3 6
|
|
// absolute,X ASL oper,X 1E 3 7
|
|
0x0A: newOp("ASL", 0x0A, 1, accumulator, execASL),
|
|
0x06: newOp("ASL", 0x06, 2, zeroPage, execASL),
|
|
0x16: newOp("ASL", 0x16, 2, zeroPageXIndexed, execASL),
|
|
0x0E: newOp("ASL", 0x0E, 3, absolute, execASL),
|
|
0x1E: newOp("ASL", 0x1E, 3, absoluteXIndexed, execASL),
|
|
|
|
// AND AND Memory with Accumulator
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// immidiate AND #oper 29 2 2
|
|
// zeropage AND oper 25 2 3
|
|
// zeropage,X AND oper,X 35 2 4
|
|
// absolute AND oper 2D 3 4
|
|
// absolute,X AND oper,X 3D 3 4*
|
|
// absolute,Y AND oper,Y 39 3 4*
|
|
// (indirect,X) AND (oper,X) 21 2 6
|
|
// (indirect),Y AND (oper),Y 31 2 5*
|
|
0x29: newOp("AND", 0x29, 2, immediate, execAND),
|
|
0x25: newOp("AND", 0x25, 2, zeroPage, execAND),
|
|
0x35: newOp("AND", 0x35, 2, zeroPageXIndexed, execAND),
|
|
0x2D: newOp("AND", 0x2D, 3, absolute, execAND),
|
|
0x3D: newOp("AND", 0x3D, 3, absoluteXIndexed, execAND),
|
|
0x39: newOp("AND", 0x39, 3, absoluteYIndexed, execAND),
|
|
0x21: newOp("AND", 0x21, 2, indirectXIndexed, execAND),
|
|
0x31: newOp("AND", 0x31, 2, indirectYIndexed, execAND),
|
|
|
|
// ORA OR Memory with Accumulator
|
|
// addressing assembler opc bytes cyles
|
|
// --------------------------------------------
|
|
// immidiate ORA #oper 09 2 2
|
|
// zeropage ORA oper 05 2 3
|
|
// zeropage,X ORA oper,X 15 2 4
|
|
// absolute ORA oper 0D 3 4
|
|
// absolute,X ORA oper,X 1D 3 4*
|
|
// absolute,Y ORA oper,Y 19 3 4*
|
|
// (indirect,X) ORA (oper,X) 01 2 6
|
|
// (indirect),Y ORA (oper),Y 11 2 5*
|
|
0x09: newOp("ORA", 0x09, 2, immediate, execORA),
|
|
0x05: newOp("ORA", 0x05, 2, zeroPage, execORA),
|
|
0x15: newOp("ORA", 0x15, 2, zeroPageXIndexed, execORA),
|
|
0x0D: newOp("ORA", 0x0D, 3, absolute, execORA),
|
|
0x1D: newOp("ORA", 0x1D, 3, absoluteXIndexed, execORA),
|
|
0x19: newOp("ORA", 0x19, 3, absoluteYIndexed, execORA),
|
|
0x01: newOp("ORA", 0x01, 2, indirectXIndexed, execORA),
|
|
0x11: newOp("ORA", 0x11, 2, indirectYIndexed, execORA),
|
|
}
|