mirror of
https://github.com/fred6502/Apple-II-Gate-Level-Xilinx-ISE-14.7-Schematic-Entry.git
synced 2024-06-08 11:32:26 +00:00
2 lines
132 B
Plaintext
2 lines
132 B
Plaintext
sch2hdl -intstyle ise -family spartan3e -verilog chip74S195.vf -w C:/Users/Fred6502/Xilinx/tutorial/AppleIIGateSch/chip74S195.sch
|