mirror of
https://github.com/fred6502/Apple-II-Gate-Level-Xilinx-ISE-14.7-Schematic-Entry.git
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3 lines
290 B
Plaintext
3 lines
290 B
Plaintext
sch2hdl -intstyle ise -family spartan3e -verilog chip74LS175_drc.vf -w C:/Users/Fred6502/Xilinx/tutorial/AppleIIGateSch/chip74LS175.sch
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sch2verilog -intstyle ise -family spartan3e -tionly {} -tiext tfi -w C:/Users/Fred6502/Xilinx/tutorial/AppleIIGateSch/chip74LS175.sch chip74LS175.tfi
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