From 6e030bf3e586e089d19012a9e53017c709fd79ba Mon Sep 17 00:00:00 2001
From: vladimir <vladimir@small_eb>
Date: Tue, 9 Oct 2018 22:44:29 -0500
Subject: [PATCH] Added waiting for card ready.

---
 AppleIISd.bin   | Bin 2048 -> 2048 bytes
 Images/Bus1.gif | Bin
 Images/Bus2.gif | Bin
 src/AppleIISd.s |  26 +++++++++-----
 src/Helper.s    |  92 +++++++++++++++++++++++++++++++++++-------------
 src/ProDOS.s    |  25 ++++++-------
 6 files changed, 97 insertions(+), 46 deletions(-)
 mode change 100755 => 100644 Images/Bus1.gif
 mode change 100755 => 100644 Images/Bus2.gif

diff --git a/AppleIISd.bin b/AppleIISd.bin
index d0ea52268a246cf00d6d09f2cd69f255f6616b60..d03af23bb1bd900b842725cb7da4de1d7ad93d4c 100644
GIT binary patch
delta 897
zcmYjP-)qxQ6wYmvx^`0wo6>d+?@;#3iO56>ZtHYEtRrr7po}RJVX!<nQHD^8xQtSm
z!-sTvkUkW`=!82T?C@z1gMc7Od&}-0pll%c6C}deii6ghWU~w8=AQ4n-*-;#Ig(%U
z%N?#zKGg}&0mER(Z&Z^UoEn(AF*O8R_1qTnIUxc`3rIb=(lk_*S#(i4g{1C;MmPwJ
zoOh)s+LpTv89nu(>%nYZG8p>2eztPmtTTXFYq(4w0%3s<>U^ut%Q|A<cu{tt^UD>r
zB0z#S5?XsXlhDv@7%0*@#!v<J;|)nO%4BC_Uh_6&<~18r-n!3%U&^LCcz3**n?9<Y
zaI_=#IaH<wDzi2~KRPLW9X#B99JF}~I~m%~7#s-&5K|L%67;g6C2)F<vJ2$z|HAr{
zeJG#224^u$U;~gDG<tx{;G6(e3%j3<td}@rm6m_6O7>F$ny$uOwt@MH{$?9`Sj8JH
z6NWTUlNj6nsLvds$-RDhEBwB}*W{0SnrNmf{NfmHQL&r<W}ur@s?(u%DAkPaRPhE2
zXUK6YgOo`qW$;v)V6WctV$!ODwP-eyj(HY+tMGF^=R(Y?%82PGqidYJx2U?783PE2
zmA*f($MA8%D%e8;E4;~~<}f9ehSg*1Em+xRTf9TXoXhK{?N&~5jVC&AYFO8T@@_z&
zLM6;y2&M}%5Z?4=BXl%iHIQ}X1sAX1&d(KI6@C`R3VQ{B0p>8L)OwocGLqIkule_d
zC@MRBvxcQYSWyfJqERuq9}GW=#jpT*OcPAfQRuTqLG#GF@c@l|cDJeOrDSpo<WHPh
zSwknr1$sHrNtNZ_;lnf01+tTki0Kk1repN2E3tIL#+`{Nx`sOs(qtplg7(i^OZFP$
U?7g+xr>VKp;|{&Q<XHy)0D76C+yDRo

delta 936
zcmZ8f-)qxQ6uxQGy0)T4-RzWML|OMkao`UsPSeS%p$lVU;>N}#V#WI8M1<0ZHM10k
zPpNs33dJCuaQD>V(;f;@QF^n?<quFMC>!{&WuT)l*gQ$8-ONqyJ?A_3eCOQnM)Zq*
zsl(AkvS*mns7#Qth8r@GSa0lR>;^Nb6_>HM>S8Km0ojR5EvzQd_?*~?#qP9fxENF}
zdS<S2ZN&@Bu$KLJ-aE1&5(Ll7r!wVeO65hhdrI|hO&fnoX|;VjpH?xO31gD!VIC1C
zO$cS&$9;9=m4)0cu=5ocnKhz#xE@Lqd~df$DDyjX-HONSD5N9f2&5<I_OQvNps2?W
zMfvqIPm^72_+dTC>cad1iBA4o8AtvLY(gN22lt@JXtbC`U@lFm9y&jz1{5SYLrT!X
zDZnwxKU3v^bL`Hjg66_CA<C*-+DHm`rv{WnwQGa3{kQ;vaH9&%W3p!hH*KsJ*m$nu
zisusWRcKi0q`gP};)<q53oP)#p{==M&k2`pTeH0nsFMPR!*Fi_lM2PbX8zeT*UkN)
zfsZ&$FQ!5QKcVrH8o#Px#Pn&B19!gJQFa7oiNNuyw>Zcg)j*j6i@Z@Si7MGPep_Pr
zL5yl=x2RL8bxRtI8n~J+@irlZgW?+S79Z>;9H|oa+qrlf`Uc&4VJRDxl}OF{9I@j7
z!&?&7_7lWq9J4Ff0f5ZSdM%$_>}Lpfip%m7=as{2x)D^UIj+Fw67J{TS?0rn{NCBp
zQqh?q-TH6bMqq|FX?!vyVERQ=**EW7l((F%9#$(lJbq|f?x2q!IJlUNmepoyGax{s
zJVc*up425uczdnDf^<yXS=Hnmo$UIw5Yr#)OZr9qtG)u`7mP4MzC#H4dj<yh$oSY$
TFH?OS0KdEIeoe^}?#q7xnajUO

diff --git a/Images/Bus1.gif b/Images/Bus1.gif
old mode 100755
new mode 100644
diff --git a/Images/Bus2.gif b/Images/Bus2.gif
old mode 100755
new mode 100644
diff --git a/src/AppleIISd.s b/src/AppleIISd.s
index 7e17e4a..0b7e2ca 100644
--- a/src/AppleIISd.s
+++ b/src/AppleIISd.s
@@ -13,9 +13,11 @@
 
 .import PRODOS
 .import SMARTPORT
+.import WRDATA
 .import GETR1
 .import GETR3
 .import SDCMD
+.import SDCMD0
 .import CARDDET
 .import READ
 
@@ -238,9 +240,7 @@ INIT:       LDA   #$03        ; set SPI mode 3
             LDY   #10
             LDA   #DUMMY
 
-@LOOP:      STA   DATA,X
-@WAIT:      BIT   CTRL,X
-            BPL   @WAIT
+@LOOP:      JSR   WRDATA
             DEY
             BNE   @LOOP       ; do 10 times
             LDA   SS,X
@@ -251,7 +251,7 @@ INIT:       LDA   #$03        ; set SPI mode 3
             STA   CMDLO
             LDA   #>CMD0
             STA   CMDHI
-            JSR   SDCMD
+            JSR   SDCMD0
             JSR   GETR1       ; get response
             CMP   #$01
             BNE   @ERROR1     ; error!
@@ -261,6 +261,7 @@ INIT:       LDA   #$03        ; set SPI mode 3
             LDA   #>CMD8
             STA   CMDHI
             JSR   SDCMD
+            BCS   @ERROR1
             JSR   GETR3       ; R7 is also 1+4 bytes 
             CMP   #$01
             BNE   @SDV1       ; may be SD Ver. 1
@@ -275,12 +276,14 @@ INIT:       LDA   #$03        ; set SPI mode 3
             LDA   #>CMD55
             STA   CMDHI
             JSR   SDCMD
+            BCS   @ERROR1
             JSR   GETR1
             LDA   #<ACMD4140  ; enable SDHC support 
             STA   CMDLO
             LDA   #>ACMD4140
             STA   CMDHI
             JSR   SDCMD
+            BCS   @ERROR1
             JSR   GETR1
             CMP   #$01
             BEQ   @SDV2       ; wait for ready
@@ -292,7 +295,8 @@ INIT:       LDA   #$03        ; set SPI mode 3
             STA   CMDLO 
             LDA   #>CMD58 
             STA   CMDHI 
-            JSR   SDCMD 
+            JSR   SDCMD
+            BCS   @ERROR1
             JSR   GETR3 
             CMP   #0 
             BNE   @ERROR1     ; error! 
@@ -313,11 +317,13 @@ INIT:       LDA   #$03        ; set SPI mode 3
             LDA   #>CMD55
             STA   CMDHI
             JSR   SDCMD       ; ignore response
+            BCS   @ERROR1
             LDA   #<ACMD410
             STA   CMDLO
             LDA   #>ACMD410
             STA   CMDHI
             JSR   SDCMD
+            BCS   @ERROR1
             JSR   GETR1
             CMP   #$01
             BEQ   @SDV1       ; wait for ready
@@ -331,6 +337,7 @@ INIT:       LDA   #$03        ; set SPI mode 3
             LDA   #>CMD1
             STA   CMDHI
 @LOOP1:     JSR   SDCMD
+            BCS   @IOERROR
             JSR   GETR1
             CMP   #$01
             BEQ   @LOOP1      ; wait for ready
@@ -343,6 +350,7 @@ INIT:       LDA   #$03        ; set SPI mode 3
             LDA   #>CMD16
             STA   CMDHI
             JSR   SDCMD
+            BCS   @IOERROR
             JSR   GETR1
             CMP   #0
             BNE   @IOERROR    ; error!
@@ -350,9 +358,9 @@ INIT:       LDA   #$03        ; set SPI mode 3
 @END:       LDA   SS,X
             ORA   #INITED     ; initialized
             STA   SS,X
-            LDA   CTRL,X
-            ORA   #ECE        ; enable 7MHz
-            STA   CTRL,X
+            ;LDA   CTRL,X
+            ;ORA   #ECE        ; enable 7MHz
+            ;STA   CTRL,X
             CLC               ; all ok
             LDY   #NO_ERR
             BCC   @END1
@@ -368,7 +376,7 @@ INIT:       LDA   #$03        ; set SPI mode 3
             RTS
 
 
-TEXT:       .asciiz " Apple][Sd v1.2.1 (c)2018 Florian Reitz "
+TEXT:       .asciiz " Apple][Sd v1.2.2 (c)2018 Florian Reitz "
 
 CMD0:       .byt $40, $00, $00
             .byt $00, $00, $95
diff --git a/src/Helper.s b/src/Helper.s
index 0f659e2..7f79149 100644
--- a/src/Helper.s
+++ b/src/Helper.s
@@ -11,8 +11,10 @@
 ;
 ;*******************************
             
+.export WRDATA
 .export COMMAND
 .export SDCMD
+.export SDCMD0
 .export GETBLOCK
 .export CARDDET
 .export WRPROT
@@ -22,24 +24,56 @@
 .include "AppleIISd.inc"
 .segment "EXTROM"
 
-
+WRDATA:	STA	DATA,X
+@WAIT:	BIT	CTRL,X
+	BPL	@WAIT
+	RTS
+;********************************
+; Wait for card ready
+; C set on timeout
+;********************************
+WREADY:
+	PHA
+	LDA   #$FE
+@LOOP:	PHA   ; counter
+	LDA   #DUMMY
+        JSR   WRDATA
+        LDA   DATA,X
+        CMP   #$FF
+        BNE   @AGAIN
+        PLA
+        PLA
+        CLC
+        RTS
+@AGAIN: PLA
+        CMP   #$FF
+        BEQ   @TOUT
+        SBC   #0 ; dec a
+	JMP   @LOOP
+@TOUT:  PLA
+	SEC
+	RTS
+	
 ;*******************************
 ;
 ; Send SD command
 ; Call with command in CMDHI and CMDLO
+; Returns iwth carry set on timeout
 ;
 ;*******************************
 
-SDCMD:      PHY
+SDCMD:      JSR   WREADY
+            BCC   SDCMD0
+            RTS
+SDCMD0:     PHY
             LDY   #0
 @LOOP:      LDA   (CMDLO),Y
-            STA   DATA,X
-@WAIT:      BIT   CTRL,X      ; TC is in N
-            BPL   @WAIT
+            JSR   WRDATA
             INY
             CPY   #6
             BCC   @LOOP
             PLY
+            CLC
             RTS
 
 
@@ -50,16 +84,22 @@ SDCMD:      PHY
 ;
 ;*******************************
 
-GETR1:      LDA   #DUMMY
-            STA   DATA,X
-@WAIT:      BIT   CTRL,X
-            BPL   @WAIT
+GETR1:      PHY
+            LDY   #10
+@AGAIN:     LDA   #DUMMY
+            JSR   WRDATA
             LDA   DATA,X      ; get response
-            BMI   GETR1       ; wait for MSB=0
-            PHA
+            BIT   #$80
+            BEQ   @CONT       ; wait for MSB=0
+            DEY
+            BNE   @AGAIN
+            PLY
+            RTS
+@CONT:      PHA
             LDA   #DUMMY
-            STA   DATA,X      ; send another dummy
+            JSR   WRDATA      ; send another dummy
             PLA               ; restore R1
+            PLY
             RTS
 
 ;*******************************
@@ -74,12 +114,10 @@ GETR3:      JSR   GETR1       ; get R1 first
             PHA               ; save R1
             PHY               ; save Y
             LDY   #04         ; load counter
-            JMP   @WAIT       ; first byte is already there 
+            JMP   @LOAD       ; first byte is already there 
 @LOOP:      LDA   #DUMMY      ; send dummy
-            STA   DATA,X
-@WAIT:      BIT   CTRL,X
-            BPL   @WAIT
-            LDA   DATA,X
+            JSR   WRDATA
+@LOAD:      LDA   DATA,X
             PHA
             DEY
             BNE   @LOOP       ; do 4 times
@@ -94,7 +132,7 @@ GETR3:      JSR   GETR1       ; get R1 first
             STA   R30,Y       ; R30 is MSB
             PLY               ; restore Y
             LDA   #DUMMY
-            STA   DATA,X      ; send another dummy
+            JSR   WRDATA      ; send another dummy
             PLA               ; restore R1
             RTS
 
@@ -156,19 +194,23 @@ GETBLOCK:   PHX               ; save X
 ;
 ;*******************************
 
-COMMAND:    PHY               ; save Y
+COMMAND:    
+            JSR   WREADY
+            BCC   @CONT
+            RTS
+@CONT:      PHY               ; save Y
             LDY   SLOT
-            STA   DATA,X      ; send command
+            JSR   WRDATA      ; send command
             LDA   R30,Y       ; get arg from R30 on
-            STA   DATA,X
+            JSR   WRDATA
             LDA   R31,Y
-            STA   DATA,X
+            JSR   WRDATA
             LDA   R32,Y
-            STA   DATA,X
+            JSR   WRDATA
             LDA   R33,Y
-            STA   DATA,X
+            JSR   WRDATA
             LDA   #DUMMY
-            STA   DATA,X      ; dummy crc
+            JSR   WRDATA      ; dummy crc
             JSR   GETR1
             PLY               ; restore Y
             RTS
diff --git a/src/ProDOS.s b/src/ProDOS.s
index 0cd0493..7030d14 100644
--- a/src/ProDOS.s
+++ b/src/ProDOS.s
@@ -16,6 +16,7 @@
 .export READ
 .export WRITE
 
+.import WRDATA
 .import COMMAND
 .import SDCMD
 .import GETBLOCK
@@ -108,16 +109,16 @@ READ:       JSR   GETBLOCK    ; calc block address
             BNE   @ERROR      ; check for error
 
 @GETTOK:    LDA   #DUMMY      ; get data token
-            STA   DATA,X
+            JSR   WRDATA
             LDA   DATA,X      ; get response
             CMP   #$FE
             BNE   @GETTOK     ; wait for $FE
 
             LDA   CTRL,X      ; enable FRX
-            ORA   #FRX
+            ORA   #FRX+ECE
             STA   CTRL,X
             LDA   #DUMMY
-            STA   DATA,X
+            JSR   WRDATA
 
             LDY   #0
 @LOOP1:     LDA   DATA,X      ; read data from card
@@ -136,7 +137,7 @@ READ:       JSR   GETBLOCK    ; calc block address
             LDA   DATA,X      ; read a dummy byte
 
             LDA   CTRL,X      ; disable FRX
-            AND   #<~FRX
+            AND   #<~(FRX+ECE)
             STA   CTRL,X
             CLC               ; no error
             LDA   #NO_ERR
@@ -184,27 +185,27 @@ WRITE:      JSR   WRPROT
             BNE   @IOERROR    ; check for error
 
             LDA   #DUMMY
-            STA   DATA,X      ; send dummy
+            JSR   WRDATA      ; send dummy
             LDA   #$FE
-            STA   DATA,X      ; send data token
+            JSR   WRDATA      ; send data token
 
             LDY   #0
 @LOOP1:     LDA   (BUFFER),Y
-            STA   DATA,X
+            JSR   WRDATA
             INY
             BNE   @LOOP1
             INC   BUFFER+1
 @LOOP2:     LDA   (BUFFER),Y
-            STA   DATA,X
+            JSR   WRDATA
             INY
             BNE   @LOOP2
             DEC   BUFFER+1
 
 @CRC:       LDA   #DUMMY
-            STA   DATA,X      ; send 2 dummy crc bytes
-            STA   DATA,X
+            JSR   WRDATA      ; send 2 dummy crc bytes
+            JSR   WRDATA
 
-            STA   DATA,X      ; get data response
+            JSR   WRDATA      ; get data response
             LDA   DATA,X
             AND   #$1F
             CMP   #$05
@@ -215,7 +216,7 @@ WRITE:      JSR   WRPROT
 @DONE:      PHP
             PHA
 @WAIT:      LDA   #DUMMY
-            STA   DATA,X      ; wait for write cycle
+            JSR   WRDATA      ; wait for write cycle
             LDA   DATA,X      ; to complete
             BEQ   @WAIT