AppleIISd/VHDL/spi6502b.gyd
freitz85 ef10d991fe Merge branch 'master' of https://github.com/freitz85/AppleIISd
# Conflicts:
#	_ngo/netlist.lst
#	spi6502b.bld
#	spi6502b.ngc
#	spi6502b.ngd
#	spi6502b.ngr
#	spi6502b.prj
#	spi6502b.syr
#	spi6502b_pad.csv
2017-07-05 19:23:46 +02:00

62 lines
1.5 KiB
Plaintext

Pin Freeze File: version G.38
9572XL44PC XC9572XL-10-PC44
Ncs2 S:PIN18
a10 S:PIN38
a8 S:PIN36
a9 S:PIN37
cpu_Nphi2 S:PIN5
cpu_Nres S:PIN19
cpu_a<0> S:PIN22
cpu_a<1> S:PIN24
cpu_rnw S:PIN7
extclk S:PIN6
nio_sel S:PIN40
nio_stb S:PIN43
spi_int S:PIN42
spi_miso S:PIN44
b10 S:PIN27
b8 S:PIN25
b9 S:PIN26
cpu_Nirq S:PIN39
cpu_d<0> S:PIN2
cpu_d<1> S:PIN3
cpu_d<2> S:PIN4
cpu_d<3> S:PIN8
cpu_d<4> S:PIN9
cpu_d<5> S:PIN11
cpu_d<6> S:PIN12
cpu_d<7> S:PIN13
spi_mosi S:PIN35
spi_sclk S:PIN34
led S:PIN29
ng S:PIN20
noe S:PIN14
spi_Nsel S:PIN28
;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_1 spidataout<3> spidataout<2> spidataout<1> spidataout<0>
int_dout<0> int_dout<1> tmo int_dout<2>
slaveinten frx ece divisor<2>
divisor<1> divisor<0> int_dout<3> cpol
int_dout<4> cpha
PARTITION FB2_1 EXP6_ int_mosi shifting2 tc
shiftcnt<0> $OpTx$INV$24__$INT spidatain<7> spidatain<6>
cpu_Nirq_OBUFE spidatain<5> spidatain<4> spidatain<3>
spidatain<2>
PARTITION FB2_18 start_shifting/start_shifting_RSTF__$INT
PARTITION FB3_2 int_dout<5>
PARTITION FB3_5 int_dout<6>
PARTITION FB3_8 int_dout<7> noe_OBUF
PARTITION FB3_15 ng_OBUF
PARTITION FB3_17 add_dec/XLXN_11 cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST
PARTITION FB4_1 shiftdone b8_OBUF start_shifting spidataout<7>
b9_OBUF spidataout<6> spidataout<5> b10_OBUF
spidataout<4> spidatain<1> slavesel spidatain<0>
shiftcnt<3> led_OBUF shiftcnt<2> shiftcnt<1>
int_sclk ier