Zane Kaminski
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4d8af3b074
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Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev
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2019-10-13 01:42:28 -04:00 |
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Zane Kaminski
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1bf5ce4be3
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New schematic revision
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2019-10-13 01:40:49 -04:00 |
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Zane Kaminski
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67399312b6
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Register reset/initial values set syntax changed
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2019-10-13 01:40:25 -04:00 |
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Zane Kaminski
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a45778b440
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Put gerber files back
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2019-10-13 01:39:20 -04:00 |
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Zane Kaminski
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cf16763591
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24-bit counter, CAS fixed
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2019-10-11 20:34:51 -04:00 |
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Zane Kaminski
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2382fdfda6
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Made AddrH high bit variable with mode input
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2019-09-07 21:16:23 -04:00 |
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Zane Kaminski
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b0a001aa58
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Clarified assignments
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2019-09-06 17:26:42 -04:00 |
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Zane Kaminski
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7ccb2b670e
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Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev
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2019-09-05 13:50:40 -04:00 |
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Zane Kaminski
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6dabfca306
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added some disassembly of RamFactor
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2019-09-05 13:50:38 -04:00 |
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Zane Kaminski
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47a4c012d7
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Pipelined addition
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2019-09-04 21:45:56 -04:00 |
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Zane Kaminski
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106df31f52
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Trying again with RamFactor firmware
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2019-09-02 20:56:37 -04:00 |
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Zane Kaminski
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a73cbf10ef
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Clarifications and bugfixes, will try again
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2019-09-02 01:42:07 -04:00 |
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Zane Kaminski
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5b230c0966
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1MB CPLD design seems to work, fails Apple BIST
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2019-09-01 21:18:44 -04:00 |
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Zane Kaminski
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e78807ce85
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CPLD firmware compiles
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2019-08-31 22:55:04 -04:00 |
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Zane Kaminski
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029354ce8e
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Submitted to JLCPCB
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2019-07-30 17:11:31 -04:00 |
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Zane Kaminski
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fb35d7bd9b
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Release candidate PCB
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2019-07-21 17:53:22 -04:00 |
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Zane Kaminski
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9ba21040f4
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Rough schematic and board layout
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2019-06-25 19:44:54 -04:00 |
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Zane Kaminski
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6158eec9bd
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Initial commit
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2019-06-25 00:46:18 -04:00 |
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