Mouserial-prototype/cpld/Mouserial.qsf

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2019-12-21 06:48:05 +00:00
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 32-bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 14:57:33 August 22, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# Mouserial_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name DEVICE "EPM7128SLC84-15"
set_global_assignment -name TOP_LEVEL_ENTITY Mouserial
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:57:33 AUGUST 22, 2019"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 84
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 15
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
set_global_assignment -name VERILOG_FILE Mouserial.v
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
set_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC OFF
set_global_assignment -name PARALLEL_SYNTHESIS OFF
set_global_assignment -name AUTO_GLOBAL_CLOCK_MAX ON
set_global_assignment -name AUTO_GLOBAL_OE_MAX ON
set_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS ON
set_global_assignment -name AUTO_LCELL_INSERTION OFF
set_global_assignment -name AUTO_OPEN_DRAIN_PINS ON
set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF
set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS "NORMAL COMPILATION"
set_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES ON
set_global_assignment -name EXTRACT_VHDL_STATE_MACHINES ON
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS ON
set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS OFF
set_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4
set_global_assignment -name AUTO_PARALLEL_EXPANDERS ON
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name SYNTHESIS_SEED 1
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name STATE_MACHINE_PROCESSING "USER-ENCODED"
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name ECO_OPTIMIZE_TIMING ON
set_global_assignment -name ECO_REGENERATE_REPORT ON
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING "PACK ALL IO REGISTERS"
set_global_assignment -name SLOW_SLEW_RATE ON
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT HIGH
set_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD_TMV ON
set_location_assignment PIN_11 -to A[11]
set_location_assignment PIN_76 -to A[1]
set_location_assignment PIN_10 -to A[10]
set_location_assignment PIN_9 -to A[9]
set_location_assignment PIN_8 -to A[8]
set_location_assignment PIN_6 -to A[7]
set_location_assignment PIN_5 -to A[6]
set_location_assignment PIN_4 -to A[5]
set_location_assignment PIN_1 -to nRES
set_location_assignment PIN_2 -to C7M
set_location_assignment PIN_84 -to Q3
set_location_assignment PIN_81 -to nINH
set_location_assignment PIN_80 -to A[4]
set_location_assignment PIN_79 -to A[3]
set_location_assignment PIN_77 -to A[2]
set_location_assignment PIN_75 -to A[0]
set_location_assignment PIN_74 -to nIOSEL
set_location_assignment PIN_73 -to D[7]
set_location_assignment PIN_70 -to nRCS
set_location_assignment PIN_69 -to D[6]
set_location_assignment PIN_67 -to nROE
set_location_assignment PIN_65 -to D[5]
set_location_assignment PIN_63 -to D[3]
set_location_assignment PIN_61 -to D[2]
set_location_assignment PIN_60 -to D[1]
set_location_assignment PIN_58 -to D[0]
set_location_assignment PIN_64 -to D[4]
set_location_assignment PIN_52 -to A[12]
set_location_assignment PIN_51 -to A[13]
set_location_assignment PIN_50 -to A[14]
set_location_assignment PIN_39 -to A[15]
set_location_assignment PIN_49 -to T0
set_location_assignment PIN_48 -to Vbl0
set_location_assignment PIN_46 -to nRWR
set_location_assignment PIN_45 -to nRRD
set_location_assignment PIN_44 -to nRALE
set_location_assignment PIN_41 -to Vbl1
set_location_assignment PIN_40 -to nKMode
set_location_assignment PIN_37 -to MOSI
set_location_assignment PIN_36 -to MISO
set_location_assignment PIN_35 -to SCK
set_location_assignment PIN_34 -to nRRST
set_location_assignment PIN_33 -to nRIRQ
set_location_assignment PIN_21 -to Rclk
set_location_assignment PIN_20 -to nSS
set_location_assignment PIN_18 -to nIRQ
set_location_assignment PIN_17 -to nIOSTRB
set_location_assignment PIN_15 -to nDEVSEL
set_location_assignment PIN_12 -to nWE
set_global_assignment -name AUTO_RESOURCE_SHARING ON
set_global_assignment -name AUTO_TURBO_BIT OFF
set_location_assignment PIN_22 -to RAD[0]
set_location_assignment PIN_24 -to RAD[1]
set_location_assignment PIN_25 -to RAD[2]
set_location_assignment PIN_27 -to RAD[3]
set_location_assignment PIN_28 -to RAD[4]
set_location_assignment PIN_29 -to RAD[5]
set_location_assignment PIN_30 -to RAD[6]
set_location_assignment PIN_31 -to RAD[7]
set_location_assignment PIN_83 -to PHI0in
set_location_assignment PIN_68 -to ROMA[11]
set_location_assignment PIN_54 -to ROMA[15]
set_location_assignment PIN_57 -to ROMA[13]
set_location_assignment PIN_56 -to ROMA[12]
set_location_assignment PIN_55 -to ROMA[14]
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b0_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b1_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b2_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b3_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b4_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b5_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b6_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b7_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b8_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1b9_MC
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI0seen
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to PHI1reg
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to S
set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to RAreg