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ProDOS-ROM-Drive
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Merge pull request #5 from tjboldt/block0001 

Add v3 hardware with firmware in Block 0001
This commit is contained in:
Terence Boldt 2021-12-22 09:40:09 -05:00 committed by GitHub
parent 5783f25a47 63f7ded969
commit 8f30793ace
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GPG Key ID: 4AEE18F83AFDEB23
39 changed files with 24311 additions and 61122 deletions
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BIN
Firmware/BlankDriveWithFirmware.po Executable file → Normal file
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Firmware/Firmware-RP-patch.bin
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Firmware/Firmware.asm
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@ -1,196 +1,185 @@
;Please note this code is assembled seven times,
;once for each slot in the Apple II.
;This allows the card to work in any slot without
;having to write space consuming relocatable code.
writeLatchHigh = $C081
writeLatchLow = $C080
;Install cc65 (on Ubuntu this is: sudo apt install cc65)
;Execute the following commands to generate the binary:
;ca65 Warning.asm -o warning.o
;ca65 Firmware.asm -D SLOT1 -o slot1.o
;ca65 Firmware.asm -D SLOT2 -o slot2.o
;ca65 Firmware.asm -D SLOT3 -o slot3.o
;ca65 Firmware.asm -D SLOT4 -o slot4.o
;ca65 Firmware.asm -D SLOT5 -o slot5.o
;ca65 Firmware.asm -D SLOT6 -o slot6.o
;ca65 Firmware.asm -D SLOT7 -o slot7.o
;ld65 -t none warning.o slot1.o slot2.o slot3.o slot4.o slot5.o slot6.o slot7.o -o Firmware.bin
;Determine which slot we want by command-line define
.ifdef SLOT1
slot = $01
.endif
.ifdef SLOT2
slot = $02
.endif
.ifdef SLOT3
slot = $03
.endif
.ifdef SLOT4
slot = $04
.endif
.ifdef SLOT5
slot = $05
.endif
.ifdef SLOT6
slot = $06
.endif
.ifdef SLOT7
slot = $07
.endif
;Calculate I/O addresses for this slot
slotwh = $C081+slot*$10
slotwl = $C080+slot*$10
slotrd = $C080+slot*$10
sdrive = slot*$10
sram0 = $478+slot
sram1 = $4F8+slot
sram2 = $578+slot
sram3 = $5F8+slot
sram4 = $678+slot
sram5 = $6F8+slot
sram6 = $778+slot
sram7 = $7F8+slot
;temp variables becasue 6502 only has 3 registers
highLatch = $F8
lowLatch = $F9
tempY = $FE
blockHalfCounter = $FF
;ProDOS defines
command = $42 ;ProDOS command
unit = $43 ;7=drive 6-4=slot 3-0=not used
buflo = $44 ;low address of buffer
bufhi = $45 ;hi address of buffer
blklo = $46 ;low block
blkhi = $47 ;hi block
ioerr = $27 ;I/O error code
nodev = $28 ;no device connected
wperr = $2B ;write protect error
command = $42 ;ProDOS command
unit = $43 ;7=drive 6-4=slot 3-0=not used
buflo = $44 ;low address of buffer
bufhi = $45 ;hi address of buffer
blklo = $46 ;low block
blkhi = $47 ;hi block
ioerr = $27 ;I/O error code
nodev = $28 ;no device connected
wperr = $2B ;write protect error
;for relocatable code, address to jump to instead of JSR absolute + RTS
jumpAddressLo = $FA
jumpAddressHi = $FB
ioAddressLo = $FC
ioAddressHi = $FD
knownRts = $FF58
.org $C000+slot*$100
;code is non-relocatable
; but duplicated seven times,
; once for each slot
.org $C700
;code is relocatable
; but set to $c700 for
; readability
;ID bytes for booting and drive detection
cpx #$20 ;ID bytes for ProDOS and the
cpx #$00 ; Apple Autostart ROM
cpx #$03 ;
cpx #$3C ;this one for older II's
cpx #$20 ;ID bytes for ProDOS and the
ldy #$00 ; Apple Autostart ROM
cpx #$03 ;
cpx #$3C ;this one for older II's
;zero out block numbers and buffer address
sty buflo
sty blklo
sty blkhi
iny ;set command = 1 for read block
sty command
sty jumpAddressLo ;$01 of $0801 where boot code starts
jsr knownRts ;jump to known RTS to get our address from the stack
tsx
lda $0100,x ;this for example would be $C7 in slot 7
sta bufhi ;keep the slot here
asl
asl
asl
asl
tax
;display copyright message
ldy #$00
drawtxt: lda text,y
beq boot ;check for NULL
ora #$80 ;make it visible to the Apple
sta $07D0,y ;put text on last line
ldy #<text
drawtxt:
lda (buflo),y
sta $07D0,y ;put text on last line
iny
bpl drawtxt
;load first two blocks and execute to boot
boot: lda #$01 ;set read command
sta command
lda #sdrive ;set slot and unit
sta unit
lda #$00 ;block 0
sta blklo
sta blkhi
sta buflo ;buffer at $800
lda #$08
sta bufhi
jsr entry ;get the block
ldx #sdrive ;set up for slot n
jmp $801 ;execute the block
bne drawtxt
;load block 0000 at $0800
lda #$08
sta bufhi
sta jumpAddressHi
stx unit
bne start
;This is the ProDOS entry point for this card
entry: lda #sdrive ;unit number is $n0 - n = slot
cmp unit ;make sure same as ProDOS
beq docmd ;yep, do command
sec ;nope, set device not connected
lda #nodev
rts ;go back to ProDOS
entry:
lda #<knownRts
sta jumpAddressLo
lda #>knownRts
sta jumpAddressHi
start:
lda #$C0
sta ioAddressHi
jsr knownRts
tsx
lda $0100,x
asl a
asl a
asl a
asl a
tax
cpx unit ;make sure same as ProDOS
beq docmd ;yep, do command
sec ;nope, set device not connected
lda #nodev
rts ;go back to ProDOS
docmd: lda command ;get ProDOS command
beq getstat ;command 0 is GetStatus
cmp #$01 ;
beq readblk ;command 1 is ReadBlock
sec ;Format/Write not permitted
lda #wperr ;write protect error
rts ;go back to ProDOS
docmd:
lda command
beq getstat ;command 0 is GetStatus
cmp #$01
beq readblk ;command 1 is ReadBlock
sec ;Format/Write not permitted
lda #wperr ;write protect error
rts ;go back to ProDOS
getstat: clc ;send back status
lda #$00 ;good status
ldx #$00 ;1024 blocks
ldy #$04 ;
getstat:
clc ;send back status
lda #$00 ;good status
ldx #$00 ;1024 blocks
ldy #$04 ;
rts
readblk: lda blkhi ;get hi block
asl a ;shift up to top 3 bits
asl a ;since that's all the high
asl a ;blocks we can handle
asl a ;
asl a ;
sta sram0 ;save it in scratch ram 0
readblk:
lda blkhi ;get hi block
asl a ;shift up to top 3 bits
asl a ;since that's all the high
asl a ;blocks we can handle
asl a ;
asl a ;
sta highLatch ;save it in scratch ram 0
;so we can stuff it in the
;high latch later
lda blklo ;get low block
lsr a ;shift so we get the top 5
lsr a ;bits - this also goes in
lsr a ;the high latch
ora sram0 ;add it to those top 3 bits
sta sram0 ;save it back in scratch ram
lda blklo ;get low block
asl a ;shift it to top 3 bits
asl a ;
asl a ;
asl a ;
asl a ;
sta sram1 ;save it in scratch ram
jsr get256 ;get first half of block
lda sram1 ;get low latch
and #$F0 ;clear bottom 4 bits
ora #$10 ;set bit 5 for second half
;of 512 byte block
sta sram1 ;save it back in scratch
inc bufhi ;write 2nd block up 256 bytes
jsr get256 ;get second half of block
dec bufhi ;put ProDOS buffer back
clc ;clear error code for success
lda #$00
rts ;return to ProDOS
lda blklo ;get low block
lsr a ;shift so we get the top 5
lsr a ;bits - this also goes in
lsr a ;the high latch
ora highLatch ;add it to those top 3 bits
sta highLatch ;save it back in scratch ram
lda blklo ;get low block
asl a ;shift it to top 3 bits
asl a ;
asl a ;
asl a ;
asl a ;
sta lowLatch
lda #$02
sta blockHalfCounter
;This gets 256 bytes from the ROM card
;assuming high latch value is in sram0
;and low latch value is in sram1
get256: ldy #$00 ;clear buffer counter
lda sram0 ;get high latch value
sta slotwh ;set high latch for card
loop256: ldx #$00 ;clear port counter
lda sram1 ;get low latch value
sta slotwl ;set low latch
loop16: lda slotrd,x ;get a byte
sta (buflo),y ;write into the buffer
read256:
ldy #$00
lda highLatch ;get high latch value
sta writeLatchHigh,x ;set high latch for card
loop256:
lda lowLatch
sta writeLatchLow,x
txa
ora #$80
sta ioAddressLo
loop16:
sty tempY
ldy #$00
lda (ioAddressLo),y
ldy tempY
sta (buflo),y
iny
inx
cpx #$10
bne loop16 ;go until 16 bytes read
inc ioAddressLo
lda ioAddressLo
and #$0F
bne loop16
inc lowLatch
cpy #$00
bne loop256
dec blockHalfCounter
bne readnext256
dec bufhi
clc ;clear error code for success
lda #$00
jmp (jumpAddressLo)
inc sram1 ;next 16 bytes
cpy #$00
bne loop256 ;go until 256 total
rts
readnext256:
inc bufhi
clc
bcc read256
text: .byte "ROM-Drive (c)1998-2019 Terence J. Boldt"
;macro for string with high-bit set
.macro aschi str
.repeat .strlen (str), c
.byte .strat (str, c) | $80
.endrep
.endmacro
text: aschi "ROM-Drive (c)1998-2021 Terence J. Boldt"
end:
.byte 0
.byte 0
; These bytes need to be at the top of the 256 byte firmware as ProDOS
; uses these to find the entry point and drive capabilities
@ -199,7 +188,7 @@ end:
.byte 0
.endrepeat
.byte 0,0 ;0000 blocks = check status
.byte 3 ;bit 0=read 1=status
.byte entry&$00FF ;low byte of entry
.byte 0,0 ;0000 blocks = check status
.byte 3 ;bit 0=read 1=status
.byte <entry ;low byte of entry

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Firmware/Firmware.bin
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ca65 V2.18 - N/A
Main file : Firmware.asm
Current file: Firmware.asm
000000r 1 writeLatchHigh = $C081
000000r 1 writeLatchLow = $C080
000000r 1
000000r 1 ;temp variables becasue 6502 only has 3 registers
000000r 1 highLatch = $F8
000000r 1 lowLatch = $F9
000000r 1 tempY = $FE
000000r 1 blockHalfCounter = $FF
000000r 1
000000r 1 ;ProDOS defines
000000r 1 command = $42 ;ProDOS command
000000r 1 unit = $43 ;7=drive 6-4=slot 3-0=not used
000000r 1 buflo = $44 ;low address of buffer
000000r 1 bufhi = $45 ;hi address of buffer
000000r 1 blklo = $46 ;low block
000000r 1 blkhi = $47 ;hi block
000000r 1 ioerr = $27 ;I/O error code
000000r 1 nodev = $28 ;no device connected
000000r 1 wperr = $2B ;write protect error
000000r 1
000000r 1 ;for relocatable code, address to jump to instead of JSR absolute + RTS
000000r 1 jumpAddressLo = $FA
000000r 1 jumpAddressHi = $FB
000000r 1 ioAddressLo = $FC
000000r 1 ioAddressHi = $FD
000000r 1 knownRts = $FF58
000000r 1
000000r 1 .org $C700
00C700 1 ;code is relocatable
00C700 1 ; but set to $c700 for
00C700 1 ; readability
00C700 1
00C700 1 ;ID bytes for booting and drive detection
00C700 1 E0 20 cpx #$20 ;ID bytes for ProDOS and the
00C702 1 A0 00 ldy #$00 ; Apple Autostart ROM
00C704 1 E0 03 cpx #$03 ;
00C706 1 E0 3C cpx #$3C ;this one for older II's
00C708 1
00C708 1 ;zero out block numbers and buffer address
00C708 1 84 44 sty buflo
00C70A 1 84 46 sty blklo
00C70C 1 84 47 sty blkhi
00C70E 1 C8 iny ;set command = 1 for read block
00C70F 1 84 42 sty command
00C711 1 84 FA sty jumpAddressLo ;$01 of $0801 where boot code starts
00C713 1 20 58 FF jsr knownRts ;jump to known RTS to get our address from the stack
00C716 1 BA tsx
00C717 1 BD 00 01 lda $0100,x ;this for example would be $C7 in slot 7
00C71A 1 85 45 sta bufhi ;keep the slot here
00C71C 1 0A asl
00C71D 1 0A asl
00C71E 1 0A asl
00C71F 1 0A asl
00C720 1 AA tax
00C721 1
00C721 1 ;display copyright message
00C721 1 A0 C3 ldy #<text
00C723 1 drawtxt:
00C723 1 B1 44 lda (buflo),y
00C725 1 99 D0 07 sta $07D0,y ;put text on last line
00C728 1 C8 iny
00C729 1 D0 F8 bne drawtxt
00C72B 1
00C72B 1 ;load block 0000 at $0800
00C72B 1 A9 08 lda #$08
00C72D 1 85 45 sta bufhi
00C72F 1 85 FB sta jumpAddressHi
00C731 1 86 43 stx unit
00C733 1 D0 08 bne start
00C735 1 ;This is the ProDOS entry point for this card
00C735 1 entry:
00C735 1 A9 58 lda #<knownRts
00C737 1 85 FA sta jumpAddressLo
00C739 1 A9 FF lda #>knownRts
00C73B 1 85 FB sta jumpAddressHi
00C73D 1 start:
00C73D 1 A9 C0 lda #$C0
00C73F 1 85 FD sta ioAddressHi
00C741 1 20 58 FF jsr knownRts
00C744 1 BA tsx
00C745 1 BD 00 01 lda $0100,x
00C748 1 0A asl a
00C749 1 0A asl a
00C74A 1 0A asl a
00C74B 1 0A asl a
00C74C 1 AA tax
00C74D 1 E4 43 cpx unit ;make sure same as ProDOS
00C74F 1 F0 04 beq docmd ;yep, do command
00C751 1 38 sec ;nope, set device not connected
00C752 1 A9 28 lda #nodev
00C754 1 60 rts ;go back to ProDOS
00C755 1
00C755 1 docmd:
00C755 1 A5 42 lda command
00C757 1 F0 08 beq getstat ;command 0 is GetStatus
00C759 1 C9 01 cmp #$01
00C75B 1 F0 0C beq readblk ;command 1 is ReadBlock
00C75D 1 38 sec ;Format/Write not permitted
00C75E 1 A9 2B lda #wperr ;write protect error
00C760 1 60 rts ;go back to ProDOS
00C761 1
00C761 1 getstat:
00C761 1 18 clc ;send back status
00C762 1 A9 00 lda #$00 ;good status
00C764 1 A2 00 ldx #$00 ;1024 blocks
00C766 1 A0 04 ldy #$04 ;
00C768 1 60 rts
00C769 1
00C769 1 readblk:
00C769 1 A5 47 lda blkhi ;get hi block
00C76B 1 0A asl a ;shift up to top 3 bits
00C76C 1 0A asl a ;since that's all the high
00C76D 1 0A asl a ;blocks we can handle
00C76E 1 0A asl a ;
00C76F 1 0A asl a ;
00C770 1 85 F8 sta highLatch ;save it in scratch ram 0
00C772 1 ;so we can stuff it in the
00C772 1 ;high latch later
00C772 1 A5 46 lda blklo ;get low block
00C774 1 4A lsr a ;shift so we get the top 5
00C775 1 4A lsr a ;bits - this also goes in
00C776 1 4A lsr a ;the high latch
00C777 1 05 F8 ora highLatch ;add it to those top 3 bits
00C779 1 85 F8 sta highLatch ;save it back in scratch ram
00C77B 1 A5 46 lda blklo ;get low block
00C77D 1 0A asl a ;shift it to top 3 bits
00C77E 1 0A asl a ;
00C77F 1 0A asl a ;
00C780 1 0A asl a ;
00C781 1 0A asl a ;
00C782 1 85 F9 sta lowLatch
00C784 1 A9 02 lda #$02
00C786 1 85 FF sta blockHalfCounter
00C788 1
00C788 1 ;This gets 256 bytes from the ROM card
00C788 1
00C788 1 read256:
00C788 1 A0 00 ldy #$00
00C78A 1 A5 F8 lda highLatch ;get high latch value
00C78C 1 9D 81 C0 sta writeLatchHigh,x ;set high latch for card
00C78F 1 loop256:
00C78F 1 A5 F9 lda lowLatch
00C791 1 9D 80 C0 sta writeLatchLow,x
00C794 1 8A txa
00C795 1 09 80 ora #$80
00C797 1 85 FC sta ioAddressLo
00C799 1 loop16:
00C799 1 84 FE sty tempY
00C79B 1 A0 00 ldy #$00
00C79D 1 B1 FC lda (ioAddressLo),y
00C79F 1 A4 FE ldy tempY
00C7A1 1 91 44 sta (buflo),y
00C7A3 1 C8 iny
00C7A4 1 E6 FC inc ioAddressLo
00C7A6 1 A5 FC lda ioAddressLo
00C7A8 1 29 0F and #$0F
00C7AA 1 D0 ED bne loop16
00C7AC 1 E6 F9 inc lowLatch
00C7AE 1 C0 00 cpy #$00
00C7B0 1 D0 DD bne loop256
00C7B2 1 C6 FF dec blockHalfCounter
00C7B4 1 D0 08 bne readnext256
00C7B6 1 C6 45 dec bufhi
00C7B8 1 18 clc ;clear error code for success
00C7B9 1 A9 00 lda #$00
00C7BB 1 6C FA 00 jmp (jumpAddressLo)
00C7BE 1
00C7BE 1 readnext256:
00C7BE 1 E6 45 inc bufhi
00C7C0 1 18 clc
00C7C1 1 90 C5 bcc read256
00C7C3 1
00C7C3 1 ;macro for string with high-bit set
00C7C3 1 .macro aschi str
00C7C3 1 .repeat .strlen (str), c
00C7C3 1 .byte .strat (str, c) | $80
00C7C3 1 .endrep
00C7C3 1 .endmacro
00C7C3 1
00C7C3 1 D2 CF CD AD text: aschi "ROM-Drive (c)1998-2021 Terence J. Boldt"
00C7C7 1 C4 F2 E9 F6
00C7CB 1 E5 A0 A8 E3
00C7CF 1 A9 B1 B9 B9
00C7D3 1 B8 AD B2 B0
00C7D7 1 B2 B1 A0 D4
00C7DB 1 E5 F2 E5 EE
00C7DF 1 E3 E5 A0 CA
00C7E3 1 AE A0 C2 EF
00C7E7 1 EC E4 F4
00C7EA 1 end:
00C7EA 1 00 .byte 0
00C7EB 1
00C7EB 1 ; These bytes need to be at the top of the 256 byte firmware as ProDOS
00C7EB 1 ; uses these to find the entry point and drive capabilities
00C7EB 1
00C7EB 1 00 00 00 00 .repeat 251-<end
00C7EF 1 00 00 00 00
00C7F3 1 00 00 00 00
00C7F7 1 00 00 00 00
00C7FB 1 00
00C7FC 1 .byte 0
00C7FC 1 .endrepeat
00C7FC 1
00C7FC 1 00 00 .byte 0,0 ;0000 blocks = check status
00C7FE 1 03 .byte 3 ;bit 0=read 1=status
00C7FF 1 35 .byte <entry ;low byte of entry
00C800 1
00C800 1

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Firmware/GamesWithFirmware.po Executable file
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47
Firmware/Warning.asm
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@ -1 +1,46 @@
.byte "Do not overwrite any of blocks after this point as it is used for the firmware. There are 7 copies of the 256 byte firmware, one for each slot due to 6502 code being non-relocatable. Have fun and feel free to improve on the hardware / sofware. --- Terence"
printChar = $FDED
home = $FC58
.org $2000
jsr home
ldy #$0
nextChar:
lda text,y
beq infiniteLoop
jsr printChar
iny
clc
bcc nextChar
infiniteLoop:
clc
bcc infiniteLoop ;hang for eternity
.macro aschi str
.repeat .strlen (str), c
.byte .strat (str, c) | $80
.endrep
.endmacro
text:
aschi "Block 0001 normally reserved for SOS"
.byte $8D
aschi "boot contains the firmware for the"
.byte $8D
aschi "ProDOS ROM-Drive."
.byte $8D
.byte $8D
aschi "(c)1998 - 2021 Terence J. Boldt"
.byte $8D
.byte $8D
aschi "github.com/tjboldt/ProDOS-ROMDrive"
.byte $8D
.byte $8D
aschi "Do NOT overwrite Block 0001"
end:
.byte 0
.repeat 255-<end
.byte 0
.endrepeat

103
Firmware/Warning.lst Normal file
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ca65 V2.18 - N/A
Main file : Warning.asm
Current file: Warning.asm
000000r 1 printChar = $FDED
000000r 1 home = $FC58
000000r 1
000000r 1 .org $2000
002000 1
002000 1 20 58 FC jsr home
002003 1 A0 00 ldy #$0
002005 1 nextChar:
002005 1 B9 14 20 lda text,y
002008 1 F0 07 beq infiniteLoop
00200A 1 20 ED FD jsr printChar
00200D 1 C8 iny
00200E 1 18 clc
00200F 1 90 F4 bcc nextChar
002011 1 infiniteLoop:
002011 1 18 clc
002012 1 90 FD bcc infiniteLoop ;hang for eternity
002014 1
002014 1 .macro aschi str
002014 1 .repeat .strlen (str), c
002014 1 .byte .strat (str, c) | $80
002014 1 .endrep
002014 1 .endmacro
002014 1
002014 1 text:
002014 1 C2 EC EF E3 aschi "Block 0001 normally reserved for SOS"
002018 1 EB A0 B0 B0
00201C 1 B0 B1 A0 EE
002020 1 EF F2 ED E1
002024 1 EC EC F9 A0
002028 1 F2 E5 F3 E5
00202C 1 F2 F6 E5 E4
002030 1 A0 E6 EF F2
002034 1 A0 D3 CF D3
002038 1 8D .byte $8D
002039 1 E2 EF EF F4 aschi "boot contains the firmware for the"
00203D 1 A0 E3 EF EE
002041 1 F4 E1 E9 EE
002045 1 F3 A0 F4 E8
002049 1 E5 A0 E6 E9
00204D 1 F2 ED F7 E1
002051 1 F2 E5 A0 E6
002055 1 EF F2 A0 F4
002059 1 E8 E5
00205B 1 8D .byte $8D
00205C 1 D0 F2 EF C4 aschi "ProDOS ROM-Drive."
002060 1 CF D3 A0 D2
002064 1 CF CD AD C4
002068 1 F2 E9 F6 E5
00206C 1 AE
00206D 1 8D .byte $8D
00206E 1 8D .byte $8D
00206F 1 A8 E3 A9 B1 aschi "(c)1998 - 2021 Terence J. Boldt"
002073 1 B9 B9 B8 A0
002077 1 AD A0 B2 B0
00207B 1 B2 B1 A0 D4
00207F 1 E5 F2 E5 EE
002083 1 E3 E5 A0 CA
002087 1 AE A0 C2 EF
00208B 1 EC E4 F4
00208E 1 8D .byte $8D
00208F 1 8D .byte $8D
002090 1 E7 E9 F4 E8 aschi "github.com/tjboldt/ProDOS-ROMDrive"
002094 1 F5 E2 AE E3
002098 1 EF ED AF F4
00209C 1 EA E2 EF EC
0020A0 1 E4 F4 AF D0
0020A4 1 F2 EF C4 CF
0020A8 1 D3 AD D2 CF
0020AC 1 CD C4 F2 E9
0020B0 1 F6 E5
0020B2 1 8D .byte $8D
0020B3 1 8D .byte $8D
0020B4 1 C4 EF A0 CE aschi "Do NOT overwrite Block 0001"
0020B8 1 CF D4 A0 EF
0020BC 1 F6 E5 F2 F7
0020C0 1 F2 E9 F4 E5
0020C4 1 A0 C2 EC EF
0020C8 1 E3 EB A0 B0
0020CC 1 B0 B0 B1
0020CF 1
0020CF 1 end:
0020CF 1 00 .byte 0
0020D0 1
0020D0 1 00 00 00 00 .repeat 255-<end
0020D4 1 00 00 00 00
0020D8 1 00 00 00 00
0020DC 1 00 00 00 00
0020E0 1 00 00 00 00
0020E4 1 00 00 00 00
0020E8 1 00 00 00 00
0020EC 1 00 00 00 00
0020F0 1 00 00 00 00
0020F4 1 00 00 00 00
0020F8 1 00 00 00 00
0020FC 1 00 00 00 00
0020D0 1 .byte 0
0020D0 1 .endrepeat
0020D0 1

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Firmware/assemble.sh
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#!/bin/sh
ca65 Warning.asm -o warning.o
ca65 Firmware.asm -D SLOT1 -o slot1.o
ca65 Firmware.asm -D SLOT2 -o slot2.o
ca65 Firmware.asm -D SLOT3 -o slot3.o
ca65 Firmware.asm -D SLOT4 -o slot4.o
ca65 Firmware.asm -D SLOT5 -o slot5.o
ca65 Firmware.asm -D SLOT6 -o slot6.o
ca65 Firmware.asm -D SLOT7 -o slot7.o
ld65 -t none warning.o slot1.o slot2.o slot3.o slot4.o slot5.o slot6.o slot7.o -o Firmware.bin
ca65 Warning.asm -o warning.o --listing Warning.lst --list-bytes 255 || exit 1
ca65 Firmware.asm -o firmware.o --listing Firmware.lst --list-bytes 255 || exit 1
ld65 -t none warning.o firmware.o -o Firmware.bin || exit 1
# assumes ProDOS-Utilities is in your path: https://github.com/tjboldt/ProDOS-Utilities
rm BlankDriveWithFirmware.po || exit 1
ProDOS-Utilities -c create -d BlankDriveWithFirmware.po -v ROM -s 2048 || exit 1
ProDOS-Utilities -b 0x0001 -c writeblock -d GamesWithFirmware.po -i Firmware.bin || exit 1
ProDOS-Utilities -b 0x0001 -c writeblock -d BlankDriveWithFirmware.po -i Firmware.bin || exit 1
ProDOS-Utilities -b 0x0001 -c readblock -d BlankDriveWithFirmware.po || exit 1
ProDOS-Utilities -c ls -d BlankDriveWithFirmware.po || exit 1
cat Firmware.bin | dd of=BlankDriveWithFirmware.po bs=1 seek=1046528 count=2048 conv=notrunc

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Hardware/ProDOS ROM-Drive 2.2.pdf
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Hardware/ProDOS ROM-Drive 2.5 Back.jpg
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M48
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Hardware/ProDOS ROM-Drive 2.5.pro
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update=22/05/2015 07:44:53
version=1
last_client=kicad
[general]
version=1
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[pcbnew]
version=1
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UseCmpFile=1
PadDrill=0.600000000000
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PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
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[eeschema/libraries]

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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.0.1-3-g963ef8bb5)*
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G04 #@! TD*
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D10*
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P 2 4 2 10 -150 150 -25 150 f
P 12 4 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
X VCC 14 0 500 200 D 50 50 5 0 W
X GND 7 0 -500 200 U 50 50 5 0 W
X ~ 1 -300 100 150 R 50 50 1 1 I
X ~ 2 -300 -100 150 R 50 50 1 1 I
X ~ 3 300 0 150 L 50 50 1 1 O I
X ~ 4 -300 100 150 R 50 50 2 1 I
X ~ 5 -300 -100 150 R 50 50 2 1 I
X ~ 6 300 0 150 L 50 50 2 1 O I
X ~ 10 -300 -100 150 R 50 50 3 1 I
X ~ 8 300 0 150 L 50 50 3 1 O I
X ~ 9 -300 100 150 R 50 50 3 1 I
X ~ 11 300 0 150 L 50 50 4 1 O I
X ~ 12 -300 100 150 R 50 50 4 1 I
X ~ 13 -300 -100 150 R 50 50 4 1 I
X ~ 1 -300 100 170 R 50 50 1 2 I I
X ~ 2 -300 -100 170 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O
X ~ 4 -300 100 170 R 50 50 2 2 I I
X ~ 5 -300 -100 170 R 50 50 2 2 I I
X ~ 6 300 0 150 L 50 50 2 2 O
X ~ 10 -300 -100 170 R 50 50 3 2 I I
X ~ 8 300 0 150 L 50 50 3 2 O
X ~ 9 -300 100 170 R 50 50 3 2 I I
X ~ 11 300 0 150 L 50 50 4 2 O
X ~ 12 -300 100 170 R 50 50 4 2 I I
X ~ 13 -300 -100 170 R 50 50 4 2 I I
ENDDRAW
ENDDEF
#
# 74xx_74LS245
#
DEF 74xx_74LS245 U 0 40 Y Y 1 L N
F0 "U" -300 650 50 H V C CNN
F1 "74xx_74LS245" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HC245
$FPLIST
DIP?20*
$ENDFPLIST
DRAW
S -300 600 300 -600 1 1 10 f
P 3 1 0 0 -25 -50 -25 50 25 50 N
P 4 1 0 0 -50 -50 25 -50 25 50 50 50 N
X A->B 1 -500 -400 200 R 50 50 1 0 I
X GND 10 0 -800 200 U 50 50 1 0 W
X B7 11 500 -200 200 L 50 50 1 0 T
X B6 12 500 -100 200 L 50 50 1 0 T
X B5 13 500 0 200 L 50 50 1 0 T
X B4 14 500 100 200 L 50 50 1 0 T
X B3 15 500 200 200 L 50 50 1 0 T
X B2 16 500 300 200 L 50 50 1 0 T
X B1 17 500 400 200 L 50 50 1 0 T
X B0 18 500 500 200 L 50 50 1 0 T
X CE 19 -500 -500 200 R 50 50 1 0 I I
X A0 2 -500 500 200 R 50 50 1 0 T
X VCC 20 0 800 200 D 50 50 1 0 W
X A1 3 -500 400 200 R 50 50 1 0 T
X A2 4 -500 300 200 R 50 50 1 0 T
X A3 5 -500 200 200 R 50 50 1 0 T
X A4 6 -500 100 200 R 50 50 1 0 T
X A5 7 -500 0 200 R 50 50 1 0 T
X A6 8 -500 -100 200 R 50 50 1 0 T
X A7 9 -500 -200 200 R 50 50 1 0 T
ENDDRAW
ENDDEF
#
# 74xx_74LS32
#
DEF 74xx_74LS32 U 0 40 Y Y 5 L N
F0 "U" 0 50 50 H V C CNN
F1 "74xx_74LS32" 0 -50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP?14*
$ENDFPLIST
DRAW
A -360 0 258 354 -354 1 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 1 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 1 1 10 f 150 0 -24 -150
A -360 0 258 354 -354 2 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 2 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 2 1 10 f 150 0 -24 -150
A -360 0 258 354 -354 3 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 3 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 3 1 10 f 150 0 -24 -150
A -360 0 258 354 -354 4 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 4 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 4 1 10 f 150 0 -24 -150
A 0 0 150 -899 899 1 2 10 f 0 -150 0 150
A 0 0 150 -899 899 2 2 10 f 0 -150 0 150
A 0 0 150 -899 899 3 2 10 f 0 -150 0 150
A 0 0 150 -899 899 4 2 10 f 0 -150 0 150
S -200 300 200 -300 5 1 10 f
P 2 1 1 10 -150 -150 -25 -150 f
P 2 1 1 10 -150 150 -25 150 f
P 12 1 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 2 1 10 -150 -150 -25 -150 f
P 2 2 1 10 -150 150 -25 150 f
P 12 2 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 3 1 10 -150 -150 -25 -150 f
P 2 3 1 10 -150 150 -25 150 f
P 12 3 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 4 1 10 -150 -150 -25 -150 f
P 2 4 1 10 -150 150 -25 150 f
P 12 4 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 4 1 2 10 0 150 -150 150 -150 -150 0 -150 f
P 4 2 2 10 0 150 -150 150 -150 -150 0 -150 f
P 4 3 2 10 0 150 -150 150 -150 -150 0 -150 f
P 4 4 2 10 0 150 -150 150 -150 -150 0 -150 f
X VCC 14 0 500 200 D 50 50 5 0 W
X GND 7 0 -500 200 U 50 50 5 0 W
X ~ 1 -300 100 170 R 50 50 1 1 I
X ~ 2 -300 -100 170 R 50 50 1 1 I
X ~ 3 300 0 150 L 50 50 1 1 O
X ~ 4 -300 100 170 R 50 50 2 1 I
X ~ 5 -300 -100 170 R 50 50 2 1 I
X ~ 6 300 0 150 L 50 50 2 1 O
X ~ 10 -300 -100 170 R 50 50 3 1 I
X ~ 8 300 0 150 L 50 50 3 1 O
X ~ 9 -300 100 170 R 50 50 3 1 I
X ~ 11 300 0 150 L 50 50 4 1 O
X ~ 12 -300 100 170 R 50 50 4 1 I
X ~ 13 -300 -100 170 R 50 50 4 1 I
X ~ 1 -300 100 150 R 50 50 1 2 I I
X ~ 2 -300 -100 150 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O I
X ~ 4 -300 100 150 R 50 50 2 2 I I
X ~ 5 -300 -100 150 R 50 50 2 2 I I
X ~ 6 300 0 150 L 50 50 2 2 O I
X ~ 10 -300 -100 150 R 50 50 3 2 I I
X ~ 8 300 0 150 L 50 50 3 2 O I
X ~ 9 -300 100 150 R 50 50 3 2 I I
X ~ 11 300 0 150 L 50 50 4 2 O I
X ~ 12 -300 100 150 R 50 50 4 2 I I
X ~ 13 -300 -100 150 R 50 50 4 2 I I
ENDDRAW
ENDDEF
#
# 74xx_74LS374
#
DEF 74xx_74LS374 U 0 20 Y Y 1 F N
F0 "U" -300 650 50 H V C CNN
F1 "74xx_74LS374" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HC374 74HCT374 74AHC374 74AHCT374
$FPLIST
DIP?20*
SOIC?20*
SO?20*
$ENDFPLIST
DRAW
S -300 600 300 -600 1 1 10 f
X OE 1 -500 -500 200 R 50 50 1 0 I I
X GND 10 0 -800 200 U 50 50 1 0 W
X Cp 11 -500 -400 200 R 50 50 1 0 I C
X O4 12 500 100 200 L 50 50 1 0 T
X D4 13 -500 100 200 R 50 50 1 0 I
X D5 14 -500 0 200 R 50 50 1 0 I
X O5 15 500 0 200 L 50 50 1 0 T
X O6 16 500 -100 200 L 50 50 1 0 T
X D6 17 -500 -100 200 R 50 50 1 0 I
X D7 18 -500 -200 200 R 50 50 1 0 I
X O7 19 500 -200 200 L 50 50 1 0 T
X O0 2 500 500 200 L 50 50 1 0 T
X VCC 20 0 800 200 D 50 50 1 0 W
X D0 3 -500 500 200 R 50 50 1 0 I
X D1 4 -500 400 200 R 50 50 1 0 I
X O1 5 500 400 200 L 50 50 1 0 T
X O2 6 500 300 200 L 50 50 1 0 T
X D2 7 -500 300 200 R 50 50 1 0 I
X D3 8 -500 200 200 R 50 50 1 0 I
X O3 9 500 200 200 L 50 50 1 0 T
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x25_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 1300 50 H V C CNN
F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1250 150 -1250 1 1 10 f
S 150 -1195 100 -1205 1 1 6 N
S 150 -1095 100 -1105 1 1 6 N
S 150 -995 100 -1005 1 1 6 N
S 150 -895 100 -905 1 1 6 N
S 150 -795 100 -805 1 1 6 N
S 150 -695 100 -705 1 1 6 N
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
S 150 705 100 695 1 1 6 N
S 150 805 100 795 1 1 6 N
S 150 905 100 895 1 1 6 N
S 150 1005 100 995 1 1 6 N
S 150 1105 100 1095 1 1 6 N
S 150 1205 100 1195 1 1 6 N
X Pin_1 1 -200 1200 150 R 50 50 1 1 P
X Pin_10 10 -200 300 150 R 50 50 1 1 P
X Pin_11 11 -200 200 150 R 50 50 1 1 P
X Pin_12 12 -200 100 150 R 50 50 1 1 P
X Pin_13 13 -200 0 150 R 50 50 1 1 P
X Pin_14 14 -200 -100 150 R 50 50 1 1 P
X Pin_15 15 -200 -200 150 R 50 50 1 1 P
X Pin_16 16 -200 -300 150 R 50 50 1 1 P
X Pin_17 17 -200 -400 150 R 50 50 1 1 P
X Pin_18 18 -200 -500 150 R 50 50 1 1 P
X Pin_19 19 -200 -600 150 R 50 50 1 1 P
X Pin_2 2 -200 1100 150 R 50 50 1 1 P
X Pin_20 20 -200 -700 150 R 50 50 1 1 P
X Pin_21 21 -200 -800 150 R 50 50 1 1 P
X Pin_22 22 -200 -900 150 R 50 50 1 1 P
X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
X Pin_26 26 300 -1200 150 L 50 50 1 1 P
X Pin_27 27 300 -1100 150 L 50 50 1 1 P
X Pin_28 28 300 -1000 150 L 50 50 1 1 P
X Pin_29 29 300 -900 150 L 50 50 1 1 P
X Pin_3 3 -200 1000 150 R 50 50 1 1 P
X Pin_30 30 300 -800 150 L 50 50 1 1 P
X Pin_31 31 300 -700 150 L 50 50 1 1 P
X Pin_32 32 300 -600 150 L 50 50 1 1 P
X Pin_33 33 300 -500 150 L 50 50 1 1 P
X Pin_34 34 300 -400 150 L 50 50 1 1 P
X Pin_35 35 300 -300 150 L 50 50 1 1 P
X Pin_36 36 300 -200 150 L 50 50 1 1 P
X Pin_37 37 300 -100 150 L 50 50 1 1 P
X Pin_38 38 300 0 150 L 50 50 1 1 P
X Pin_39 39 300 100 150 L 50 50 1 1 P
X Pin_4 4 -200 900 150 R 50 50 1 1 P
X Pin_40 40 300 200 150 L 50 50 1 1 P
X Pin_41 41 300 300 150 L 50 50 1 1 P
X Pin_42 42 300 400 150 L 50 50 1 1 P
X Pin_43 43 300 500 150 L 50 50 1 1 P
X Pin_44 44 300 600 150 L 50 50 1 1 P
X Pin_45 45 300 700 150 L 50 50 1 1 P
X Pin_46 46 300 800 150 L 50 50 1 1 P
X Pin_47 47 300 900 150 L 50 50 1 1 P
X Pin_48 48 300 1000 150 L 50 50 1 1 P
X Pin_49 49 300 1100 150 L 50 50 1 1 P
X Pin_5 5 -200 800 150 R 50 50 1 1 P
X Pin_50 50 300 1200 150 L 50 50 1 1 P
X Pin_6 6 -200 700 150 R 50 50 1 1 P
X Pin_7 7 -200 600 150 R 50 50 1 1 P
X Pin_8 8 -200 500 150 R 50 50 1 1 P
X Pin_9 9 -200 400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Memory_EPROM_27C080
#
DEF Memory_EPROM_27C080 U 0 20 Y Y 1 F N
F0 "U" -300 1250 50 H V C CNN
F1 "Memory_EPROM_27C080" 100 -1250 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP*W15.24mm*
PLCC*
$ENDFPLIST
DRAW
S -300 1200 300 -1200 1 1 10 f
X A19 1 -400 -800 100 R 50 50 1 1 I
X A2 10 -400 900 100 R 50 50 1 1 I
X A1 11 -400 1000 100 R 50 50 1 1 I
X A0 12 -400 1100 100 R 50 50 1 1 I
X D0 13 400 1100 100 L 50 50 1 1 T
X D1 14 400 1000 100 L 50 50 1 1 T
X D2 15 400 900 100 L 50 50 1 1 T
X GND 16 0 -1300 100 U 50 50 1 1 W
X D3 17 400 800 100 L 50 50 1 1 T
X D4 18 400 700 100 L 50 50 1 1 T
X D5 19 400 600 100 L 50 50 1 1 T
X A16 2 -400 -500 100 R 50 50 1 1 I
X D6 20 400 500 100 L 50 50 1 1 T
X D7 21 400 400 100 L 50 50 1 1 T
X ~CE 22 -400 -1000 100 R 50 50 1 1 I
X A10 23 -400 100 100 R 50 50 1 1 I
X ~OE 24 -400 -1100 100 R 50 50 1 1 I
X A11 25 -400 0 100 R 50 50 1 1 I
X A9 26 -400 200 100 R 50 50 1 1 I
X A8 27 -400 300 100 R 50 50 1 1 I
X A13 28 -400 -200 100 R 50 50 1 1 I
X A14 29 -400 -300 100 R 50 50 1 1 I
X A15 3 -400 -400 100 R 50 50 1 1 I
X A17 30 -400 -600 100 R 50 50 1 1 I
X A18 31 -400 -700 100 R 50 50 1 1 I
X VCC 32 0 1300 100 D 50 50 1 1 W
X A12 4 -400 -100 100 R 50 50 1 1 I
X A7 5 -400 400 100 R 50 50 1 1 I
X A6 6 -400 500 100 R 50 50 1 1 I
X A5 7 -400 600 100 R 50 50 1 1 I
X A4 8 -400 700 100 R 50 50 1 1 I
X A3 9 -400 800 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

1402
Hardware/ProDOS ROM-Drive 2.5.kicad_pcb → Hardware/ProDOS ROM-Drive 3.0.kicad_pcb Executable file → Normal file
View File

File diff suppressed because it is too large Load Diff

425
Hardware/ProDOS ROM-Drive 2.2.net → Hardware/ProDOS ROM-Drive 3.0.net Executable file → Normal file
View File

@ -1,15 +1,15 @@
(export (version D)
(design
(source "/Volumes/data1/Apple2/ProDOS ROM-Drive 2/ProDOS ROM-Drive 2.2.sch")
(date "Tuesday, April 02, 2019 at 10:07:18 pm")
(tool "Eeschema (5.0.1-3-g963ef8bb5)")
(source "/Users/terence/source/ProDOS-ROM-Drive/Hardware/ProDOS ROM-Drive 3.0.sch")
(date "Wednesday, December 08, 2021 at 10:18:30 pm")
(tool "Eeschema (5.1.10-1-10_14)")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title "ProDOS ROM-Drive")
(company)
(rev 2.2)
(date)
(source "ProDOS ROM-Drive 2.2.sch")
(rev 3.0)
(date 2021-12-07)
(source "ProDOS ROM-Drive 3.0.sch")
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
@ -219,10 +219,17 @@
(pin (num 13) (name ~) (type input))
(pin (num 14) (name VCC) (type power_in))))
(libpart (lib 74xx) (part 74LS374)
(aliases
(alias 74HC374)
(alias 74HCT374)
(alias 74AHC374)
(alias 74AHCT374))
(description "8-bit Register, 3-state outputs")
(docs http://www.ti.com/lit/gpn/sn74LS374)
(footprints
(fp DIP?20*))
(fp DIP?20*)
(fp SOIC?20*)
(fp SO?20*))
(fields
(field (name Reference) U)
(field (name Value) 74LS374))
@ -370,14 +377,11 @@
(uri "/Library/Application Support/kicad/library/Memory_EPROM.lib")))
(nets
(net (code 1) (name "Net-(J1-Pad10)")
(node (ref J1) (pin 10))
(node (ref LowAddrBuffer1) (pin 6)))
(node (ref J1) (pin 10)))
(net (code 2) (name "Net-(J1-Pad11)")
(node (ref LowAddrBuffer1) (pin 7))
(node (ref J1) (pin 11)))
(net (code 3) (name "Net-(J1-Pad12)")
(node (ref J1) (pin 12))
(node (ref LowAddrBuffer1) (pin 8)))
(node (ref J1) (pin 12)))
(net (code 4) (name "Net-(J1-Pad13)")
(node (ref J1) (pin 13)))
(net (code 5) (name "Net-(J1-Pad14)")
@ -389,8 +393,8 @@
(net (code 8) (name "Net-(J1-Pad17)")
(node (ref J1) (pin 17)))
(net (code 9) (name "Net-(J1-Pad18)")
(node (ref U1) (pin 9))
(node (ref U1) (pin 10))
(node (ref U1) (pin 9))
(node (ref U2) (pin 4))
(node (ref J1) (pin 18)))
(net (code 10) (name "Net-(J1-Pad19)")
@ -402,16 +406,16 @@
(net (code 13) (name "Net-(J1-Pad22)")
(node (ref J1) (pin 22)))
(net (code 14) (name "Net-(J1-Pad24)")
(node (ref J1) (pin 24))
(node (ref J1) (pin 27)))
(node (ref J1) (pin 27))
(node (ref J1) (pin 24)))
(net (code 15) (name "Net-(J1-Pad23)")
(node (ref J1) (pin 23))
(node (ref J1) (pin 28)))
(node (ref J1) (pin 28))
(node (ref J1) (pin 23)))
(net (code 16) (name "Net-(J1-Pad29)")
(node (ref J1) (pin 29)))
(net (code 17) (name "Net-(EPROM1-Pad11)")
(node (ref EPROM1) (pin 11))
(node (ref J1) (pin 3)))
(node (ref J1) (pin 3))
(node (ref EPROM1) (pin 11)))
(net (code 18) (name "Net-(J1-Pad30)")
(node (ref J1) (pin 30)))
(net (code 19) (name "Net-(J1-Pad31)")
@ -433,13 +437,13 @@
(net (code 27) (name "Net-(J1-Pad39)")
(node (ref J1) (pin 39)))
(net (code 28) (name "Net-(EPROM1-Pad10)")
(node (ref EPROM1) (pin 10))
(node (ref J1) (pin 4)))
(node (ref J1) (pin 4))
(node (ref EPROM1) (pin 10)))
(net (code 29) (name "Net-(J1-Pad40)")
(node (ref J1) (pin 40)))
(net (code 30) (name "Net-(EPROM1-Pad9)")
(node (ref EPROM1) (pin 9))
(node (ref J1) (pin 5)))
(node (ref J1) (pin 5))
(node (ref EPROM1) (pin 9)))
(net (code 31) (name "Net-(J1-Pad50)")
(node (ref J1) (pin 50)))
(net (code 32) (name "Net-(J1-Pad6)")
@ -451,227 +455,230 @@
(net (code 34) (name "Net-(J1-Pad9)")
(node (ref LowAddrBuffer1) (pin 5))
(node (ref J1) (pin 9)))
(net (code 35) (name "Net-(HiAddrBuffer1-Pad19)")
(node (ref LowAddrBuffer1) (pin 19))
(node (ref J1) (pin 1))
(node (ref U1) (pin 1))
(node (ref HiAddrBuffer1) (pin 19)))
(net (code 36) (name "Net-(U1-Pad3)")
(net (code 35) (name "Net-(U1-Pad3)")
(node (ref U1) (pin 5))
(node (ref U1) (pin 4))
(node (ref U1) (pin 3)))
(net (code 37) (name "Net-(DataBuffer1-Pad19)")
(net (code 36) (name "Net-(DataBuffer1-Pad19)")
(node (ref DataBuffer1) (pin 19))
(node (ref U1) (pin 6))
(node (ref U2) (pin 1)))
(net (code 38) (name "Net-(DataBuffer1-Pad1)")
(net (code 37) (name "Net-(DataBuffer1-Pad1)")
(node (ref U2) (pin 2))
(node (ref DataBuffer1) (pin 1))
(node (ref U1) (pin 8)))
(net (code 39) (name "Net-(U1-Pad11)")
(node (ref U2) (pin 13))
(node (ref U1) (pin 11)))
(net (code 40) (name "Net-(U2-Pad12)")
(node (ref U1) (pin 8))
(node (ref DataBuffer1) (pin 1)))
(net (code 38) (name "Net-(U1-Pad11)")
(node (ref U1) (pin 11))
(node (ref U2) (pin 13)))
(net (code 39) (name "Net-(U2-Pad12)")
(node (ref U2) (pin 6))
(node (ref U2) (pin 9))
(node (ref U2) (pin 12))
(node (ref U2) (pin 6)))
(net (code 41) (name "Net-(EPROM1-Pad12)")
(node (ref U2) (pin 12)))
(net (code 40) (name "Net-(EPROM1-Pad12)")
(node (ref EPROM1) (pin 12))
(node (ref U1) (pin 13))
(node (ref J1) (pin 2))
(node (ref U2) (pin 10))
(node (ref U1) (pin 12)))
(net (code 42) (name "Net-(HiAddrLatch1-Pad11)")
(node (ref U2) (pin 11))
(node (ref HiAddrLatch1) (pin 11)))
(net (code 43) (name "Net-(DataBuffer1-Pad11)")
(node (ref U1) (pin 12))
(node (ref U1) (pin 13))
(node (ref U2) (pin 10)))
(net (code 41) (name "Net-(HiAddrLatch1-Pad11)")
(node (ref HiAddrLatch1) (pin 11))
(node (ref U2) (pin 11)))
(net (code 42) (name "Net-(DataBuffer1-Pad11)")
(node (ref DataBuffer1) (pin 11))
(node (ref EPROM1) (pin 21)))
(net (code 44) (name "Net-(DataBuffer1-Pad13)")
(node (ref DataBuffer1) (pin 13))
(node (ref EPROM1) (pin 19)))
(net (code 45) (name "Net-(DataBuffer1-Pad15)")
(net (code 43) (name "Net-(DataBuffer1-Pad13)")
(node (ref EPROM1) (pin 19))
(node (ref DataBuffer1) (pin 13)))
(net (code 44) (name "Net-(DataBuffer1-Pad15)")
(node (ref EPROM1) (pin 17))
(node (ref DataBuffer1) (pin 15)))
(net (code 46) (name "Net-(EPROM1-Pad25)")
(node (ref EPROM1) (pin 25))
(net (code 45) (name "Net-(EPROM1-Pad25)")
(node (ref LowAddrLatch1) (pin 19))
(node (ref EPROM1) (pin 25))
(node (ref LowAddrBuffer1) (pin 11)))
(net (code 47) (name "Net-(EPROM1-Pad23)")
(node (ref LowAddrBuffer1) (pin 12))
(net (code 46) (name "Net-(EPROM1-Pad23)")
(node (ref LowAddrLatch1) (pin 16))
(node (ref EPROM1) (pin 23))
(node (ref LowAddrLatch1) (pin 16)))
(net (code 48) (name "Net-(EPROM1-Pad26)")
(node (ref EPROM1) (pin 26))
(node (ref LowAddrBuffer1) (pin 12)))
(net (code 47) (name "Net-(EPROM1-Pad26)")
(node (ref LowAddrBuffer1) (pin 13))
(node (ref LowAddrLatch1) (pin 15)))
(net (code 49) (name "Net-(EPROM1-Pad27)")
(node (ref LowAddrLatch1) (pin 15))
(node (ref EPROM1) (pin 26)))
(net (code 48) (name "Net-(EPROM1-Pad27)")
(node (ref LowAddrBuffer1) (pin 14))
(node (ref LowAddrLatch1) (pin 12))
(node (ref EPROM1) (pin 27)))
(net (code 50) (name "Net-(EPROM1-Pad5)")
(node (ref EPROM1) (pin 27))
(node (ref LowAddrLatch1) (pin 12)))
(net (code 49) (name "Net-(EPROM1-Pad5)")
(node (ref EPROM1) (pin 5))
(node (ref LowAddrLatch1) (pin 9))
(node (ref LowAddrBuffer1) (pin 15)))
(net (code 51) (name "Net-(EPROM1-Pad6)")
(node (ref LowAddrBuffer1) (pin 16))
(net (code 50) (name "Net-(EPROM1-Pad6)")
(node (ref EPROM1) (pin 6))
(node (ref LowAddrLatch1) (pin 6))
(node (ref EPROM1) (pin 6)))
(net (code 52) (name "Net-(EPROM1-Pad7)")
(node (ref LowAddrBuffer1) (pin 17))
(node (ref LowAddrBuffer1) (pin 16)))
(net (code 51) (name "Net-(EPROM1-Pad7)")
(node (ref EPROM1) (pin 7))
(node (ref LowAddrLatch1) (pin 5))
(node (ref EPROM1) (pin 7)))
(net (code 53) (name "Net-(EPROM1-Pad8)")
(node (ref LowAddrBuffer1) (pin 17)))
(net (code 52) (name "Net-(EPROM1-Pad8)")
(node (ref EPROM1) (pin 8))
(node (ref LowAddrBuffer1) (pin 18))
(node (ref LowAddrLatch1) (pin 2))
(node (ref EPROM1) (pin 8)))
(net (code 54) (name "Net-(EPROM1-Pad1)")
(node (ref HiAddrBuffer1) (pin 11))
(node (ref EPROM1) (pin 1))
(node (ref HiAddrLatch1) (pin 19)))
(net (code 55) (name "Net-(EPROM1-Pad31)")
(node (ref EPROM1) (pin 31))
(node (ref HiAddrLatch1) (pin 16))
(node (ref HiAddrBuffer1) (pin 12)))
(net (code 56) (name "Net-(EPROM1-Pad30)")
(node (ref HiAddrBuffer1) (pin 13))
(node (ref EPROM1) (pin 30))
(node (ref HiAddrLatch1) (pin 15)))
(net (code 57) (name "Net-(EPROM1-Pad2)")
(node (ref HiAddrLatch1) (pin 12))
(node (ref HiAddrBuffer1) (pin 14))
(node (ref EPROM1) (pin 2)))
(net (code 58) (name "Net-(EPROM1-Pad3)")
(node (ref HiAddrLatch1) (pin 9))
(node (ref EPROM1) (pin 3))
(node (ref HiAddrBuffer1) (pin 15)))
(net (code 59) (name "Net-(EPROM1-Pad29)")
(node (ref HiAddrLatch1) (pin 6))
(node (ref HiAddrBuffer1) (pin 16))
(node (ref EPROM1) (pin 29)))
(net (code 60) (name "Net-(EPROM1-Pad28)")
(node (ref HiAddrBuffer1) (pin 17))
(node (ref HiAddrLatch1) (pin 5))
(node (ref EPROM1) (pin 28)))
(net (code 61) (name "Net-(EPROM1-Pad4)")
(node (ref EPROM1) (pin 4))
(node (ref HiAddrLatch1) (pin 2))
(node (ref HiAddrBuffer1) (pin 18)))
(net (code 62) (name "Net-(LowAddrLatch1-Pad11)")
(node (ref U2) (pin 8))
(node (ref LowAddrLatch1) (pin 11)))
(net (code 63) (name "Net-(DataBuffer1-Pad6)")
(node (ref LowAddrLatch1) (pin 13))
(node (ref HiAddrLatch1) (pin 13))
(node (ref J1) (pin 45))
(node (ref DataBuffer1) (pin 6)))
(net (code 64) (name "Net-(DataBuffer1-Pad7)")
(node (ref DataBuffer1) (pin 7))
(node (ref HiAddrLatch1) (pin 14))
(node (ref J1) (pin 44))
(node (ref LowAddrLatch1) (pin 14)))
(net (code 65) (name "Net-(DataBuffer1-Pad8)")
(node (ref DataBuffer1) (pin 8))
(node (ref HiAddrLatch1) (pin 17))
(node (ref LowAddrLatch1) (pin 17))
(node (ref J1) (pin 43)))
(net (code 66) (name "Net-(DataBuffer1-Pad2)")
(node (ref DataBuffer1) (pin 2))
(node (ref HiAddrLatch1) (pin 3))
(node (ref LowAddrLatch1) (pin 3))
(node (ref J1) (pin 49)))
(net (code 67) (name "Net-(DataBuffer1-Pad3)")
(node (ref DataBuffer1) (pin 3))
(node (ref J1) (pin 48))
(node (ref LowAddrLatch1) (pin 4))
(node (ref HiAddrLatch1) (pin 4)))
(net (code 68) (name "Net-(DataBuffer1-Pad4)")
(node (ref LowAddrLatch1) (pin 7))
(node (ref DataBuffer1) (pin 4))
(node (ref J1) (pin 47))
(node (ref HiAddrLatch1) (pin 7)))
(net (code 69) (name "Net-(DataBuffer1-Pad5)")
(node (ref HiAddrLatch1) (pin 8))
(node (ref J1) (pin 46))
(node (ref DataBuffer1) (pin 5))
(node (ref LowAddrLatch1) (pin 8)))
(net (code 70) (name "Net-(DataBuffer1-Pad12)")
(node (ref EPROM1) (pin 20))
(node (ref DataBuffer1) (pin 12)))
(net (code 71) (name "Net-(EPROM1-Pad22)")
(node (ref EPROM1) (pin 24))
(node (ref EPROM1) (pin 22))
(node (ref U2) (pin 3)))
(net (code 72) (name "Net-(DataBuffer1-Pad18)")
(node (ref EPROM1) (pin 13))
(node (ref DataBuffer1) (pin 18)))
(net (code 73) (name "Net-(DataBuffer1-Pad17)")
(node (ref EPROM1) (pin 14))
(node (ref DataBuffer1) (pin 17)))
(net (code 74) (name "Net-(DataBuffer1-Pad16)")
(node (ref DataBuffer1) (pin 16))
(node (ref EPROM1) (pin 15)))
(net (code 75) (name "Net-(DataBuffer1-Pad14)")
(node (ref EPROM1) (pin 18))
(node (ref DataBuffer1) (pin 14)))
(net (code 76) (name "Net-(J1-Pad7)")
(node (ref J1) (pin 7))
(node (ref LowAddrBuffer1) (pin 3)))
(net (code 77) (name "Net-(HiAddrLatch1-Pad1)")
(node (ref U2) (pin 5))
(node (ref U1) (pin 2))
(node (ref J1) (pin 41))
(node (ref LowAddrLatch1) (pin 1))
(node (ref HiAddrLatch1) (pin 1)))
(net (code 78) (name "Net-(DataBuffer1-Pad9)")
(node (ref HiAddrLatch1) (pin 18))
(node (ref J1) (pin 42))
(node (ref DataBuffer1) (pin 9))
(node (ref LowAddrLatch1) (pin 18)))
(net (code 79) (name GND)
(node (ref LowAddrLatch1) (pin 2)))
(net (code 53) (name "Net-(HiAddrBuffer1-Pad19)")
(node (ref J1) (pin 1))
(node (ref HiAddrBuffer1) (pin 19))
(node (ref LowAddrBuffer1) (pin 19))
(node (ref U1) (pin 1)))
(net (code 54) (name +5V)
(node (ref C3) (pin 1))
(node (ref C7) (pin 1))
(node (ref C6) (pin 1))
(node (ref C5) (pin 1))
(node (ref C1) (pin 1))
(node (ref C2) (pin 1))
(node (ref C8) (pin 1))
(node (ref U2) (pin 14))
(node (ref U1) (pin 14))
(node (ref DataBuffer1) (pin 20))
(node (ref LowAddrBuffer1) (pin 1))
(node (ref C4) (pin 1))
(node (ref LowAddrBuffer1) (pin 20))
(node (ref LowAddrBuffer1) (pin 6))
(node (ref LowAddrBuffer1) (pin 7))
(node (ref HiAddrBuffer1) (pin 1))
(node (ref HiAddrBuffer1) (pin 20))
(node (ref J1) (pin 25))
(node (ref EPROM1) (pin 32))
(node (ref LowAddrLatch1) (pin 20))
(node (ref HiAddrLatch1) (pin 20)))
(net (code 55) (name GND)
(node (ref HiAddrBuffer1) (pin 10))
(node (ref LowAddrBuffer1) (pin 9))
(node (ref LowAddrBuffer1) (pin 8))
(node (ref HiAddrBuffer1) (pin 2))
(node (ref HiAddrBuffer1) (pin 3))
(node (ref C4) (pin 2))
(node (ref C3) (pin 2))
(node (ref C7) (pin 2))
(node (ref C6) (pin 2))
(node (ref HiAddrBuffer1) (pin 4))
(node (ref HiAddrBuffer1) (pin 5))
(node (ref C5) (pin 2))
(node (ref C1) (pin 2))
(node (ref HiAddrLatch1) (pin 10))
(node (ref C2) (pin 2))
(node (ref C8) (pin 2))
(node (ref J1) (pin 26))
(node (ref U1) (pin 7))
(node (ref LowAddrBuffer1) (pin 10))
(node (ref U2) (pin 7))
(node (ref HiAddrLatch1) (pin 10))
(node (ref U1) (pin 7))
(node (ref DataBuffer1) (pin 10))
(node (ref EPROM1) (pin 16))
(node (ref HiAddrBuffer1) (pin 6))
(node (ref HiAddrBuffer1) (pin 7))
(node (ref LowAddrLatch1) (pin 10))
(node (ref HiAddrBuffer1) (pin 10))
(node (ref DataBuffer1) (pin 10)))
(net (code 80) (name +5V)
(node (ref DataBuffer1) (pin 20))
(node (ref HiAddrBuffer1) (pin 9))
(node (ref HiAddrBuffer1) (pin 8))
(node (ref HiAddrBuffer1) (pin 7))
(node (ref HiAddrBuffer1) (pin 6))
(node (ref HiAddrBuffer1) (pin 5))
(node (ref HiAddrBuffer1) (pin 4))
(node (ref LowAddrBuffer1) (pin 1))
(node (ref LowAddrBuffer1) (pin 20))
(node (ref LowAddrBuffer1) (pin 9))
(node (ref J1) (pin 25))
(node (ref HiAddrBuffer1) (pin 3))
(node (ref C8) (pin 1))
(node (ref C2) (pin 1))
(node (ref C1) (pin 1))
(node (ref C5) (pin 1))
(node (ref C6) (pin 1))
(node (ref C7) (pin 1))
(node (ref C3) (pin 1))
(node (ref C4) (pin 1))
(node (ref LowAddrLatch1) (pin 20))
(node (ref U1) (pin 14))
(node (ref U2) (pin 14))
(node (ref HiAddrLatch1) (pin 20))
(node (ref HiAddrBuffer1) (pin 20))
(node (ref HiAddrBuffer1) (pin 2))
(node (ref HiAddrBuffer1) (pin 1))
(node (ref EPROM1) (pin 32)))))
(node (ref LowAddrBuffer1) (pin 10))
(node (ref J1) (pin 26)))
(net (code 56) (name "Net-(EPROM1-Pad1)")
(node (ref HiAddrLatch1) (pin 19))
(node (ref EPROM1) (pin 1))
(node (ref HiAddrBuffer1) (pin 11)))
(net (code 57) (name "Net-(EPROM1-Pad31)")
(node (ref HiAddrLatch1) (pin 16))
(node (ref EPROM1) (pin 31))
(node (ref HiAddrBuffer1) (pin 12)))
(net (code 58) (name "Net-(EPROM1-Pad30)")
(node (ref HiAddrBuffer1) (pin 13))
(node (ref EPROM1) (pin 30))
(node (ref HiAddrLatch1) (pin 15)))
(net (code 59) (name "Net-(EPROM1-Pad2)")
(node (ref EPROM1) (pin 2))
(node (ref HiAddrBuffer1) (pin 14))
(node (ref HiAddrLatch1) (pin 12)))
(net (code 60) (name "Net-(EPROM1-Pad3)")
(node (ref HiAddrLatch1) (pin 9))
(node (ref HiAddrBuffer1) (pin 15))
(node (ref EPROM1) (pin 3)))
(net (code 61) (name "Net-(EPROM1-Pad29)")
(node (ref HiAddrLatch1) (pin 6))
(node (ref EPROM1) (pin 29))
(node (ref HiAddrBuffer1) (pin 16)))
(net (code 62) (name "Net-(EPROM1-Pad28)")
(node (ref HiAddrBuffer1) (pin 17))
(node (ref HiAddrLatch1) (pin 5))
(node (ref EPROM1) (pin 28)))
(net (code 63) (name "Net-(EPROM1-Pad4)")
(node (ref HiAddrLatch1) (pin 2))
(node (ref EPROM1) (pin 4))
(node (ref HiAddrBuffer1) (pin 18)))
(net (code 64) (name "Net-(LowAddrLatch1-Pad11)")
(node (ref LowAddrLatch1) (pin 11))
(node (ref U2) (pin 8)))
(net (code 65) (name "Net-(DataBuffer1-Pad6)")
(node (ref HiAddrLatch1) (pin 13))
(node (ref DataBuffer1) (pin 6))
(node (ref J1) (pin 45))
(node (ref LowAddrLatch1) (pin 13)))
(net (code 66) (name "Net-(DataBuffer1-Pad7)")
(node (ref J1) (pin 44))
(node (ref HiAddrLatch1) (pin 14))
(node (ref DataBuffer1) (pin 7))
(node (ref LowAddrLatch1) (pin 14)))
(net (code 67) (name "Net-(DataBuffer1-Pad8)")
(node (ref LowAddrLatch1) (pin 17))
(node (ref DataBuffer1) (pin 8))
(node (ref HiAddrLatch1) (pin 17))
(node (ref J1) (pin 43)))
(net (code 68) (name "Net-(DataBuffer1-Pad2)")
(node (ref HiAddrLatch1) (pin 3))
(node (ref LowAddrLatch1) (pin 3))
(node (ref DataBuffer1) (pin 2))
(node (ref J1) (pin 49)))
(net (code 69) (name "Net-(DataBuffer1-Pad3)")
(node (ref J1) (pin 48))
(node (ref HiAddrLatch1) (pin 4))
(node (ref DataBuffer1) (pin 3))
(node (ref LowAddrLatch1) (pin 4)))
(net (code 70) (name "Net-(DataBuffer1-Pad4)")
(node (ref DataBuffer1) (pin 4))
(node (ref LowAddrLatch1) (pin 7))
(node (ref J1) (pin 47))
(node (ref HiAddrLatch1) (pin 7)))
(net (code 71) (name "Net-(DataBuffer1-Pad5)")
(node (ref DataBuffer1) (pin 5))
(node (ref LowAddrLatch1) (pin 8))
(node (ref J1) (pin 46))
(node (ref HiAddrLatch1) (pin 8)))
(net (code 72) (name "Net-(DataBuffer1-Pad12)")
(node (ref DataBuffer1) (pin 12))
(node (ref EPROM1) (pin 20)))
(net (code 73) (name "Net-(EPROM1-Pad22)")
(node (ref U2) (pin 3))
(node (ref EPROM1) (pin 22))
(node (ref EPROM1) (pin 24)))
(net (code 74) (name "Net-(DataBuffer1-Pad18)")
(node (ref EPROM1) (pin 13))
(node (ref DataBuffer1) (pin 18)))
(net (code 75) (name "Net-(DataBuffer1-Pad17)")
(node (ref DataBuffer1) (pin 17))
(node (ref EPROM1) (pin 14)))
(net (code 76) (name "Net-(DataBuffer1-Pad16)")
(node (ref EPROM1) (pin 15))
(node (ref DataBuffer1) (pin 16)))
(net (code 77) (name "Net-(DataBuffer1-Pad14)")
(node (ref DataBuffer1) (pin 14))
(node (ref EPROM1) (pin 18)))
(net (code 78) (name "Net-(J1-Pad7)")
(node (ref J1) (pin 7))
(node (ref LowAddrBuffer1) (pin 3)))
(net (code 79) (name "Net-(HiAddrLatch1-Pad1)")
(node (ref HiAddrLatch1) (pin 1))
(node (ref U1) (pin 2))
(node (ref LowAddrLatch1) (pin 1))
(node (ref J1) (pin 41))
(node (ref U2) (pin 5)))
(net (code 80) (name "Net-(DataBuffer1-Pad9)")
(node (ref DataBuffer1) (pin 9))
(node (ref J1) (pin 42))
(node (ref LowAddrLatch1) (pin 18))
(node (ref HiAddrLatch1) (pin 18)))))

BIN
Hardware/ProDOS ROM-Drive 3.0.pdf Normal file
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Binary file not shown.

270
Hardware/ProDOS ROM-Drive 3.0.pro Normal file
View File

@ -0,0 +1,270 @@
update=Wednesday, December 08, 2021 at 10:19:11 pm
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=ProDOS ROM-Drive 3.0.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.1778
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.1778
ViaDiameter1=0.762
ViaDrill1=0.50038
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=2
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=2
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=0
[pcbnew/Layer.F.Adhes]
Enabled=0
[pcbnew/Layer.B.Paste]
Enabled=0
[pcbnew/Layer.F.Paste]
Enabled=0
[pcbnew/Layer.B.SilkS]
Enabled=0
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=0
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1778
TrackWidth=0.1778
ViaDiameter=0.762
ViaDrill=0.50038
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Ground
Clearance=0.254
TrackWidth=0.8128
ViaDiameter=0.762
ViaDrill=0.7112
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=Power
Clearance=0.254
TrackWidth=0.8128
ViaDiameter=0.762
ViaDrill=0.7112
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

158
Hardware/ProDOS ROM-Drive 2.2.sch → Hardware/ProDOS ROM-Drive 3.0.sch Executable file → Normal file
View File

@ -1,13 +1,12 @@
EESchema Schematic File Version 4
LIBS:ProDOS ROMDrive 2-cache
EELAYER 26 0
EELAYER 30 0
EELAYER END
$Descr USLetter 8500 11000 portrait
encoding utf-8
Sheet 1 1
Title "ProDOS ROM-Drive"
Date ""
Rev "2.2"
Date "2021-12-07"
Rev "3.0"
Comp ""
Comment1 ""
Comment2 ""
@ -583,22 +582,10 @@ Wire Wire Line
2700 6100 3050 6100
Wire Wire Line
1800 2950 2750 2950
Wire Wire Line
2750 2950 2750 6200
Wire Wire Line
2750 6200 3050 6200
Wire Wire Line
1800 2850 2800 2850
Wire Wire Line
2800 2850 2800 6300
Wire Wire Line
2800 6300 3050 6300
Wire Wire Line
1800 2750 2850 2750
Wire Wire Line
2850 2750 2850 6400
Wire Wire Line
2850 6400 3050 6400
Wire Wire Line
1800 1450 2100 1450
Wire Wire Line
@ -607,58 +594,14 @@ Wire Wire Line
2100 4750 2900 4750
Wire Wire Line
2900 4750 2900 5500
Wire Wire Line
2900 6500 3050 6500
Wire Wire Line
2900 6500 2900 6700
Wire Wire Line
2900 7800 3050 7800
Connection ~ 2900 6500
Wire Wire Line
2900 7800 2900 7900
Wire Wire Line
2900 7900 3050 7900
Connection ~ 2900 7800
Wire Wire Line
2900 7900 2900 8000
Wire Wire Line
2900 8000 3050 8000
Connection ~ 2900 7900
Wire Wire Line
2900 8000 2900 8100
Wire Wire Line
2900 8100 3050 8100
Connection ~ 2900 8000
Wire Wire Line
2900 8100 2900 8200
Wire Wire Line
2900 8200 3050 8200
Connection ~ 2900 8100
Wire Wire Line
2900 8200 2900 8300
Wire Wire Line
2900 8300 3050 8300
Connection ~ 2900 8200
Wire Wire Line
2900 8300 2900 8400
Wire Wire Line
2900 8400 3050 8400
Connection ~ 2900 8300
Wire Wire Line
2900 8400 2900 8500
Wire Wire Line
2900 8500 3050 8500
Connection ~ 2900 8400
Wire Wire Line
3550 7500 2900 7500
Connection ~ 2900 7500
Wire Wire Line
2900 7500 2900 7800
Wire Wire Line
3550 5500 2900 5500
Connection ~ 2900 5500
Wire Wire Line
2900 5500 2900 6500
2900 5500 2900 6200
Wire Wire Line
2100 4750 1900 4750
Wire Wire Line
@ -697,7 +640,7 @@ Wire Wire Line
Wire Wire Line
1650 6550 1650 7100
Wire Wire Line
1650 7100 3550 7100
1650 7100 2750 7100
Connection ~ 1650 6550
Wire Wire Line
3550 7100 4100 7100
@ -729,7 +672,7 @@ Wire Wire Line
Wire Wire Line
1650 7100 1650 9100
Wire Wire Line
1650 9100 3550 9100
1650 9100 2750 9100
Connection ~ 1650 7100
Wire Wire Line
1800 3850 2400 3850
@ -737,8 +680,6 @@ Wire Wire Line
2400 3850 2400 4700
Wire Wire Line
2400 4700 3000 4700
Wire Wire Line
3000 4700 3000 6800
Wire Wire Line
3000 7000 5250 7000
Wire Wire Line
@ -760,7 +701,6 @@ Wire Wire Line
1150 7250 1150 6250
Wire Wire Line
3000 6800 3050 6800
Connection ~ 3000 6800
Wire Wire Line
3000 6800 3000 7000
Wire Wire Line
@ -772,13 +712,6 @@ Wire Wire Line
1300 2950 700 2950
Wire Wire Line
700 2950 700 7200
Wire Wire Line
700 7200 2950 7200
Wire Wire Line
2950 7200 2950 4600
Connection ~ 2950 7200
Wire Wire Line
2950 7200 5150 7200
Wire Wire Line
2900 4400 2900 2600
Wire Wire Line
@ -788,11 +721,8 @@ Wire Wire Line
Connection ~ 2900 6700
Wire Wire Line
2900 6700 2900 7500
Wire Wire Line
2900 8500 2900 8700
Wire Wire Line
2900 8700 3050 8700
Connection ~ 2900 8500
Wire Wire Line
2450 3750 2450 4650
Wire Wire Line
@ -1265,4 +1195,80 @@ Wire Wire Line
Wire Wire Line
6200 7350 6200 7550
Connection ~ 6550 7100
Wire Wire Line
2900 7500 2900 8700
Wire Wire Line
2750 9100 2750 8500
Wire Wire Line
2750 7800 3050 7800
Connection ~ 2750 9100
Wire Wire Line
2750 9100 3550 9100
Wire Wire Line
3050 7900 2750 7900
Connection ~ 2750 7900
Wire Wire Line
2750 7900 2750 7800
Wire Wire Line
3050 8000 2750 8000
Connection ~ 2750 8000
Wire Wire Line
2750 8000 2750 7900
Wire Wire Line
3050 8100 2750 8100
Connection ~ 2750 8100
Wire Wire Line
2750 8100 2750 8000
Wire Wire Line
3050 8200 2750 8200
Connection ~ 2750 8200
Wire Wire Line
2750 8200 2750 8100
Wire Wire Line
3050 8300 2750 8300
Connection ~ 2750 8300
Wire Wire Line
2750 8300 2750 8200
Wire Wire Line
3050 8400 2750 8400
Connection ~ 2750 8400
Wire Wire Line
2750 8400 2750 8300
Wire Wire Line
3050 8500 2750 8500
Connection ~ 2750 8500
Wire Wire Line
2750 8500 2750 8400
Wire Wire Line
2750 7100 2750 6500
Connection ~ 2750 7100
Wire Wire Line
2750 7100 3550 7100
Wire Wire Line
3050 6400 2750 6400
Wire Wire Line
3050 6300 2900 6300
Connection ~ 2900 6300
Connection ~ 3000 6800
Wire Wire Line
3000 4700 3000 6800
Wire Wire Line
2900 6300 2900 6700
Wire Wire Line
2950 7200 5150 7200
Wire Wire Line
700 7200 2950 7200
Connection ~ 2950 7200
Wire Wire Line
2950 7200 2950 4600
Wire Wire Line
3050 6500 2750 6500
Connection ~ 2750 6500
Wire Wire Line
2750 6500 2750 6400
Wire Wire Line
3050 6200 2900 6200
Connection ~ 2900 6200
Wire Wire Line
2900 6200 2900 6300
$EndSCHEMATC

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README.md
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# ProDOS ROM-Drive
This is a peripheral card for the Apple ][ series computers that acts as a read-only solid state disk drive (SSD) all in EPROM. Although it won't run DOS, it is fully ProDOS compatible and will appear as a read-only hard drive even when booting from another drive. It holds 1022 KB of disk data and 2 KB of controlling code making a full megabyte. The drive boots ProDOS and into BASIC in under 1.5 seconds.
# v3
This is a new revision of the hardware, incompatible with previous firmware and drive image. If you have a v2.5 board, see the v2.5 tag [here](https://github.com/tjboldt/ProDOS-ROM-Drive/tree/v2.5)
![Image of Board](/Hardware/ProDOS%20ROM-Drive%202.5%20Front.jpg)
# ProDOS ROM-Drive
This is a peripheral card for the Apple ][ series computers that acts as a read-only solid state disk drive (SSD) all in EPROM. Although it won't run DOS, it is fully ProDOS compatible and will appear as a read-only hard drive even when booting from another drive. It holds 1024 KB of disk data with the 256 byte firmware stored in block 0001 where the SOS boot loader normally resides. The drive boots ProDOS and into BASIC in under 1.5 seconds.
![Image of Board](/Hardware/ProDOS%20ROM-Drive%203.0%20Front.jpg)
You can order blank circuit boards from [PCBWay](https://www.pcbway.com/project/shareproject/ProDOS_ROM_Drive_v3_1903e388.html) or upload the provided gerber and drill files to any PCB manufacturer.
## History
@ -19,11 +24,11 @@ To build actual circuit boards, I tried making some by hand with marker, etching
In 2019, I decided to revisit the original design as I was disappointed that the original didn't have a solder mask and was rather large for what it was. I got the board much smaller but in the process of translating my two decade old hand written notes, I made a mistake on one control line. To actually call this project finished, I had to make another revision. I also noticed the revised board was slightly larger than a credit card so I worked for a couple weeks to optimize the lines and squeeze the two-layer board down to 3.375" x 2.125". The board here is that final revision 2.5 (note that references to first, second and third design are all the solderless breadboard prototypes leading up to the 1.0 circuit board printed in 1999, 2.0 was never made, 2.1 is the board with the error patched with a jumper wire and 2.2 through 2.4 were never made).
In 2021, the first and only issue was opened on the project requesting that the firmware be relocatable. I let that issue sit for a few months and then Ralle Palaveev supplied some relocatable firmware as a patch. I quickly realized that this could be placed into the second block on the drive normally reserved for SOS bootloader for the Apple ///, essentially allowing the full EPROM to be used for the drive. I disassembed Ralle's patch, merged it into the existing source code and made a few updates to save a few bytes and add clarity.
## Notes
The firmware code needs to be assembled 7 times with different parameters specifying which slot to assemble for. It is probably easier to work from the EPROM image as it is already a 1 MB disk image with the firmware in the top four ProDOS blocks.
I usually use Ciderpress to copy files onto the drive image and then burn the file to a 27C801 EPROM with a GQ-4x4 USB Programmer.
I usually use Ciderpress to copy files onto the drive image and then burn the file to a 27C801 EPROM with a GQ-4x4 USB Programmer. Do NOT overwrite block 0001 as it contains the firmware for the card.
If you're planning on designing you own card, I highly recommend reading "Interfacing & Digital Experiments with your Apple" by Charles J. Engelisher and Apple's "Apple II Reference Manual" as well as "ProDOS Technical Reference Manual" if you want to build a drive. You also need an EPROM programmer, some chips and a prototyping board. My designs used simple logic gates to decode addresses but if you want to reduce chip count, you'll also need a PAL/GAL logic programmer (which some EPROM programmers can do).