diff --git a/Firmware/BlankDriveWithFirmware.po b/Firmware/BlankDriveWithFirmware.po
old mode 100755
new mode 100644
index 88dc8b8..f9aae6c
Binary files a/Firmware/BlankDriveWithFirmware.po and b/Firmware/BlankDriveWithFirmware.po differ
diff --git a/Firmware/Firmware-RP-patch.bin b/Firmware/Firmware-RP-patch.bin
deleted file mode 100644
index 3f71b70..0000000
Binary files a/Firmware/Firmware-RP-patch.bin and /dev/null differ
diff --git a/Firmware/Firmware.asm b/Firmware/Firmware.asm
index f60ab45..6ddf450 100644
--- a/Firmware/Firmware.asm
+++ b/Firmware/Firmware.asm
@@ -1,196 +1,185 @@
-;Please note this code is assembled seven times,
-;once for each slot in the Apple II.
-;This allows the card to work in any slot without
-;having to write space consuming relocatable code.
+ writeLatchHigh = $C081
+ writeLatchLow = $C080
-;Install cc65 (on Ubuntu this is: sudo apt install cc65)
-;Execute the following commands to generate the binary:
-;ca65 Warning.asm -o warning.o
-;ca65 Firmware.asm -D SLOT1 -o slot1.o
-;ca65 Firmware.asm -D SLOT2 -o slot2.o
-;ca65 Firmware.asm -D SLOT3 -o slot3.o
-;ca65 Firmware.asm -D SLOT4 -o slot4.o
-;ca65 Firmware.asm -D SLOT5 -o slot5.o
-;ca65 Firmware.asm -D SLOT6 -o slot6.o
-;ca65 Firmware.asm -D SLOT7 -o slot7.o
-;ld65 -t none warning.o slot1.o slot2.o slot3.o slot4.o slot5.o slot6.o slot7.o -o Firmware.bin
-
-;Determine which slot we want by command-line define
- .ifdef SLOT1
- slot = $01
- .endif
- .ifdef SLOT2
- slot = $02
- .endif
- .ifdef SLOT3
- slot = $03
- .endif
- .ifdef SLOT4
- slot = $04
- .endif
- .ifdef SLOT5
- slot = $05
- .endif
- .ifdef SLOT6
- slot = $06
- .endif
- .ifdef SLOT7
- slot = $07
- .endif
-
-;Calculate I/O addresses for this slot
-
- slotwh = $C081+slot*$10
- slotwl = $C080+slot*$10
- slotrd = $C080+slot*$10
- sdrive = slot*$10
-
- sram0 = $478+slot
- sram1 = $4F8+slot
- sram2 = $578+slot
- sram3 = $5F8+slot
- sram4 = $678+slot
- sram5 = $6F8+slot
- sram6 = $778+slot
- sram7 = $7F8+slot
+;temp variables becasue 6502 only has 3 registers
+ highLatch = $F8
+ lowLatch = $F9
+ tempY = $FE
+ blockHalfCounter = $FF
;ProDOS defines
+ command = $42 ;ProDOS command
+ unit = $43 ;7=drive 6-4=slot 3-0=not used
+ buflo = $44 ;low address of buffer
+ bufhi = $45 ;hi address of buffer
+ blklo = $46 ;low block
+ blkhi = $47 ;hi block
+ ioerr = $27 ;I/O error code
+ nodev = $28 ;no device connected
+ wperr = $2B ;write protect error
- command = $42 ;ProDOS command
- unit = $43 ;7=drive 6-4=slot 3-0=not used
- buflo = $44 ;low address of buffer
- bufhi = $45 ;hi address of buffer
- blklo = $46 ;low block
- blkhi = $47 ;hi block
- ioerr = $27 ;I/O error code
- nodev = $28 ;no device connected
- wperr = $2B ;write protect error
+;for relocatable code, address to jump to instead of JSR absolute + RTS
+ jumpAddressLo = $FA
+ jumpAddressHi = $FB
+ ioAddressLo = $FC
+ ioAddressHi = $FD
+ knownRts = $FF58
- .org $C000+slot*$100
- ;code is non-relocatable
- ; but duplicated seven times,
- ; once for each slot
+ .org $C700
+ ;code is relocatable
+ ; but set to $c700 for
+ ; readability
;ID bytes for booting and drive detection
- cpx #$20 ;ID bytes for ProDOS and the
- cpx #$00 ; Apple Autostart ROM
- cpx #$03 ;
- cpx #$3C ;this one for older II's
+ cpx #$20 ;ID bytes for ProDOS and the
+ ldy #$00 ; Apple Autostart ROM
+ cpx #$03 ;
+ cpx #$3C ;this one for older II's
+
+;zero out block numbers and buffer address
+ sty buflo
+ sty blklo
+ sty blkhi
+ iny ;set command = 1 for read block
+ sty command
+ sty jumpAddressLo ;$01 of $0801 where boot code starts
+ jsr knownRts ;jump to known RTS to get our address from the stack
+ tsx
+ lda $0100,x ;this for example would be $C7 in slot 7
+ sta bufhi ;keep the slot here
+ asl
+ asl
+ asl
+ asl
+ tax
;display copyright message
- ldy #$00
-drawtxt: lda text,y
- beq boot ;check for NULL
- ora #$80 ;make it visible to the Apple
- sta $07D0,y ;put text on last line
+ ldy #knownRts
+ sta jumpAddressHi
+start:
+ lda #$C0
+ sta ioAddressHi
+ jsr knownRts
+ tsx
+ lda $0100,x
+ asl a
+ asl a
+ asl a
+ asl a
+ tax
+ cpx unit ;make sure same as ProDOS
+ beq docmd ;yep, do command
+ sec ;nope, set device not connected
+ lda #nodev
+ rts ;go back to ProDOS
-docmd: lda command ;get ProDOS command
- beq getstat ;command 0 is GetStatus
- cmp #$01 ;
- beq readblk ;command 1 is ReadBlock
- sec ;Format/Write not permitted
- lda #wperr ;write protect error
- rts ;go back to ProDOS
+docmd:
+ lda command
+ beq getstat ;command 0 is GetStatus
+ cmp #$01
+ beq readblk ;command 1 is ReadBlock
+ sec ;Format/Write not permitted
+ lda #wperr ;write protect error
+ rts ;go back to ProDOS
-getstat: clc ;send back status
- lda #$00 ;good status
- ldx #$00 ;1024 blocks
- ldy #$04 ;
+getstat:
+ clc ;send back status
+ lda #$00 ;good status
+ ldx #$00 ;1024 blocks
+ ldy #$04 ;
rts
-readblk: lda blkhi ;get hi block
- asl a ;shift up to top 3 bits
- asl a ;since that's all the high
- asl a ;blocks we can handle
- asl a ;
- asl a ;
- sta sram0 ;save it in scratch ram 0
+readblk:
+ lda blkhi ;get hi block
+ asl a ;shift up to top 3 bits
+ asl a ;since that's all the high
+ asl a ;blocks we can handle
+ asl a ;
+ asl a ;
+ sta highLatch ;save it in scratch ram 0
;so we can stuff it in the
;high latch later
- lda blklo ;get low block
- lsr a ;shift so we get the top 5
- lsr a ;bits - this also goes in
- lsr a ;the high latch
- ora sram0 ;add it to those top 3 bits
- sta sram0 ;save it back in scratch ram
-
- lda blklo ;get low block
- asl a ;shift it to top 3 bits
- asl a ;
- asl a ;
- asl a ;
- asl a ;
- sta sram1 ;save it in scratch ram
-
- jsr get256 ;get first half of block
-
- lda sram1 ;get low latch
- and #$F0 ;clear bottom 4 bits
- ora #$10 ;set bit 5 for second half
- ;of 512 byte block
- sta sram1 ;save it back in scratch
-
- inc bufhi ;write 2nd block up 256 bytes
- jsr get256 ;get second half of block
- dec bufhi ;put ProDOS buffer back
-
- clc ;clear error code for success
- lda #$00
- rts ;return to ProDOS
+ lda blklo ;get low block
+ lsr a ;shift so we get the top 5
+ lsr a ;bits - this also goes in
+ lsr a ;the high latch
+ ora highLatch ;add it to those top 3 bits
+ sta highLatch ;save it back in scratch ram
+ lda blklo ;get low block
+ asl a ;shift it to top 3 bits
+ asl a ;
+ asl a ;
+ asl a ;
+ asl a ;
+ sta lowLatch
+ lda #$02
+ sta blockHalfCounter
;This gets 256 bytes from the ROM card
-;assuming high latch value is in sram0
-;and low latch value is in sram1
-get256: ldy #$00 ;clear buffer counter
- lda sram0 ;get high latch value
- sta slotwh ;set high latch for card
-loop256: ldx #$00 ;clear port counter
- lda sram1 ;get low latch value
- sta slotwl ;set low latch
-
-loop16: lda slotrd,x ;get a byte
- sta (buflo),y ;write into the buffer
+read256:
+ ldy #$00
+ lda highLatch ;get high latch value
+ sta writeLatchHigh,x ;set high latch for card
+loop256:
+ lda lowLatch
+ sta writeLatchLow,x
+ txa
+ ora #$80
+ sta ioAddressLo
+loop16:
+ sty tempY
+ ldy #$00
+ lda (ioAddressLo),y
+ ldy tempY
+ sta (buflo),y
iny
- inx
- cpx #$10
- bne loop16 ;go until 16 bytes read
+ inc ioAddressLo
+ lda ioAddressLo
+ and #$0F
+ bne loop16
+ inc lowLatch
+ cpy #$00
+ bne loop256
+ dec blockHalfCounter
+ bne readnext256
+ dec bufhi
+ clc ;clear error code for success
+ lda #$00
+ jmp (jumpAddressLo)
- inc sram1 ;next 16 bytes
- cpy #$00
- bne loop256 ;go until 256 total
- rts
+readnext256:
+ inc bufhi
+ clc
+ bcc read256
-text: .byte "ROM-Drive (c)1998-2019 Terence J. Boldt"
+;macro for string with high-bit set
+.macro aschi str
+.repeat .strlen (str), c
+.byte .strat (str, c) | $80
+.endrep
+.endmacro
+
+text: aschi "ROM-Drive (c)1998-2021 Terence J. Boldt"
end:
- .byte 0
+.byte 0
; These bytes need to be at the top of the 256 byte firmware as ProDOS
; uses these to find the entry point and drive capabilities
@@ -199,7 +188,7 @@ end:
.byte 0
.endrepeat
- .byte 0,0 ;0000 blocks = check status
- .byte 3 ;bit 0=read 1=status
- .byte entry&$00FF ;low byte of entry
+.byte 0,0 ;0000 blocks = check status
+.byte 3 ;bit 0=read 1=status
+.byte knownRts
+00C73B 1 85 FB sta jumpAddressHi
+00C73D 1 start:
+00C73D 1 A9 C0 lda #$C0
+00C73F 1 85 FD sta ioAddressHi
+00C741 1 20 58 FF jsr knownRts
+00C744 1 BA tsx
+00C745 1 BD 00 01 lda $0100,x
+00C748 1 0A asl a
+00C749 1 0A asl a
+00C74A 1 0A asl a
+00C74B 1 0A asl a
+00C74C 1 AA tax
+00C74D 1 E4 43 cpx unit ;make sure same as ProDOS
+00C74F 1 F0 04 beq docmd ;yep, do command
+00C751 1 38 sec ;nope, set device not connected
+00C752 1 A9 28 lda #nodev
+00C754 1 60 rts ;go back to ProDOS
+00C755 1
+00C755 1 docmd:
+00C755 1 A5 42 lda command
+00C757 1 F0 08 beq getstat ;command 0 is GetStatus
+00C759 1 C9 01 cmp #$01
+00C75B 1 F0 0C beq readblk ;command 1 is ReadBlock
+00C75D 1 38 sec ;Format/Write not permitted
+00C75E 1 A9 2B lda #wperr ;write protect error
+00C760 1 60 rts ;go back to ProDOS
+00C761 1
+00C761 1 getstat:
+00C761 1 18 clc ;send back status
+00C762 1 A9 00 lda #$00 ;good status
+00C764 1 A2 00 ldx #$00 ;1024 blocks
+00C766 1 A0 04 ldy #$04 ;
+00C768 1 60 rts
+00C769 1
+00C769 1 readblk:
+00C769 1 A5 47 lda blkhi ;get hi block
+00C76B 1 0A asl a ;shift up to top 3 bits
+00C76C 1 0A asl a ;since that's all the high
+00C76D 1 0A asl a ;blocks we can handle
+00C76E 1 0A asl a ;
+00C76F 1 0A asl a ;
+00C770 1 85 F8 sta highLatch ;save it in scratch ram 0
+00C772 1 ;so we can stuff it in the
+00C772 1 ;high latch later
+00C772 1 A5 46 lda blklo ;get low block
+00C774 1 4A lsr a ;shift so we get the top 5
+00C775 1 4A lsr a ;bits - this also goes in
+00C776 1 4A lsr a ;the high latch
+00C777 1 05 F8 ora highLatch ;add it to those top 3 bits
+00C779 1 85 F8 sta highLatch ;save it back in scratch ram
+00C77B 1 A5 46 lda blklo ;get low block
+00C77D 1 0A asl a ;shift it to top 3 bits
+00C77E 1 0A asl a ;
+00C77F 1 0A asl a ;
+00C780 1 0A asl a ;
+00C781 1 0A asl a ;
+00C782 1 85 F9 sta lowLatch
+00C784 1 A9 02 lda #$02
+00C786 1 85 FF sta blockHalfCounter
+00C788 1
+00C788 1 ;This gets 256 bytes from the ROM card
+00C788 1
+00C788 1 read256:
+00C788 1 A0 00 ldy #$00
+00C78A 1 A5 F8 lda highLatch ;get high latch value
+00C78C 1 9D 81 C0 sta writeLatchHigh,x ;set high latch for card
+00C78F 1 loop256:
+00C78F 1 A5 F9 lda lowLatch
+00C791 1 9D 80 C0 sta writeLatchLow,x
+00C794 1 8A txa
+00C795 1 09 80 ora #$80
+00C797 1 85 FC sta ioAddressLo
+00C799 1 loop16:
+00C799 1 84 FE sty tempY
+00C79B 1 A0 00 ldy #$00
+00C79D 1 B1 FC lda (ioAddressLo),y
+00C79F 1 A4 FE ldy tempY
+00C7A1 1 91 44 sta (buflo),y
+00C7A3 1 C8 iny
+00C7A4 1 E6 FC inc ioAddressLo
+00C7A6 1 A5 FC lda ioAddressLo
+00C7A8 1 29 0F and #$0F
+00C7AA 1 D0 ED bne loop16
+00C7AC 1 E6 F9 inc lowLatch
+00C7AE 1 C0 00 cpy #$00
+00C7B0 1 D0 DD bne loop256
+00C7B2 1 C6 FF dec blockHalfCounter
+00C7B4 1 D0 08 bne readnext256
+00C7B6 1 C6 45 dec bufhi
+00C7B8 1 18 clc ;clear error code for success
+00C7B9 1 A9 00 lda #$00
+00C7BB 1 6C FA 00 jmp (jumpAddressLo)
+00C7BE 1
+00C7BE 1 readnext256:
+00C7BE 1 E6 45 inc bufhi
+00C7C0 1 18 clc
+00C7C1 1 90 C5 bcc read256
+00C7C3 1
+00C7C3 1 ;macro for string with high-bit set
+00C7C3 1 .macro aschi str
+00C7C3 1 .repeat .strlen (str), c
+00C7C3 1 .byte .strat (str, c) | $80
+00C7C3 1 .endrep
+00C7C3 1 .endmacro
+00C7C3 1
+00C7C3 1 D2 CF CD AD text: aschi "ROM-Drive (c)1998-2021 Terence J. Boldt"
+00C7C7 1 C4 F2 E9 F6
+00C7CB 1 E5 A0 A8 E3
+00C7CF 1 A9 B1 B9 B9
+00C7D3 1 B8 AD B2 B0
+00C7D7 1 B2 B1 A0 D4
+00C7DB 1 E5 F2 E5 EE
+00C7DF 1 E3 E5 A0 CA
+00C7E3 1 AE A0 C2 EF
+00C7E7 1 EC E4 F4
+00C7EA 1 end:
+00C7EA 1 00 .byte 0
+00C7EB 1
+00C7EB 1 ; These bytes need to be at the top of the 256 byte firmware as ProDOS
+00C7EB 1 ; uses these to find the entry point and drive capabilities
+00C7EB 1
+00C7EB 1 00 00 00 00 .repeat 251-
-
-
diff --git a/Hardware/ProDOS ROM-Drive 2.5.pro b/Hardware/ProDOS ROM-Drive 2.5.pro
deleted file mode 100755
index 152769c..0000000
--- a/Hardware/ProDOS ROM-Drive 2.5.pro
+++ /dev/null
@@ -1,33 +0,0 @@
-update=22/05/2015 07:44:53
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
diff --git a/Hardware/ProDOS ROM-Drive 3.0 Back.jpg b/Hardware/ProDOS ROM-Drive 3.0 Back.jpg
new file mode 100644
index 0000000..2fcbad5
Binary files /dev/null and b/Hardware/ProDOS ROM-Drive 3.0 Back.jpg differ
diff --git a/Hardware/ProDOS ROM-Drive 3.0 Front.jpg b/Hardware/ProDOS ROM-Drive 3.0 Front.jpg
new file mode 100644
index 0000000..c39b591
Binary files /dev/null and b/Hardware/ProDOS ROM-Drive 3.0 Front.jpg differ
diff --git a/Hardware/ProDOS ROM-Drive 3.0-B_Cu.gbr b/Hardware/ProDOS ROM-Drive 3.0-B_Cu.gbr
new file mode 100644
index 0000000..678c4eb
--- /dev/null
+++ b/Hardware/ProDOS ROM-Drive 3.0-B_Cu.gbr
@@ -0,0 +1,3644 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10-1-10_14)*
+G04 #@! TF.CreationDate,2021-12-12T10:22:25-05:00*
+G04 #@! TF.ProjectId,ProDOS ROM-Drive 3.0,50726f44-4f53-4205-924f-4d2d44726976,3.0*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Copper,L2,Bot*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW (5.1.10-1-10_14)) date 2021-12-12 10:22:25*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 #@! TA.AperFunction,NonConductor*
+%ADD10C,0.149860*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,ComponentPad*
+%ADD11O,1.600000X1.600000*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,ComponentPad*
+%ADD12R,1.600000X1.600000*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,ComponentPad*
+%ADD13C,1.600000*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,ViaPad*
+%ADD14C,0.762000*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,Conductor*
+%ADD15C,0.812800*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,Conductor*
+%ADD16C,0.177800*%
+G04 #@! TD*
+G04 APERTURE END LIST*
+D10*
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+D12*
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+G04 #@! TA.AperFunction,ConnectorPad*
+G36*
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+G75*
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+G75*
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+G01*
+G37*
+G04 #@! TD.AperFunction*
+G04 #@! TA.AperFunction,ConnectorPad*
+G36*
+G01*
+X113527840Y-76459080D02*
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+G01*
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+G04 #@! TD.AperFunction*
+G04 #@! TA.AperFunction,ConnectorPad*
+G36*
+G01*
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+G75*
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+G01*
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+G04 #@! TD.AperFunction*
+G04 #@! TA.AperFunction,ConnectorPad*
+G36*
+G01*
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diff --git a/Hardware/ProDOS ROM-Drive 3.0-B_Mask.gbr b/Hardware/ProDOS ROM-Drive 3.0-B_Mask.gbr
new file mode 100644
index 0000000..44e1e66
--- /dev/null
+++ b/Hardware/ProDOS ROM-Drive 3.0-B_Mask.gbr
@@ -0,0 +1,4709 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10-1-10_14)*
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diff --git a/Hardware/ProDOS ROM-Drive 2.5-Edge.Cuts.gbr b/Hardware/ProDOS ROM-Drive 3.0-Edge_Cuts.gbr
old mode 100755
new mode 100644
similarity index 73%
rename from Hardware/ProDOS ROM-Drive 2.5-Edge.Cuts.gbr
rename to Hardware/ProDOS ROM-Drive 3.0-Edge_Cuts.gbr
index d08f60f..a9261dd
--- a/Hardware/ProDOS ROM-Drive 2.5-Edge.Cuts.gbr
+++ b/Hardware/ProDOS ROM-Drive 3.0-Edge_Cuts.gbr
@@ -1,16 +1,18 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.0.1-3-g963ef8bb5)*
-G04 #@! TF.CreationDate,2019-04-25T11:14:13-04:00*
-G04 #@! TF.ProjectId,ProDOS ROM-Drive 2.5,50726F444F5320524F4D2D4472697665,2.5*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10-1-10_14)*
+G04 #@! TF.CreationDate,2021-12-12T10:22:25-05:00*
+G04 #@! TF.ProjectId,ProDOS ROM-Drive 3.0,50726f44-4f53-4205-924f-4d2d44726976,3.0*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (5.0.1-3-g963ef8bb5)) date Thursday, April 25, 2019 at 11:14:13 am*
+G04 Created by KiCad (PCBNEW (5.1.10-1-10_14)) date 2021-12-12 10:22:25*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
+G04 #@! TA.AperFunction,Profile*
%ADD10C,0.150000*%
+G04 #@! TD*
G04 APERTURE END LIST*
D10*
X33644840Y-68521580D02*
diff --git a/Hardware/ProDOS ROM-Drive 3.0-F_Cu.gbr b/Hardware/ProDOS ROM-Drive 3.0-F_Cu.gbr
new file mode 100644
index 0000000..c8d1766
--- /dev/null
+++ b/Hardware/ProDOS ROM-Drive 3.0-F_Cu.gbr
@@ -0,0 +1,2366 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10-1-10_14)*
+G04 #@! TF.CreationDate,2021-12-12T10:22:25-05:00*
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diff --git a/Hardware/ProDOS ROM-Drive 3.0-F_Mask.gbr b/Hardware/ProDOS ROM-Drive 3.0-F_Mask.gbr
new file mode 100644
index 0000000..efbf9b6
--- /dev/null
+++ b/Hardware/ProDOS ROM-Drive 3.0-F_Mask.gbr
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diff --git a/Hardware/ProDOS ROM-Drive 2.5-F.SilkS.gbr b/Hardware/ProDOS ROM-Drive 3.0-F_SilkS.gbr
old mode 100755
new mode 100644
similarity index 65%
rename from Hardware/ProDOS ROM-Drive 2.5-F.SilkS.gbr
rename to Hardware/ProDOS ROM-Drive 3.0-F_SilkS.gbr
index 524ea68..e60e893
--- a/Hardware/ProDOS ROM-Drive 2.5-F.SilkS.gbr
+++ b/Hardware/ProDOS ROM-Drive 3.0-F_SilkS.gbr
@@ -1,12 +1,12 @@
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-G04 #@! TF.ProjectId,ProDOS ROM-Drive 2.5,50726F444F5320524F4D2D4472697665,2.5*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10-1-10_14)*
+G04 #@! TF.CreationDate,2021-12-12T10:22:25-05:00*
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G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Legend,Top*
G04 #@! TF.FilePolarity,Positive*
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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X45525508Y-57695573D01*
X45525508Y-57459716D01*
@@ -1295,19 +1779,21 @@ X45997222Y-37883573D01*
X46516108Y-37883573D02*
X45525508Y-37883573D01*
X45525508Y-37411859D01*
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X112741528Y-46189900D02*
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X112788700Y-45906871D01*
@@ -2647,240 +3133,230 @@ X84825114Y-59122128D01*
X84730771Y-59074957D01*
X84683600Y-59027785D01*
D11*
-G04 #@! TO.C,EPROM1*
-X50953180Y-23727100D02*
-X45493180Y-23727100D01*
-X50953180Y-64487100D02*
-X50953180Y-23727100D01*
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X43493180Y-23727100D02*
X38033180Y-23727100D01*
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X45493180Y-23727100D02*
G75*
-G02X43493180Y-23727100I-1000000J0D01*
+G02*
+X43493180Y-23727100I-1000000J0D01*
G01*
D12*
-G04 #@! TO.C,J1*
-X118607840Y-74236580D02*
-X118607840Y-69156580D01*
-X118607840Y-69156580D02*
-X119242840Y-69156580D01*
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X53837840Y-69156580D02*
X53202840Y-69156580D01*
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+X119242840Y-69156580D01*
+X118607840Y-74236580D02*
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D11*
-G04 #@! TO.C,HiAddrLatch1*
-X80236840Y-25154580D02*
-X78586840Y-25154580D01*
-X80236840Y-50674580D02*
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X76586840Y-25154580D02*
X74936840Y-25154580D01*
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X78586840Y-25154580D02*
G75*
-G02X76586840Y-25154580I-1000000J0D01*
+G02*
+X76586840Y-25154580I-1000000J0D01*
G01*
-G04 #@! TO.C,DataBuffer1*
-X62413840Y-56092580D02*
-X62413840Y-57742580D01*
-X87933840Y-56092580D02*
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X62413840Y-59742580D02*
X62413840Y-61392580D01*
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X62413840Y-57742580D02*
G75*
-G02X62413840Y-59742580I0J-1000000D01*
+G02*
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G01*
-G04 #@! TO.C,HiAddrBuffer1*
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X100716840Y-25154580D02*
X99066840Y-25154580D01*
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X102716840Y-25154580D02*
G75*
-G02X100716840Y-25154580I-1000000J0D01*
+G02*
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G01*
-G04 #@! TO.C,LowAddrBuffer1*
-X90651840Y-25154580D02*
-G75*
-G02X88651840Y-25154580I-1000000J0D01*
-G01*
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-X92301840Y-25154580D01*
X92301840Y-25154580D02*
X90651840Y-25154580D01*
-G04 #@! TO.C,LowAddrLatch1*
-X66013840Y-25154580D02*
+X92301840Y-50674580D02*
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G75*
-G02X64013840Y-25154580I-1000000J0D01*
+G02*
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G01*
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X67663840Y-25154580D02*
X66013840Y-25154580D01*
-G04 #@! TO.C,U1*
-X94290840Y-55965580D02*
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+G75*
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+G01*
X94290840Y-59615580D02*
X94290840Y-61265580D01*
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X94290840Y-57615580D02*
G75*
-G02X94290840Y-59615580I0J-1000000D01*
+G02*
+X94290840Y-59615580I0J-1000000D01*
G01*
-G04 #@! TO.C,U2*
-X114146840Y-30488580D02*
-G75*
-G02X112146840Y-30488580I-1000000J0D01*
-G01*
-X112146840Y-30488580D02*
-X110496840Y-30488580D01*
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-X110496840Y-48388580D01*
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-X115796840Y-30488580D01*
X115796840Y-30488580D02*
X114146840Y-30488580D01*
-G04 #@! TO.C,C1*
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-X58432840Y-56888580D02*
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+G75*
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+G01*
X58432840Y-60128580D02*
-X58497840Y-60128580D01*
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X60672840Y-60128580D02*
X60672840Y-56888580D01*
X58432840Y-60128580D02*
-X58432840Y-56888580D01*
-G04 #@! TO.C,C2*
+X58497840Y-60128580D01*
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X112915840Y-60128580D02*
-X112915840Y-56888580D01*
+X112980840Y-60128580D01*
X115155840Y-60128580D02*
X115155840Y-56888580D01*
X112915840Y-60128580D02*
-X112980840Y-60128580D01*
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-X115155840Y-60128580D01*
-X112915840Y-56888580D02*
-X112980840Y-56888580D01*
-X115090840Y-56888580D02*
-X115155840Y-56888580D01*
-G04 #@! TO.C,C3*
-X90833840Y-57142580D02*
-X90898840Y-57142580D01*
-X88658840Y-57142580D02*
-X88723840Y-57142580D01*
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+X112915840Y-56888580D01*
X88658840Y-60382580D02*
-X88723840Y-60382580D01*
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X90898840Y-60382580D02*
X90898840Y-57142580D01*
X88658840Y-60382580D02*
-X88658840Y-57142580D01*
-G04 #@! TO.C,C4*
+X88723840Y-60382580D01*
+X90833840Y-60382580D02*
+X90898840Y-60382580D01*
+X88658840Y-57142580D02*
+X88723840Y-57142580D01*
+X90833840Y-57142580D02*
+X90898840Y-57142580D01*
+X103443840Y-53320580D02*
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+X103443840Y-51145580D02*
+X103443840Y-51210580D01*
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diff --git a/Hardware/ProDOS ROM-Drive 3.0-NPTH.drl b/Hardware/ProDOS ROM-Drive 3.0-NPTH.drl
new file mode 100644
index 0000000..cdcd836
--- /dev/null
+++ b/Hardware/ProDOS ROM-Drive 3.0-NPTH.drl
@@ -0,0 +1,13 @@
+M48
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+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2021-12-12T10:22:21-05:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.10-1-10_14)
+; #@! TF.FileFunction,NonPlated,1,2,NPTH
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diff --git a/Hardware/ProDOS ROM-Drive 2.5-PTH.drl b/Hardware/ProDOS ROM-Drive 3.0-PTH.drl
old mode 100755
new mode 100644
similarity index 90%
rename from Hardware/ProDOS ROM-Drive 2.5-PTH.drl
rename to Hardware/ProDOS ROM-Drive 3.0-PTH.drl
index cfa4ebb..8ae86c7
--- a/Hardware/ProDOS ROM-Drive 2.5-PTH.drl
+++ b/Hardware/ProDOS ROM-Drive 3.0-PTH.drl
@@ -1,8 +1,11 @@
M48
-;DRILL file {KiCad (5.0.1-3-g963ef8bb5)} date Thursday, April 25, 2019 at 11:14:16 am
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+; FORMAT={-:-/ absolute / inch / decimal}
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diff --git a/Hardware/ProDOS ROM-Drive 3.0-cache.lib b/Hardware/ProDOS ROM-Drive 3.0-cache.lib
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+X ~ 5 -300 -100 150 R 50 50 2 1 I
+X ~ 6 300 0 150 L 50 50 2 1 O I
+X ~ 10 -300 -100 150 R 50 50 3 1 I
+X ~ 8 300 0 150 L 50 50 3 1 O I
+X ~ 9 -300 100 150 R 50 50 3 1 I
+X ~ 11 300 0 150 L 50 50 4 1 O I
+X ~ 12 -300 100 150 R 50 50 4 1 I
+X ~ 13 -300 -100 150 R 50 50 4 1 I
+X ~ 1 -300 100 170 R 50 50 1 2 I I
+X ~ 2 -300 -100 170 R 50 50 1 2 I I
+X ~ 3 300 0 150 L 50 50 1 2 O
+X ~ 4 -300 100 170 R 50 50 2 2 I I
+X ~ 5 -300 -100 170 R 50 50 2 2 I I
+X ~ 6 300 0 150 L 50 50 2 2 O
+X ~ 10 -300 -100 170 R 50 50 3 2 I I
+X ~ 8 300 0 150 L 50 50 3 2 O
+X ~ 9 -300 100 170 R 50 50 3 2 I I
+X ~ 11 300 0 150 L 50 50 4 2 O
+X ~ 12 -300 100 170 R 50 50 4 2 I I
+X ~ 13 -300 -100 170 R 50 50 4 2 I I
+ENDDRAW
+ENDDEF
+#
+# 74xx_74LS245
+#
+DEF 74xx_74LS245 U 0 40 Y Y 1 L N
+F0 "U" -300 650 50 H V C CNN
+F1 "74xx_74LS245" -300 -650 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS 74HC245
+$FPLIST
+ DIP?20*
+$ENDFPLIST
+DRAW
+S -300 600 300 -600 1 1 10 f
+P 3 1 0 0 -25 -50 -25 50 25 50 N
+P 4 1 0 0 -50 -50 25 -50 25 50 50 50 N
+X A->B 1 -500 -400 200 R 50 50 1 0 I
+X GND 10 0 -800 200 U 50 50 1 0 W
+X B7 11 500 -200 200 L 50 50 1 0 T
+X B6 12 500 -100 200 L 50 50 1 0 T
+X B5 13 500 0 200 L 50 50 1 0 T
+X B4 14 500 100 200 L 50 50 1 0 T
+X B3 15 500 200 200 L 50 50 1 0 T
+X B2 16 500 300 200 L 50 50 1 0 T
+X B1 17 500 400 200 L 50 50 1 0 T
+X B0 18 500 500 200 L 50 50 1 0 T
+X CE 19 -500 -500 200 R 50 50 1 0 I I
+X A0 2 -500 500 200 R 50 50 1 0 T
+X VCC 20 0 800 200 D 50 50 1 0 W
+X A1 3 -500 400 200 R 50 50 1 0 T
+X A2 4 -500 300 200 R 50 50 1 0 T
+X A3 5 -500 200 200 R 50 50 1 0 T
+X A4 6 -500 100 200 R 50 50 1 0 T
+X A5 7 -500 0 200 R 50 50 1 0 T
+X A6 8 -500 -100 200 R 50 50 1 0 T
+X A7 9 -500 -200 200 R 50 50 1 0 T
+ENDDRAW
+ENDDEF
+#
+# 74xx_74LS32
+#
+DEF 74xx_74LS32 U 0 40 Y Y 5 L N
+F0 "U" 0 50 50 H V C CNN
+F1 "74xx_74LS32" 0 -50 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ DIP?14*
+$ENDFPLIST
+DRAW
+A -360 0 258 354 -354 1 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 1 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 1 1 10 f 150 0 -24 -150
+A -360 0 258 354 -354 2 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 2 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 2 1 10 f 150 0 -24 -150
+A -360 0 258 354 -354 3 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 3 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 3 1 10 f 150 0 -24 -150
+A -360 0 258 354 -354 4 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 4 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 4 1 10 f 150 0 -24 -150
+A 0 0 150 -899 899 1 2 10 f 0 -150 0 150
+A 0 0 150 -899 899 2 2 10 f 0 -150 0 150
+A 0 0 150 -899 899 3 2 10 f 0 -150 0 150
+A 0 0 150 -899 899 4 2 10 f 0 -150 0 150
+S -200 300 200 -300 5 1 10 f
+P 2 1 1 10 -150 -150 -25 -150 f
+P 2 1 1 10 -150 150 -25 150 f
+P 12 1 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
+P 2 2 1 10 -150 -150 -25 -150 f
+P 2 2 1 10 -150 150 -25 150 f
+P 12 2 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
+P 2 3 1 10 -150 -150 -25 -150 f
+P 2 3 1 10 -150 150 -25 150 f
+P 12 3 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
+P 2 4 1 10 -150 -150 -25 -150 f
+P 2 4 1 10 -150 150 -25 150 f
+P 12 4 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
+P 4 1 2 10 0 150 -150 150 -150 -150 0 -150 f
+P 4 2 2 10 0 150 -150 150 -150 -150 0 -150 f
+P 4 3 2 10 0 150 -150 150 -150 -150 0 -150 f
+P 4 4 2 10 0 150 -150 150 -150 -150 0 -150 f
+X VCC 14 0 500 200 D 50 50 5 0 W
+X GND 7 0 -500 200 U 50 50 5 0 W
+X ~ 1 -300 100 170 R 50 50 1 1 I
+X ~ 2 -300 -100 170 R 50 50 1 1 I
+X ~ 3 300 0 150 L 50 50 1 1 O
+X ~ 4 -300 100 170 R 50 50 2 1 I
+X ~ 5 -300 -100 170 R 50 50 2 1 I
+X ~ 6 300 0 150 L 50 50 2 1 O
+X ~ 10 -300 -100 170 R 50 50 3 1 I
+X ~ 8 300 0 150 L 50 50 3 1 O
+X ~ 9 -300 100 170 R 50 50 3 1 I
+X ~ 11 300 0 150 L 50 50 4 1 O
+X ~ 12 -300 100 170 R 50 50 4 1 I
+X ~ 13 -300 -100 170 R 50 50 4 1 I
+X ~ 1 -300 100 150 R 50 50 1 2 I I
+X ~ 2 -300 -100 150 R 50 50 1 2 I I
+X ~ 3 300 0 150 L 50 50 1 2 O I
+X ~ 4 -300 100 150 R 50 50 2 2 I I
+X ~ 5 -300 -100 150 R 50 50 2 2 I I
+X ~ 6 300 0 150 L 50 50 2 2 O I
+X ~ 10 -300 -100 150 R 50 50 3 2 I I
+X ~ 8 300 0 150 L 50 50 3 2 O I
+X ~ 9 -300 100 150 R 50 50 3 2 I I
+X ~ 11 300 0 150 L 50 50 4 2 O I
+X ~ 12 -300 100 150 R 50 50 4 2 I I
+X ~ 13 -300 -100 150 R 50 50 4 2 I I
+ENDDRAW
+ENDDEF
+#
+# 74xx_74LS374
+#
+DEF 74xx_74LS374 U 0 20 Y Y 1 F N
+F0 "U" -300 650 50 H V C CNN
+F1 "74xx_74LS374" -300 -650 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS 74HC374 74HCT374 74AHC374 74AHCT374
+$FPLIST
+ DIP?20*
+ SOIC?20*
+ SO?20*
+$ENDFPLIST
+DRAW
+S -300 600 300 -600 1 1 10 f
+X OE 1 -500 -500 200 R 50 50 1 0 I I
+X GND 10 0 -800 200 U 50 50 1 0 W
+X Cp 11 -500 -400 200 R 50 50 1 0 I C
+X O4 12 500 100 200 L 50 50 1 0 T
+X D4 13 -500 100 200 R 50 50 1 0 I
+X D5 14 -500 0 200 R 50 50 1 0 I
+X O5 15 500 0 200 L 50 50 1 0 T
+X O6 16 500 -100 200 L 50 50 1 0 T
+X D6 17 -500 -100 200 R 50 50 1 0 I
+X D7 18 -500 -200 200 R 50 50 1 0 I
+X O7 19 500 -200 200 L 50 50 1 0 T
+X O0 2 500 500 200 L 50 50 1 0 T
+X VCC 20 0 800 200 D 50 50 1 0 W
+X D0 3 -500 500 200 R 50 50 1 0 I
+X D1 4 -500 400 200 R 50 50 1 0 I
+X O1 5 500 400 200 L 50 50 1 0 T
+X O2 6 500 300 200 L 50 50 1 0 T
+X D2 7 -500 300 200 R 50 50 1 0 I
+X D3 8 -500 200 200 R 50 50 1 0 I
+X O3 9 500 200 200 L 50 50 1 0 T
+ENDDRAW
+ENDDEF
+#
+# Connector_Generic_Conn_02x25_Counter_Clockwise
+#
+DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
+F0 "J" 50 1300 50 H V C CNN
+F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Connector*:*_2x??_*
+$ENDFPLIST
+DRAW
+S -50 -1195 0 -1205 1 1 6 N
+S -50 -1095 0 -1105 1 1 6 N
+S -50 -995 0 -1005 1 1 6 N
+S -50 -895 0 -905 1 1 6 N
+S -50 -795 0 -805 1 1 6 N
+S -50 -695 0 -705 1 1 6 N
+S -50 -595 0 -605 1 1 6 N
+S -50 -495 0 -505 1 1 6 N
+S -50 -395 0 -405 1 1 6 N
+S -50 -295 0 -305 1 1 6 N
+S -50 -195 0 -205 1 1 6 N
+S -50 -95 0 -105 1 1 6 N
+S -50 5 0 -5 1 1 6 N
+S -50 105 0 95 1 1 6 N
+S -50 205 0 195 1 1 6 N
+S -50 305 0 295 1 1 6 N
+S -50 405 0 395 1 1 6 N
+S -50 505 0 495 1 1 6 N
+S -50 605 0 595 1 1 6 N
+S -50 705 0 695 1 1 6 N
+S -50 805 0 795 1 1 6 N
+S -50 905 0 895 1 1 6 N
+S -50 1005 0 995 1 1 6 N
+S -50 1105 0 1095 1 1 6 N
+S -50 1205 0 1195 1 1 6 N
+S -50 1250 150 -1250 1 1 10 f
+S 150 -1195 100 -1205 1 1 6 N
+S 150 -1095 100 -1105 1 1 6 N
+S 150 -995 100 -1005 1 1 6 N
+S 150 -895 100 -905 1 1 6 N
+S 150 -795 100 -805 1 1 6 N
+S 150 -695 100 -705 1 1 6 N
+S 150 -595 100 -605 1 1 6 N
+S 150 -495 100 -505 1 1 6 N
+S 150 -395 100 -405 1 1 6 N
+S 150 -295 100 -305 1 1 6 N
+S 150 -195 100 -205 1 1 6 N
+S 150 -95 100 -105 1 1 6 N
+S 150 5 100 -5 1 1 6 N
+S 150 105 100 95 1 1 6 N
+S 150 205 100 195 1 1 6 N
+S 150 305 100 295 1 1 6 N
+S 150 405 100 395 1 1 6 N
+S 150 505 100 495 1 1 6 N
+S 150 605 100 595 1 1 6 N
+S 150 705 100 695 1 1 6 N
+S 150 805 100 795 1 1 6 N
+S 150 905 100 895 1 1 6 N
+S 150 1005 100 995 1 1 6 N
+S 150 1105 100 1095 1 1 6 N
+S 150 1205 100 1195 1 1 6 N
+X Pin_1 1 -200 1200 150 R 50 50 1 1 P
+X Pin_10 10 -200 300 150 R 50 50 1 1 P
+X Pin_11 11 -200 200 150 R 50 50 1 1 P
+X Pin_12 12 -200 100 150 R 50 50 1 1 P
+X Pin_13 13 -200 0 150 R 50 50 1 1 P
+X Pin_14 14 -200 -100 150 R 50 50 1 1 P
+X Pin_15 15 -200 -200 150 R 50 50 1 1 P
+X Pin_16 16 -200 -300 150 R 50 50 1 1 P
+X Pin_17 17 -200 -400 150 R 50 50 1 1 P
+X Pin_18 18 -200 -500 150 R 50 50 1 1 P
+X Pin_19 19 -200 -600 150 R 50 50 1 1 P
+X Pin_2 2 -200 1100 150 R 50 50 1 1 P
+X Pin_20 20 -200 -700 150 R 50 50 1 1 P
+X Pin_21 21 -200 -800 150 R 50 50 1 1 P
+X Pin_22 22 -200 -900 150 R 50 50 1 1 P
+X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
+X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
+X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
+X Pin_26 26 300 -1200 150 L 50 50 1 1 P
+X Pin_27 27 300 -1100 150 L 50 50 1 1 P
+X Pin_28 28 300 -1000 150 L 50 50 1 1 P
+X Pin_29 29 300 -900 150 L 50 50 1 1 P
+X Pin_3 3 -200 1000 150 R 50 50 1 1 P
+X Pin_30 30 300 -800 150 L 50 50 1 1 P
+X Pin_31 31 300 -700 150 L 50 50 1 1 P
+X Pin_32 32 300 -600 150 L 50 50 1 1 P
+X Pin_33 33 300 -500 150 L 50 50 1 1 P
+X Pin_34 34 300 -400 150 L 50 50 1 1 P
+X Pin_35 35 300 -300 150 L 50 50 1 1 P
+X Pin_36 36 300 -200 150 L 50 50 1 1 P
+X Pin_37 37 300 -100 150 L 50 50 1 1 P
+X Pin_38 38 300 0 150 L 50 50 1 1 P
+X Pin_39 39 300 100 150 L 50 50 1 1 P
+X Pin_4 4 -200 900 150 R 50 50 1 1 P
+X Pin_40 40 300 200 150 L 50 50 1 1 P
+X Pin_41 41 300 300 150 L 50 50 1 1 P
+X Pin_42 42 300 400 150 L 50 50 1 1 P
+X Pin_43 43 300 500 150 L 50 50 1 1 P
+X Pin_44 44 300 600 150 L 50 50 1 1 P
+X Pin_45 45 300 700 150 L 50 50 1 1 P
+X Pin_46 46 300 800 150 L 50 50 1 1 P
+X Pin_47 47 300 900 150 L 50 50 1 1 P
+X Pin_48 48 300 1000 150 L 50 50 1 1 P
+X Pin_49 49 300 1100 150 L 50 50 1 1 P
+X Pin_5 5 -200 800 150 R 50 50 1 1 P
+X Pin_50 50 300 1200 150 L 50 50 1 1 P
+X Pin_6 6 -200 700 150 R 50 50 1 1 P
+X Pin_7 7 -200 600 150 R 50 50 1 1 P
+X Pin_8 8 -200 500 150 R 50 50 1 1 P
+X Pin_9 9 -200 400 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_C_Small
+#
+DEF Device_C_Small C 0 10 N N 1 F N
+F0 "C" 10 70 50 H V L CNN
+F1 "Device_C_Small" 10 -80 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 13 -60 -20 60 -20 N
+P 2 0 1 12 -60 20 60 20 N
+X ~ 1 0 100 80 D 50 50 1 1 P
+X ~ 2 0 -100 80 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Memory_EPROM_27C080
+#
+DEF Memory_EPROM_27C080 U 0 20 Y Y 1 F N
+F0 "U" -300 1250 50 H V C CNN
+F1 "Memory_EPROM_27C080" 100 -1250 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ DIP*W15.24mm*
+ PLCC*
+$ENDFPLIST
+DRAW
+S -300 1200 300 -1200 1 1 10 f
+X A19 1 -400 -800 100 R 50 50 1 1 I
+X A2 10 -400 900 100 R 50 50 1 1 I
+X A1 11 -400 1000 100 R 50 50 1 1 I
+X A0 12 -400 1100 100 R 50 50 1 1 I
+X D0 13 400 1100 100 L 50 50 1 1 T
+X D1 14 400 1000 100 L 50 50 1 1 T
+X D2 15 400 900 100 L 50 50 1 1 T
+X GND 16 0 -1300 100 U 50 50 1 1 W
+X D3 17 400 800 100 L 50 50 1 1 T
+X D4 18 400 700 100 L 50 50 1 1 T
+X D5 19 400 600 100 L 50 50 1 1 T
+X A16 2 -400 -500 100 R 50 50 1 1 I
+X D6 20 400 500 100 L 50 50 1 1 T
+X D7 21 400 400 100 L 50 50 1 1 T
+X ~CE 22 -400 -1000 100 R 50 50 1 1 I
+X A10 23 -400 100 100 R 50 50 1 1 I
+X ~OE 24 -400 -1100 100 R 50 50 1 1 I
+X A11 25 -400 0 100 R 50 50 1 1 I
+X A9 26 -400 200 100 R 50 50 1 1 I
+X A8 27 -400 300 100 R 50 50 1 1 I
+X A13 28 -400 -200 100 R 50 50 1 1 I
+X A14 29 -400 -300 100 R 50 50 1 1 I
+X A15 3 -400 -400 100 R 50 50 1 1 I
+X A17 30 -400 -600 100 R 50 50 1 1 I
+X A18 31 -400 -700 100 R 50 50 1 1 I
+X VCC 32 0 1300 100 D 50 50 1 1 W
+X A12 4 -400 -100 100 R 50 50 1 1 I
+X A7 5 -400 400 100 R 50 50 1 1 I
+X A6 6 -400 500 100 R 50 50 1 1 I
+X A5 7 -400 600 100 R 50 50 1 1 I
+X A4 8 -400 700 100 R 50 50 1 1 I
+X A3 9 -400 800 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# power_+5V
+#
+DEF power_+5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_GND
+#
+DEF power_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "power_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Hardware/ProDOS ROM-Drive 2.5.kicad_pcb b/Hardware/ProDOS ROM-Drive 3.0.kicad_pcb
old mode 100755
new mode 100644
similarity index 80%
rename from Hardware/ProDOS ROM-Drive 2.5.kicad_pcb
rename to Hardware/ProDOS ROM-Drive 3.0.kicad_pcb
index d697ff4..a1e4e7d
--- a/Hardware/ProDOS ROM-Drive 2.5.kicad_pcb
+++ b/Hardware/ProDOS ROM-Drive 3.0.kicad_pcb
@@ -1,19 +1,19 @@
-(kicad_pcb (version 20171130) (host pcbnew "(5.0.1-3-g963ef8bb5)")
+(kicad_pcb (version 20171130) (host pcbnew "(5.1.10-1-10_14)")
(general
(thickness 1.6)
(drawings 35)
- (tracks 1452)
+ (tracks 1353)
(zones 0)
(modules 17)
- (nets 81)
+ (nets 56)
)
(page User 152.4 127)
(title_block
(title "ProDOS ROM-Drive")
- (date 2019-04-25)
- (rev 2.5)
+ (date 2021-12-07)
+ (rev 3.0)
(company "Terence J. Boldt")
)
@@ -40,8 +40,6 @@
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.1778)
- (segment_width 0.2)
- (edge_width 0.15)
(via_size 0.762)
(via_drill 0.50038)
(via_min_size 0.4)
@@ -51,6 +49,8 @@
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
+ (edge_width 0.15)
+ (segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
@@ -139,39 +139,14 @@
(net 45 "Net-(J1-Pad7)")
(net 46 "Net-(J1-Pad8)")
(net 47 "Net-(J1-Pad9)")
- (net 48 "Net-(J1-Pad10)")
- (net 49 "Net-(J1-Pad11)")
- (net 50 "Net-(J1-Pad12)")
- (net 51 "Net-(J1-Pad13)")
- (net 52 "Net-(J1-Pad14)")
- (net 53 "Net-(J1-Pad15)")
- (net 54 "Net-(J1-Pad16)")
- (net 55 "Net-(J1-Pad17)")
- (net 56 "Net-(J1-Pad18)")
- (net 57 "Net-(J1-Pad19)")
- (net 58 "Net-(J1-Pad20)")
- (net 59 "Net-(J1-Pad21)")
- (net 60 "Net-(J1-Pad22)")
- (net 61 "Net-(J1-Pad23)")
- (net 62 "Net-(J1-Pad24)")
- (net 63 "Net-(J1-Pad29)")
- (net 64 "Net-(J1-Pad30)")
- (net 65 "Net-(J1-Pad31)")
- (net 66 "Net-(J1-Pad32)")
- (net 67 "Net-(J1-Pad33)")
- (net 68 "Net-(J1-Pad34)")
- (net 69 "Net-(J1-Pad35)")
- (net 70 "Net-(J1-Pad36)")
- (net 71 "Net-(J1-Pad38)")
- (net 72 "Net-(J1-Pad37)")
- (net 73 "Net-(J1-Pad39)")
- (net 74 "Net-(J1-Pad40)")
- (net 75 "Net-(J1-Pad50)")
- (net 76 "Net-(LowAddrLatch1-Pad11)")
- (net 77 "Net-(U1-Pad3)")
- (net 78 "Net-(U1-Pad11)")
- (net 79 "Net-(U2-Pad12)")
- (net 80 "Net-(EPROM1-Pad22)")
+ (net 48 "Net-(J1-Pad18)")
+ (net 49 "Net-(J1-Pad23)")
+ (net 50 "Net-(J1-Pad24)")
+ (net 51 "Net-(LowAddrLatch1-Pad11)")
+ (net 52 "Net-(U1-Pad3)")
+ (net 53 "Net-(U1-Pad11)")
+ (net 54 "Net-(U2-Pad12)")
+ (net 55 "Net-(EPROM1-Pad22)")
(net_class Default "This is the default net class."
(clearance 0.1778)
@@ -222,34 +197,9 @@
(add_net "Net-(HiAddrBuffer1-Pad19)")
(add_net "Net-(HiAddrLatch1-Pad1)")
(add_net "Net-(HiAddrLatch1-Pad11)")
- (add_net "Net-(J1-Pad10)")
- (add_net "Net-(J1-Pad11)")
- (add_net "Net-(J1-Pad12)")
- (add_net "Net-(J1-Pad13)")
- (add_net "Net-(J1-Pad14)")
- (add_net "Net-(J1-Pad15)")
- (add_net "Net-(J1-Pad16)")
- (add_net "Net-(J1-Pad17)")
(add_net "Net-(J1-Pad18)")
- (add_net "Net-(J1-Pad19)")
- (add_net "Net-(J1-Pad20)")
- (add_net "Net-(J1-Pad21)")
- (add_net "Net-(J1-Pad22)")
(add_net "Net-(J1-Pad23)")
(add_net "Net-(J1-Pad24)")
- (add_net "Net-(J1-Pad29)")
- (add_net "Net-(J1-Pad30)")
- (add_net "Net-(J1-Pad31)")
- (add_net "Net-(J1-Pad32)")
- (add_net "Net-(J1-Pad33)")
- (add_net "Net-(J1-Pad34)")
- (add_net "Net-(J1-Pad35)")
- (add_net "Net-(J1-Pad36)")
- (add_net "Net-(J1-Pad37)")
- (add_net "Net-(J1-Pad38)")
- (add_net "Net-(J1-Pad39)")
- (add_net "Net-(J1-Pad40)")
- (add_net "Net-(J1-Pad50)")
(add_net "Net-(J1-Pad6)")
(add_net "Net-(J1-Pad7)")
(add_net "Net-(J1-Pad8)")
@@ -291,9 +241,6 @@
(fp_text value 27C080 (at 7.62 40.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 7.62 19.05) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
(fp_line (start 16.3 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 16.3 39.65) (end 16.3 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 39.65) (end 16.3 39.65) (layer F.CrtYd) (width 0.05))
@@ -308,6 +255,9 @@
(fp_line (start 14.985 39.37) (end 0.255 39.37) (layer F.Fab) (width 0.1))
(fp_line (start 14.985 -1.27) (end 14.985 39.37) (layer F.Fab) (width 0.1))
(fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 7.62 19.05) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
(fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(pad 32 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 1 +5V))
@@ -342,7 +292,7 @@
(pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 30 "Net-(EPROM1-Pad9)"))
(pad 24 thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 80 "Net-(EPROM1-Pad22)"))
+ (net 55 "Net-(EPROM1-Pad22)"))
(pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 29 "Net-(EPROM1-Pad8)"))
(pad 23 thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -350,7 +300,7 @@
(pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 27 "Net-(EPROM1-Pad7)"))
(pad 22 thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 80 "Net-(EPROM1-Pad22)"))
+ (net 55 "Net-(EPROM1-Pad22)"))
(pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 26 "Net-(EPROM1-Pad6)"))
(pad 21 thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -393,6 +343,8 @@
(fp_line (start 48.895 1.27) (end 49.53 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -15.875 6.35) (end -15.875 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -15.875 1.27) (end -16.51 1.27) (layer F.SilkS) (width 0.15))
+ (fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer F.Mask) (width 0.15))
+ (fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer B.Mask) (width 0.15))
(fp_text user "7 A5" (at 1.905 0 45) (layer F.Fab)
(effects (font (size 0.762 0.762) (thickness 0.127)))
)
@@ -426,8 +378,6 @@
(fp_text user "50 +12V" (at -15.494 11.43 45) (layer F.Fab)
(effects (font (size 0.762 0.762) (thickness 0.127)))
)
- (fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer F.Mask) (width 0.15))
- (fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer B.Mask) (width 0.15))
(fp_text user "10 A8" (at 9.779 -0.254 45) (layer F.Fab)
(effects (font (size 0.762 0.762) (thickness 0.127)))
)
@@ -563,68 +513,44 @@
(net 46 "Net-(J1-Pad8)"))
(pad 9 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
(net 47 "Net-(J1-Pad9)"))
- (pad 10 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 48 "Net-(J1-Pad10)"))
- (pad 11 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 49 "Net-(J1-Pad11)"))
- (pad 12 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 50 "Net-(J1-Pad12)"))
- (pad 13 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 51 "Net-(J1-Pad13)"))
- (pad 14 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 52 "Net-(J1-Pad14)"))
- (pad 15 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 53 "Net-(J1-Pad15)"))
- (pad 16 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 54 "Net-(J1-Pad16)"))
- (pad 17 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 55 "Net-(J1-Pad17)"))
+ (pad 10 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 11 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 12 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 13 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 14 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 15 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 16 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 17 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
(pad 18 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 56 "Net-(J1-Pad18)"))
- (pad 19 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 57 "Net-(J1-Pad19)"))
- (pad 20 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 58 "Net-(J1-Pad20)"))
- (pad 21 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 59 "Net-(J1-Pad21)"))
- (pad 22 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 60 "Net-(J1-Pad22)"))
+ (net 48 "Net-(J1-Pad18)"))
+ (pad 19 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 20 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 21 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
+ (pad 22 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
(pad 23 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 61 "Net-(J1-Pad23)"))
+ (net 49 "Net-(J1-Pad23)"))
(pad 24 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
- (net 62 "Net-(J1-Pad24)"))
+ (net 50 "Net-(J1-Pad24)"))
(pad 25 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)
(net 1 +5V))
(pad 26 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
(net 2 GND))
(pad 27 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 62 "Net-(J1-Pad24)"))
+ (net 50 "Net-(J1-Pad24)"))
(pad 28 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 61 "Net-(J1-Pad23)"))
- (pad 29 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 63 "Net-(J1-Pad29)"))
- (pad 30 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 64 "Net-(J1-Pad30)"))
- (pad 31 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 65 "Net-(J1-Pad31)"))
- (pad 32 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 66 "Net-(J1-Pad32)"))
- (pad 33 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 67 "Net-(J1-Pad33)"))
- (pad 34 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 68 "Net-(J1-Pad34)"))
- (pad 35 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 69 "Net-(J1-Pad35)"))
- (pad 36 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 70 "Net-(J1-Pad36)"))
- (pad 38 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 71 "Net-(J1-Pad38)"))
- (pad 37 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 72 "Net-(J1-Pad37)"))
- (pad 39 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 73 "Net-(J1-Pad39)"))
- (pad 40 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 74 "Net-(J1-Pad40)"))
+ (net 49 "Net-(J1-Pad23)"))
+ (pad 29 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 30 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 31 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 32 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 33 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 34 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 35 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 36 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 38 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 37 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 39 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
+ (pad 40 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
(pad 41 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
(net 42 "Net-(HiAddrLatch1-Pad1)"))
(pad 42 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
@@ -643,8 +569,7 @@
(net 7 "Net-(DataBuffer1-Pad3)"))
(pad 49 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
(net 5 "Net-(DataBuffer1-Pad2)"))
- (pad 50 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
- (net 75 "Net-(J1-Pad50)"))
+ (pad 50 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
)
(module Package_DIP:DIP-20_W7.62mm (layer F.Cu) (tedit 5CB858AC) (tstamp 5C771E8A)
@@ -658,9 +583,6 @@
(fp_text value 74LS374 (at 3.81 25.19) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 3.81 11.43) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05))
@@ -675,6 +597,9 @@
(fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 3.81 11.43) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
(fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(pad 20 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 1 +5V))
@@ -734,9 +659,6 @@
(fp_text value 74LS245 (at 3.81 25.19 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 3.81 11.43 90) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05))
@@ -751,6 +673,9 @@
(fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 3.81 11.43 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
(fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(pad 20 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 1 +5V))
@@ -810,9 +735,6 @@
(fp_text value 74LS245 (at 3.81 25.19) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 3.81 11.43) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05))
@@ -827,6 +749,9 @@
(fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 3.81 11.43) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
(fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(pad 20 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 1 +5V))
@@ -835,35 +760,35 @@
(pad 19 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 41 "Net-(HiAddrBuffer1-Pad19)"))
(pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 18 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 24 "Net-(EPROM1-Pad4)"))
(pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 17 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 37 "Net-(EPROM1-Pad28)"))
(pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 16 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 38 "Net-(EPROM1-Pad29)"))
(pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 15 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 23 "Net-(EPROM1-Pad3)"))
(pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 14 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 22 "Net-(EPROM1-Pad2)"))
(pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 13 thru_hole oval (at 7.62 17.78) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 39 "Net-(EPROM1-Pad30)"))
(pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 12 thru_hole oval (at 7.62 20.32) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 40 "Net-(EPROM1-Pad31)"))
(pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 11 thru_hole oval (at 7.62 22.86) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 21 "Net-(EPROM1-Pad1)"))
(pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -886,7 +811,6 @@
(fp_text value 74LS245 (at 3.81 25.19) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1))
@@ -901,6 +825,7 @@
(fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
+ (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 3.81 11.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
@@ -925,19 +850,19 @@
(pad 15 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 25 "Net-(EPROM1-Pad5)"))
(pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 48 "Net-(J1-Pad10)"))
+ (net 1 +5V))
(pad 16 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 26 "Net-(EPROM1-Pad6)"))
(pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 49 "Net-(J1-Pad11)"))
+ (net 1 +5V))
(pad 17 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 27 "Net-(EPROM1-Pad7)"))
(pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 50 "Net-(J1-Pad12)"))
+ (net 2 GND))
(pad 18 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 29 "Net-(EPROM1-Pad8)"))
(pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 1 +5V))
+ (net 2 GND))
(pad 19 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 41 "Net-(HiAddrBuffer1-Pad19)"))
(pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -962,7 +887,6 @@
(fp_text value 74LS374 (at 3.81 25.19) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1))
@@ -977,13 +901,14 @@
(fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
+ (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 3.81 11.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 42 "Net-(HiAddrLatch1-Pad1)"))
(pad 11 thru_hole oval (at 7.62 22.86) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 76 "Net-(LowAddrLatch1-Pad11)"))
+ (net 51 "Net-(LowAddrLatch1-Pad11)"))
(pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 29 "Net-(EPROM1-Pad8)"))
(pad 12 thru_hole oval (at 7.62 20.32) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -1038,9 +963,6 @@
(fp_text value 74LS00 (at 3.81 17.57 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 3.81 7.62 90) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 16.8) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.1 16.8) (end 8.7 16.8) (layer F.CrtYd) (width 0.05))
@@ -1055,6 +977,9 @@
(fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 3.81 7.62 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
(fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(pad 14 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 1 +5V))
@@ -1067,17 +992,17 @@
(pad 12 thru_hole oval (at 7.62 5.08 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 36 "Net-(EPROM1-Pad12)"))
(pad 5 thru_hole oval (at 0 10.16 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 77 "Net-(U1-Pad3)"))
+ (net 52 "Net-(U1-Pad3)"))
(pad 11 thru_hole oval (at 7.62 7.62 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 78 "Net-(U1-Pad11)"))
+ (net 53 "Net-(U1-Pad11)"))
(pad 4 thru_hole oval (at 0 7.62 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 77 "Net-(U1-Pad3)"))
+ (net 52 "Net-(U1-Pad3)"))
(pad 10 thru_hole oval (at 7.62 10.16 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 56 "Net-(J1-Pad18)"))
+ (net 48 "Net-(J1-Pad18)"))
(pad 3 thru_hole oval (at 0 5.08 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 77 "Net-(U1-Pad3)"))
+ (net 52 "Net-(U1-Pad3)"))
(pad 9 thru_hole oval (at 7.62 12.7 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 56 "Net-(J1-Pad18)"))
+ (net 48 "Net-(J1-Pad18)"))
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 42 "Net-(HiAddrLatch1-Pad1)"))
(pad 8 thru_hole oval (at 7.62 15.24 90) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -1102,7 +1027,6 @@
(fp_text value 74LS32 (at 3.81 17.57) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1))
@@ -1117,33 +1041,34 @@
(fp_line (start -1.1 16.8) (end 8.7 16.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 16.8) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05))
+ (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 3.81 7.62) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 20 "Net-(DataBuffer1-Pad19)"))
(pad 8 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 76 "Net-(LowAddrLatch1-Pad11)"))
+ (net 51 "Net-(LowAddrLatch1-Pad11)"))
(pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 3 "Net-(DataBuffer1-Pad1)"))
(pad 9 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 79 "Net-(U2-Pad12)"))
+ (net 54 "Net-(U2-Pad12)"))
(pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 80 "Net-(EPROM1-Pad22)"))
+ (net 55 "Net-(EPROM1-Pad22)"))
(pad 10 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 36 "Net-(EPROM1-Pad12)"))
(pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 56 "Net-(J1-Pad18)"))
+ (net 48 "Net-(J1-Pad18)"))
(pad 11 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 43 "Net-(HiAddrLatch1-Pad11)"))
(pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 42 "Net-(HiAddrLatch1-Pad1)"))
(pad 12 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 79 "Net-(U2-Pad12)"))
+ (net 54 "Net-(U2-Pad12)"))
(pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 79 "Net-(U2-Pad12)"))
+ (net 54 "Net-(U2-Pad12)"))
(pad 13 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
- (net 78 "Net-(U1-Pad11)"))
+ (net 53 "Net-(U1-Pad11)"))
(pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
(net 2 GND))
(pad 14 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.889) (layers *.Cu *.Mask)
@@ -1166,9 +1091,6 @@
(fp_text value 0.1µF (at 1.25 2.25 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 1.25 0 90) (layer F.Fab)
- (effects (font (size 0.6 0.6) (thickness 0.09)))
- )
(fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05))
@@ -1183,6 +1105,9 @@
(fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 1.25 0 90) (layer F.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.09)))
+ )
(pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
@@ -1244,9 +1169,6 @@
(fp_text value 0.1µF (at 1.25 2.25 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 1.25 0 90) (layer F.Fab)
- (effects (font (size 0.6 0.6) (thickness 0.09)))
- )
(fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05))
@@ -1261,6 +1183,9 @@
(fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 1.25 0 90) (layer F.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.09)))
+ )
(pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
@@ -1361,9 +1286,6 @@
(fp_text value 0.1µF (at 1.25 2.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 1.25 0) (layer F.Fab)
- (effects (font (size 0.6 0.6) (thickness 0.09)))
- )
(fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05))
@@ -1378,6 +1300,9 @@
(fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 1.25 0) (layer F.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.09)))
+ )
(pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
@@ -1439,9 +1364,6 @@
(fp_text value 0.1µF (at 1.25 2.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 1.25 0) (layer F.Fab)
- (effects (font (size 0.6 0.6) (thickness 0.09)))
- )
(fp_line (start 3.55 -1.25) (end -1.05 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.55 1.25) (end 3.55 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.25) (end 3.55 1.25) (layer F.CrtYd) (width 0.05))
@@ -1456,6 +1378,9 @@
(fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 1.25 0) (layer F.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.09)))
+ )
(pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
@@ -1469,7 +1394,7 @@
(gr_poly (pts (xy 118.491 68.58) (xy 118.491 75.692) (xy 117.856 76.327) (xy 54.356 76.454) (xy 53.721 75.692) (xy 53.721 68.58)) (layer Eco2.User) (width 0.15))
(gr_poly (pts (xy 33.528 23.114) (xy 34.163 22.479) (xy 118.618 22.479) (xy 119.253 23.114) (xy 119.253 68.58) (xy 118.491 68.58) (xy 34.163 68.58) (xy 33.528 67.945)) (layer Eco1.User) (width 0.15))
- (gr_text "ProDOS ROM-Drive v2.5\nFor Apple ][ computers\nBootable 1 MB read-only solid state disk\n(c)1998-2019 Terence J. Boldt\n" (at 45.20184 29.53258 90) (layer B.Cu) (tstamp 5CBA1315)
+ (gr_text "ProDOS ROM-Drive v3.0\nFor Apple ][ computers\nBootable 1 MB read-only solid state disk\n(c)1998-2021 Terence J. Boldt\nhttps://github.com/tjboldt/ProDOS-ROM-Drive\n" (at 45.3644 27.432 90) (layer B.Cu) (tstamp 5CBA1315)
(effects (font (size 0.9906 0.9906) (thickness 0.14986)) (justify left mirror))
)
(gr_line (start 33.64484 68.52158) (end 34.27984 69.15658) (layer Edge.Cuts) (width 0.15))
@@ -1485,10 +1410,10 @@
(gr_line (start 119.36984 69.15658) (end 119.36984 23.69058) (layer Edge.Cuts) (width 0.15))
(gr_line (start 54.47284 77.03058) (end 117.97284 77.03058) (layer Edge.Cuts) (width 0.15))
(gr_line (start 33.64484 23.69058) (end 33.64484 68.52158) (layer Edge.Cuts) (width 0.15))
- (gr_text "ProDOS ROM-Drive v2.5\n(c)1998-2019 Terence J. Boldt" (at 88.76284 65.72758) (layer F.SilkS) (tstamp 5CB88057)
+ (gr_text "ProDOS ROM-Drive v3.0\n(c)1998-2021 Terence J. Boldt\nhttps://github.com/tjboldt/ProDOS-ROM-Drive" (at 71.3994 66.3702) (layer F.SilkS) (tstamp 5CB88057)
(effects (font (size 0.9906 0.9906) (thickness 0.14986)) (justify left))
)
- (gr_text "27C080 / 27C801 EPROM\nFirmware $FF800 - $FFFFF\nDrive Image $00000 - $FF7FF" (at 44.43222 58.02884 90) (layer F.SilkS) (tstamp 5CB87F8D)
+ (gr_text "27C080 / 27C801 EPROM\nFirmware $00300 - $003FF\nDrive Image $00000 - $FFFFF" (at 44.43222 58.02884 90) (layer F.SilkS) (tstamp 5CB87F8D)
(effects (font (size 0.9906 0.9906) (thickness 0.14986)) (justify left))
)
(gr_text "OR Logic 74LS32" (at 113.284 39.751 90) (layer F.SilkS) (tstamp 5CB87EC8)
@@ -1523,177 +1448,164 @@
(gr_line (start -470.408 -319.786) (end -470.408 -327.66) (layer Dwgs.User) (width 0.15))
(gr_line (start -535.432 -319.786) (end -470.408 -319.786) (layer Dwgs.User) (width 0.15))
- (segment (start 116.70284 62.42558) (end 114.03584 59.75858) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 116.70284 72.96658) (end 116.70284 62.42558) (width 0.8128) (layer F.Cu) (net 1))
+ (segment (start 116.70284 62.42558) (end 114.03584 59.75858) (width 0.8128) (layer F.Cu) (net 1) (status 20))
+ (segment (start 116.70284 72.96658) (end 116.70284 62.42558) (width 0.8128) (layer F.Cu) (net 1) (status 10))
(segment (start 116.70284 62.42558) (end 116.70284 51.24958) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 117.756839 32.618579) (end 116.95684 31.81858) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 118.417241 33.278981) (end 117.756839 32.618579) (width 0.8128) (layer F.Cu) (net 1))
+ (segment (start 118.417241 33.278981) (end 116.95684 31.81858) (width 0.8128) (layer F.Cu) (net 1) (status 20))
(segment (start 118.417241 49.535179) (end 118.417241 33.278981) (width 0.8128) (layer F.Cu) (net 1))
(segment (start 116.70284 51.24958) (end 118.417241 49.535179) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 106.65821 26.48458) (end 105.52684 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 112.75421 26.48458) (end 106.65821 26.48458) (width 0.8128) (layer F.Cu) (net 1))
+ (segment (start 112.75421 26.48458) (end 105.52684 26.48458) (width 0.8128) (layer F.Cu) (net 1) (status 20))
(segment (start 116.95684 30.68721) (end 112.75421 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 116.95684 31.81858) (end 116.95684 30.68721) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 105.52684 26.48458) (end 97.90684 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 97.90684 26.48458) (end 93.46184 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 93.46184 26.48458) (end 85.84184 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 85.84184 26.48458) (end 81.39684 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 69.623839 25.684581) (end 68.82384 26.48458) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 70.284241 25.024179) (end 69.623839 25.684581) (width 0.8128) (layer F.Cu) (net 1))
+ (segment (start 116.95684 31.81858) (end 116.95684 30.68721) (width 0.8128) (layer F.Cu) (net 1) (status 10))
+ (segment (start 105.52684 26.48458) (end 97.90684 26.48458) (width 0.8128) (layer F.Cu) (net 1) (status 30))
+ (segment (start 97.90684 26.48458) (end 93.46184 26.48458) (width 0.8128) (layer F.Cu) (net 1) (status 30))
+ (segment (start 93.46184 26.48458) (end 85.84184 26.48458) (width 0.8128) (layer F.Cu) (net 1) (status 30))
+ (segment (start 85.84184 26.48458) (end 81.39684 26.48458) (width 0.8128) (layer F.Cu) (net 1) (status 30))
+ (segment (start 70.284241 25.024179) (end 68.82384 26.48458) (width 0.8128) (layer F.Cu) (net 1) (status 20))
(segment (start 79.936439 25.024179) (end 70.284241 25.024179) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 81.39684 26.48458) (end 79.936439 25.024179) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 52.504241 25.024179) (end 52.18684 25.34158) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 67.363439 25.024179) (end 52.504241 25.024179) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 68.82384 26.48458) (end 67.363439 25.024179) (width 0.8128) (layer F.Cu) (net 1))
- (segment (start 97.90684 26.48458) (end 97.90684 29.02458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 29.02458) (end 97.90684 31.56458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 31.56458) (end 97.90684 34.10458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 34.10458) (end 97.90684 36.64458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 36.64458) (end 97.90684 39.18458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 39.18458) (end 97.90684 41.72458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 41.72458) (end 97.90684 44.26458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 97.90684 44.26458) (end 97.90684 46.80458) (width 0.8128) (layer B.Cu) (net 1))
- (segment (start 89.39784 51.50358) (end 88.50884 52.39258) (width 0.8128) (layer B.Cu) (net 1))
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+ (segment (start 112.003741 58.488481) (end 108.32084 54.80558) (width 0.1778) (layer F.Cu) (net 48) (status 20))
+ (segment (start 112.003741 62.974173) (end 112.003741 58.488481) (width 0.1778) (layer F.Cu) (net 48))
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+ (segment (start 111.62284 72.96658) (end 111.62284 68.26758) (width 0.1778) (layer F.Cu) (net 49) (status 10))
+ (via (at 111.62284 68.26758) (size 0.762) (drill 0.50038) (layers F.Cu B.Cu) (net 49))
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+ (segment (start 114.16284 72.96658) (end 114.16284 68.01358) (width 0.1778) (layer B.Cu) (net 50) (status 10))
+ (via (at 114.16284 68.01358) (size 0.762) (drill 0.50038) (layers F.Cu B.Cu) (net 50))
+ (segment (start 114.16284 68.01358) (end 114.16284 72.96658) (width 0.1778) (layer F.Cu) (net 50) (status 20))
+ (segment (start 112.515524 47.05858) (end 116.95684 47.05858) (width 0.1778) (layer F.Cu) (net 51) (status 20))
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+ (segment (start 90.794741 50.48758) (end 94.477939 50.48758) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 84.118459 48.201679) (end 88.50884 48.201679) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 88.50884 48.201679) (end 90.794741 50.48758) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 68.82384 49.34458) (end 69.966741 48.201679) (width 0.1778) (layer F.Cu) (net 51) (status 10))
+ (segment (start 107.994459 45.915679) (end 111.372623 45.915679) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 74.919741 49.387661) (end 75.574016 50.041936) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 80.515478 50.041936) (end 80.897622 50.42408) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 105.708459 48.201679) (end 107.994459 45.915679) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 94.477939 50.48758) (end 96.76384 48.201679) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 81.896058 50.42408) (end 84.118459 48.201679) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 74.3077 48.201679) (end 74.919741 48.81372) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 75.574016 50.041936) (end 80.515478 50.041936) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 74.919741 48.81372) (end 74.919741 49.387661) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 80.897622 50.42408) (end 81.896058 50.42408) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 69.966741 48.201679) (end 74.3077 48.201679) (width 0.1778) (layer F.Cu) (net 51))
+ (segment (start 100.70084 62.42558) (end 103.24084 62.42558) (width 0.1778) (layer F.Cu) (net 52) (status 30))
+ (segment (start 103.24084 62.42558) (end 105.78084 62.42558) (width 0.1778) (layer F.Cu) (net 52) (status 30))
+ (via (at 115.2779 54.21122) (size 0.762) (drill 0.50038) (layers F.Cu B.Cu) (net 53))
+ (segment (start 115.646741 43.711389) (end 115.3795 43.444148) (width 0.1778) (layer B.Cu) (net 53))
+ (segment (start 115.646741 50.655173) (end 115.646741 43.711389) (width 0.1778) (layer B.Cu) (net 53))
+ (segment (start 115.2779 51.024014) (end 115.646741 50.655173) (width 0.1778) (layer B.Cu) (net 53))
+ (segment (start 115.2779 54.21122) (end 115.2779 51.024014) (width 0.1778) (layer B.Cu) (net 53))
+ (segment (start 115.3795 35.93592) (end 116.95684 34.35858) (width 0.1778) (layer B.Cu) (net 53) (status 20))
+ (segment (start 115.3795 43.444148) (end 115.3795 35.93592) (width 0.1778) (layer B.Cu) (net 53))
+ (segment (start 104.307541 53.738879) (end 112.928499 53.738879) (width 0.1778) (layer F.Cu) (net 53))
+ (segment (start 112.928499 53.738879) (end 113.40084 54.21122) (width 0.1778) (layer F.Cu) (net 53))
+ (segment (start 103.24084 54.80558) (end 104.307541 53.738879) (width 0.1778) (layer F.Cu) (net 53) (status 10))
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+ (segment (start 116.95684 36.89858) (end 115.890139 37.965281) (width 0.1778) (layer B.Cu) (net 54) (status 10))
+ (segment (start 116.95684 44.51858) (end 109.33684 44.51858) (width 0.1778) (layer F.Cu) (net 54) (status 30))
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+ (segment (start 51.046479 46.443801) (end 52.108066 45.382214) (width 0.1778) (layer B.Cu) (net 55) (status 20))
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+ (segment (start 53.924209 43.566071) (end 52.11318 45.3771) (width 0.1778) (layer B.Cu) (net 55) (status 20))
+ (segment (start 53.924209 42.33418) (end 53.924209 43.566071) (width 0.1778) (layer B.Cu) (net 55))
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)
diff --git a/Hardware/ProDOS ROM-Drive 2.2.net b/Hardware/ProDOS ROM-Drive 3.0.net
old mode 100755
new mode 100644
similarity index 80%
rename from Hardware/ProDOS ROM-Drive 2.2.net
rename to Hardware/ProDOS ROM-Drive 3.0.net
index 35a30e9..0c7b532
--- a/Hardware/ProDOS ROM-Drive 2.2.net
+++ b/Hardware/ProDOS ROM-Drive 3.0.net
@@ -1,15 +1,15 @@
(export (version D)
(design
- (source "/Volumes/data1/Apple2/ProDOS ROM-Drive 2/ProDOS ROM-Drive 2.2.sch")
- (date "Tuesday, April 02, 2019 at 10:07:18 pm")
- (tool "Eeschema (5.0.1-3-g963ef8bb5)")
+ (source "/Users/terence/source/ProDOS-ROM-Drive/Hardware/ProDOS ROM-Drive 3.0.sch")
+ (date "Wednesday, December 08, 2021 at 10:18:30 pm")
+ (tool "Eeschema (5.1.10-1-10_14)")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title "ProDOS ROM-Drive")
(company)
- (rev 2.2)
- (date)
- (source "ProDOS ROM-Drive 2.2.sch")
+ (rev 3.0)
+ (date 2021-12-07)
+ (source "ProDOS ROM-Drive 3.0.sch")
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
@@ -219,10 +219,17 @@
(pin (num 13) (name ~) (type input))
(pin (num 14) (name VCC) (type power_in))))
(libpart (lib 74xx) (part 74LS374)
+ (aliases
+ (alias 74HC374)
+ (alias 74HCT374)
+ (alias 74AHC374)
+ (alias 74AHCT374))
(description "8-bit Register, 3-state outputs")
(docs http://www.ti.com/lit/gpn/sn74LS374)
(footprints
- (fp DIP?20*))
+ (fp DIP?20*)
+ (fp SOIC?20*)
+ (fp SO?20*))
(fields
(field (name Reference) U)
(field (name Value) 74LS374))
@@ -370,14 +377,11 @@
(uri "/Library/Application Support/kicad/library/Memory_EPROM.lib")))
(nets
(net (code 1) (name "Net-(J1-Pad10)")
- (node (ref J1) (pin 10))
- (node (ref LowAddrBuffer1) (pin 6)))
+ (node (ref J1) (pin 10)))
(net (code 2) (name "Net-(J1-Pad11)")
- (node (ref LowAddrBuffer1) (pin 7))
(node (ref J1) (pin 11)))
(net (code 3) (name "Net-(J1-Pad12)")
- (node (ref J1) (pin 12))
- (node (ref LowAddrBuffer1) (pin 8)))
+ (node (ref J1) (pin 12)))
(net (code 4) (name "Net-(J1-Pad13)")
(node (ref J1) (pin 13)))
(net (code 5) (name "Net-(J1-Pad14)")
@@ -389,8 +393,8 @@
(net (code 8) (name "Net-(J1-Pad17)")
(node (ref J1) (pin 17)))
(net (code 9) (name "Net-(J1-Pad18)")
- (node (ref U1) (pin 9))
(node (ref U1) (pin 10))
+ (node (ref U1) (pin 9))
(node (ref U2) (pin 4))
(node (ref J1) (pin 18)))
(net (code 10) (name "Net-(J1-Pad19)")
@@ -402,16 +406,16 @@
(net (code 13) (name "Net-(J1-Pad22)")
(node (ref J1) (pin 22)))
(net (code 14) (name "Net-(J1-Pad24)")
- (node (ref J1) (pin 24))
- (node (ref J1) (pin 27)))
+ (node (ref J1) (pin 27))
+ (node (ref J1) (pin 24)))
(net (code 15) (name "Net-(J1-Pad23)")
- (node (ref J1) (pin 23))
- (node (ref J1) (pin 28)))
+ (node (ref J1) (pin 28))
+ (node (ref J1) (pin 23)))
(net (code 16) (name "Net-(J1-Pad29)")
(node (ref J1) (pin 29)))
(net (code 17) (name "Net-(EPROM1-Pad11)")
- (node (ref EPROM1) (pin 11))
- (node (ref J1) (pin 3)))
+ (node (ref J1) (pin 3))
+ (node (ref EPROM1) (pin 11)))
(net (code 18) (name "Net-(J1-Pad30)")
(node (ref J1) (pin 30)))
(net (code 19) (name "Net-(J1-Pad31)")
@@ -433,13 +437,13 @@
(net (code 27) (name "Net-(J1-Pad39)")
(node (ref J1) (pin 39)))
(net (code 28) (name "Net-(EPROM1-Pad10)")
- (node (ref EPROM1) (pin 10))
- (node (ref J1) (pin 4)))
+ (node (ref J1) (pin 4))
+ (node (ref EPROM1) (pin 10)))
(net (code 29) (name "Net-(J1-Pad40)")
(node (ref J1) (pin 40)))
(net (code 30) (name "Net-(EPROM1-Pad9)")
- (node (ref EPROM1) (pin 9))
- (node (ref J1) (pin 5)))
+ (node (ref J1) (pin 5))
+ (node (ref EPROM1) (pin 9)))
(net (code 31) (name "Net-(J1-Pad50)")
(node (ref J1) (pin 50)))
(net (code 32) (name "Net-(J1-Pad6)")
@@ -451,227 +455,230 @@
(net (code 34) (name "Net-(J1-Pad9)")
(node (ref LowAddrBuffer1) (pin 5))
(node (ref J1) (pin 9)))
- (net (code 35) (name "Net-(HiAddrBuffer1-Pad19)")
- (node (ref LowAddrBuffer1) (pin 19))
- (node (ref J1) (pin 1))
- (node (ref U1) (pin 1))
- (node (ref HiAddrBuffer1) (pin 19)))
- (net (code 36) (name "Net-(U1-Pad3)")
+ (net (code 35) (name "Net-(U1-Pad3)")
(node (ref U1) (pin 5))
(node (ref U1) (pin 4))
(node (ref U1) (pin 3)))
- (net (code 37) (name "Net-(DataBuffer1-Pad19)")
+ (net (code 36) (name "Net-(DataBuffer1-Pad19)")
(node (ref DataBuffer1) (pin 19))
(node (ref U1) (pin 6))
(node (ref U2) (pin 1)))
- (net (code 38) (name "Net-(DataBuffer1-Pad1)")
+ (net (code 37) (name "Net-(DataBuffer1-Pad1)")
(node (ref U2) (pin 2))
- (node (ref DataBuffer1) (pin 1))
- (node (ref U1) (pin 8)))
- (net (code 39) (name "Net-(U1-Pad11)")
- (node (ref U2) (pin 13))
- (node (ref U1) (pin 11)))
- (net (code 40) (name "Net-(U2-Pad12)")
+ (node (ref U1) (pin 8))
+ (node (ref DataBuffer1) (pin 1)))
+ (net (code 38) (name "Net-(U1-Pad11)")
+ (node (ref U1) (pin 11))
+ (node (ref U2) (pin 13)))
+ (net (code 39) (name "Net-(U2-Pad12)")
+ (node (ref U2) (pin 6))
(node (ref U2) (pin 9))
- (node (ref U2) (pin 12))
- (node (ref U2) (pin 6)))
- (net (code 41) (name "Net-(EPROM1-Pad12)")
+ (node (ref U2) (pin 12)))
+ (net (code 40) (name "Net-(EPROM1-Pad12)")
(node (ref EPROM1) (pin 12))
- (node (ref U1) (pin 13))
(node (ref J1) (pin 2))
- (node (ref U2) (pin 10))
- (node (ref U1) (pin 12)))
- (net (code 42) (name "Net-(HiAddrLatch1-Pad11)")
- (node (ref U2) (pin 11))
- (node (ref HiAddrLatch1) (pin 11)))
- (net (code 43) (name "Net-(DataBuffer1-Pad11)")
+ (node (ref U1) (pin 12))
+ (node (ref U1) (pin 13))
+ (node (ref U2) (pin 10)))
+ (net (code 41) (name "Net-(HiAddrLatch1-Pad11)")
+ (node (ref HiAddrLatch1) (pin 11))
+ (node (ref U2) (pin 11)))
+ (net (code 42) (name "Net-(DataBuffer1-Pad11)")
(node (ref DataBuffer1) (pin 11))
(node (ref EPROM1) (pin 21)))
- (net (code 44) (name "Net-(DataBuffer1-Pad13)")
- (node (ref DataBuffer1) (pin 13))
- (node (ref EPROM1) (pin 19)))
- (net (code 45) (name "Net-(DataBuffer1-Pad15)")
+ (net (code 43) (name "Net-(DataBuffer1-Pad13)")
+ (node (ref EPROM1) (pin 19))
+ (node (ref DataBuffer1) (pin 13)))
+ (net (code 44) (name "Net-(DataBuffer1-Pad15)")
(node (ref EPROM1) (pin 17))
(node (ref DataBuffer1) (pin 15)))
- (net (code 46) (name "Net-(EPROM1-Pad25)")
- (node (ref EPROM1) (pin 25))
+ (net (code 45) (name "Net-(EPROM1-Pad25)")
(node (ref LowAddrLatch1) (pin 19))
+ (node (ref EPROM1) (pin 25))
(node (ref LowAddrBuffer1) (pin 11)))
- (net (code 47) (name "Net-(EPROM1-Pad23)")
- (node (ref LowAddrBuffer1) (pin 12))
+ (net (code 46) (name "Net-(EPROM1-Pad23)")
+ (node (ref LowAddrLatch1) (pin 16))
(node (ref EPROM1) (pin 23))
- (node (ref LowAddrLatch1) (pin 16)))
- (net (code 48) (name "Net-(EPROM1-Pad26)")
- (node (ref EPROM1) (pin 26))
+ (node (ref LowAddrBuffer1) (pin 12)))
+ (net (code 47) (name "Net-(EPROM1-Pad26)")
(node (ref LowAddrBuffer1) (pin 13))
- (node (ref LowAddrLatch1) (pin 15)))
- (net (code 49) (name "Net-(EPROM1-Pad27)")
+ (node (ref LowAddrLatch1) (pin 15))
+ (node (ref EPROM1) (pin 26)))
+ (net (code 48) (name "Net-(EPROM1-Pad27)")
(node (ref LowAddrBuffer1) (pin 14))
- (node (ref LowAddrLatch1) (pin 12))
- (node (ref EPROM1) (pin 27)))
- (net (code 50) (name "Net-(EPROM1-Pad5)")
+ (node (ref EPROM1) (pin 27))
+ (node (ref LowAddrLatch1) (pin 12)))
+ (net (code 49) (name "Net-(EPROM1-Pad5)")
(node (ref EPROM1) (pin 5))
(node (ref LowAddrLatch1) (pin 9))
(node (ref LowAddrBuffer1) (pin 15)))
- (net (code 51) (name "Net-(EPROM1-Pad6)")
- (node (ref LowAddrBuffer1) (pin 16))
+ (net (code 50) (name "Net-(EPROM1-Pad6)")
+ (node (ref EPROM1) (pin 6))
(node (ref LowAddrLatch1) (pin 6))
- (node (ref EPROM1) (pin 6)))
- (net (code 52) (name "Net-(EPROM1-Pad7)")
- (node (ref LowAddrBuffer1) (pin 17))
+ (node (ref LowAddrBuffer1) (pin 16)))
+ (net (code 51) (name "Net-(EPROM1-Pad7)")
+ (node (ref EPROM1) (pin 7))
(node (ref LowAddrLatch1) (pin 5))
- (node (ref EPROM1) (pin 7)))
- (net (code 53) (name "Net-(EPROM1-Pad8)")
+ (node (ref LowAddrBuffer1) (pin 17)))
+ (net (code 52) (name "Net-(EPROM1-Pad8)")
+ (node (ref EPROM1) (pin 8))
(node (ref LowAddrBuffer1) (pin 18))
- (node (ref LowAddrLatch1) (pin 2))
- (node (ref EPROM1) (pin 8)))
- (net (code 54) (name "Net-(EPROM1-Pad1)")
- (node (ref HiAddrBuffer1) (pin 11))
- (node (ref EPROM1) (pin 1))
- (node (ref HiAddrLatch1) (pin 19)))
- (net (code 55) (name "Net-(EPROM1-Pad31)")
- (node (ref EPROM1) (pin 31))
- (node (ref HiAddrLatch1) (pin 16))
- (node (ref HiAddrBuffer1) (pin 12)))
- (net (code 56) (name "Net-(EPROM1-Pad30)")
- (node (ref HiAddrBuffer1) (pin 13))
- (node (ref EPROM1) (pin 30))
- (node (ref HiAddrLatch1) (pin 15)))
- (net (code 57) (name "Net-(EPROM1-Pad2)")
- (node (ref HiAddrLatch1) (pin 12))
- (node (ref HiAddrBuffer1) (pin 14))
- (node (ref EPROM1) (pin 2)))
- (net (code 58) (name "Net-(EPROM1-Pad3)")
- (node (ref HiAddrLatch1) (pin 9))
- (node (ref EPROM1) (pin 3))
- (node (ref HiAddrBuffer1) (pin 15)))
- (net (code 59) (name "Net-(EPROM1-Pad29)")
- (node (ref HiAddrLatch1) (pin 6))
- (node (ref HiAddrBuffer1) (pin 16))
- (node (ref EPROM1) (pin 29)))
- (net (code 60) (name "Net-(EPROM1-Pad28)")
- (node (ref HiAddrBuffer1) (pin 17))
- (node (ref HiAddrLatch1) (pin 5))
- (node (ref EPROM1) (pin 28)))
- (net (code 61) (name "Net-(EPROM1-Pad4)")
- (node (ref EPROM1) (pin 4))
- (node (ref HiAddrLatch1) (pin 2))
- (node (ref HiAddrBuffer1) (pin 18)))
- (net (code 62) (name "Net-(LowAddrLatch1-Pad11)")
- (node (ref U2) (pin 8))
- (node (ref LowAddrLatch1) (pin 11)))
- (net (code 63) (name "Net-(DataBuffer1-Pad6)")
- (node (ref LowAddrLatch1) (pin 13))
- (node (ref HiAddrLatch1) (pin 13))
- (node (ref J1) (pin 45))
- (node (ref DataBuffer1) (pin 6)))
- (net (code 64) (name "Net-(DataBuffer1-Pad7)")
- (node (ref DataBuffer1) (pin 7))
- (node (ref HiAddrLatch1) (pin 14))
- (node (ref J1) (pin 44))
- (node (ref LowAddrLatch1) (pin 14)))
- (net (code 65) (name "Net-(DataBuffer1-Pad8)")
- (node (ref DataBuffer1) (pin 8))
- (node (ref HiAddrLatch1) (pin 17))
- (node (ref LowAddrLatch1) (pin 17))
- (node (ref J1) (pin 43)))
- (net (code 66) (name "Net-(DataBuffer1-Pad2)")
- (node (ref DataBuffer1) (pin 2))
- (node (ref HiAddrLatch1) (pin 3))
- (node (ref LowAddrLatch1) (pin 3))
- (node (ref J1) (pin 49)))
- (net (code 67) (name "Net-(DataBuffer1-Pad3)")
- (node (ref DataBuffer1) (pin 3))
- (node (ref J1) (pin 48))
- (node (ref LowAddrLatch1) (pin 4))
- (node (ref HiAddrLatch1) (pin 4)))
- (net (code 68) (name "Net-(DataBuffer1-Pad4)")
- (node (ref LowAddrLatch1) (pin 7))
- (node (ref DataBuffer1) (pin 4))
- (node (ref J1) (pin 47))
- (node (ref HiAddrLatch1) (pin 7)))
- (net (code 69) (name "Net-(DataBuffer1-Pad5)")
- (node (ref HiAddrLatch1) (pin 8))
- (node (ref J1) (pin 46))
- (node (ref DataBuffer1) (pin 5))
- (node (ref LowAddrLatch1) (pin 8)))
- (net (code 70) (name "Net-(DataBuffer1-Pad12)")
- (node (ref EPROM1) (pin 20))
- (node (ref DataBuffer1) (pin 12)))
- (net (code 71) (name "Net-(EPROM1-Pad22)")
- (node (ref EPROM1) (pin 24))
- (node (ref EPROM1) (pin 22))
- (node (ref U2) (pin 3)))
- (net (code 72) (name "Net-(DataBuffer1-Pad18)")
- (node (ref EPROM1) (pin 13))
- (node (ref DataBuffer1) (pin 18)))
- (net (code 73) (name "Net-(DataBuffer1-Pad17)")
- (node (ref EPROM1) (pin 14))
- (node (ref DataBuffer1) (pin 17)))
- (net (code 74) (name "Net-(DataBuffer1-Pad16)")
- (node (ref DataBuffer1) (pin 16))
- (node (ref EPROM1) (pin 15)))
- (net (code 75) (name "Net-(DataBuffer1-Pad14)")
- (node (ref EPROM1) (pin 18))
- (node (ref DataBuffer1) (pin 14)))
- (net (code 76) (name "Net-(J1-Pad7)")
- (node (ref J1) (pin 7))
- (node (ref LowAddrBuffer1) (pin 3)))
- (net (code 77) (name "Net-(HiAddrLatch1-Pad1)")
- (node (ref U2) (pin 5))
- (node (ref U1) (pin 2))
- (node (ref J1) (pin 41))
- (node (ref LowAddrLatch1) (pin 1))
- (node (ref HiAddrLatch1) (pin 1)))
- (net (code 78) (name "Net-(DataBuffer1-Pad9)")
- (node (ref HiAddrLatch1) (pin 18))
- (node (ref J1) (pin 42))
- (node (ref DataBuffer1) (pin 9))
- (node (ref LowAddrLatch1) (pin 18)))
- (net (code 79) (name GND)
+ (node (ref LowAddrLatch1) (pin 2)))
+ (net (code 53) (name "Net-(HiAddrBuffer1-Pad19)")
+ (node (ref J1) (pin 1))
+ (node (ref HiAddrBuffer1) (pin 19))
+ (node (ref LowAddrBuffer1) (pin 19))
+ (node (ref U1) (pin 1)))
+ (net (code 54) (name +5V)
+ (node (ref C3) (pin 1))
+ (node (ref C7) (pin 1))
+ (node (ref C6) (pin 1))
+ (node (ref C5) (pin 1))
+ (node (ref C1) (pin 1))
+ (node (ref C2) (pin 1))
+ (node (ref C8) (pin 1))
+ (node (ref U2) (pin 14))
+ (node (ref U1) (pin 14))
+ (node (ref DataBuffer1) (pin 20))
+ (node (ref LowAddrBuffer1) (pin 1))
+ (node (ref C4) (pin 1))
+ (node (ref LowAddrBuffer1) (pin 20))
+ (node (ref LowAddrBuffer1) (pin 6))
+ (node (ref LowAddrBuffer1) (pin 7))
+ (node (ref HiAddrBuffer1) (pin 1))
+ (node (ref HiAddrBuffer1) (pin 20))
+ (node (ref J1) (pin 25))
+ (node (ref EPROM1) (pin 32))
+ (node (ref LowAddrLatch1) (pin 20))
+ (node (ref HiAddrLatch1) (pin 20)))
+ (net (code 55) (name GND)
+ (node (ref HiAddrBuffer1) (pin 10))
+ (node (ref LowAddrBuffer1) (pin 9))
+ (node (ref LowAddrBuffer1) (pin 8))
+ (node (ref HiAddrBuffer1) (pin 2))
+ (node (ref HiAddrBuffer1) (pin 3))
(node (ref C4) (pin 2))
(node (ref C3) (pin 2))
(node (ref C7) (pin 2))
(node (ref C6) (pin 2))
+ (node (ref HiAddrBuffer1) (pin 4))
+ (node (ref HiAddrBuffer1) (pin 5))
(node (ref C5) (pin 2))
(node (ref C1) (pin 2))
+ (node (ref HiAddrLatch1) (pin 10))
(node (ref C2) (pin 2))
(node (ref C8) (pin 2))
- (node (ref J1) (pin 26))
- (node (ref U1) (pin 7))
- (node (ref LowAddrBuffer1) (pin 10))
(node (ref U2) (pin 7))
- (node (ref HiAddrLatch1) (pin 10))
+ (node (ref U1) (pin 7))
+ (node (ref DataBuffer1) (pin 10))
(node (ref EPROM1) (pin 16))
+ (node (ref HiAddrBuffer1) (pin 6))
+ (node (ref HiAddrBuffer1) (pin 7))
(node (ref LowAddrLatch1) (pin 10))
- (node (ref HiAddrBuffer1) (pin 10))
- (node (ref DataBuffer1) (pin 10)))
- (net (code 80) (name +5V)
- (node (ref DataBuffer1) (pin 20))
(node (ref HiAddrBuffer1) (pin 9))
(node (ref HiAddrBuffer1) (pin 8))
- (node (ref HiAddrBuffer1) (pin 7))
- (node (ref HiAddrBuffer1) (pin 6))
- (node (ref HiAddrBuffer1) (pin 5))
- (node (ref HiAddrBuffer1) (pin 4))
- (node (ref LowAddrBuffer1) (pin 1))
- (node (ref LowAddrBuffer1) (pin 20))
- (node (ref LowAddrBuffer1) (pin 9))
- (node (ref J1) (pin 25))
- (node (ref HiAddrBuffer1) (pin 3))
- (node (ref C8) (pin 1))
- (node (ref C2) (pin 1))
- (node (ref C1) (pin 1))
- (node (ref C5) (pin 1))
- (node (ref C6) (pin 1))
- (node (ref C7) (pin 1))
- (node (ref C3) (pin 1))
- (node (ref C4) (pin 1))
- (node (ref LowAddrLatch1) (pin 20))
- (node (ref U1) (pin 14))
- (node (ref U2) (pin 14))
- (node (ref HiAddrLatch1) (pin 20))
- (node (ref HiAddrBuffer1) (pin 20))
- (node (ref HiAddrBuffer1) (pin 2))
- (node (ref HiAddrBuffer1) (pin 1))
- (node (ref EPROM1) (pin 32)))))
\ No newline at end of file
+ (node (ref LowAddrBuffer1) (pin 10))
+ (node (ref J1) (pin 26)))
+ (net (code 56) (name "Net-(EPROM1-Pad1)")
+ (node (ref HiAddrLatch1) (pin 19))
+ (node (ref EPROM1) (pin 1))
+ (node (ref HiAddrBuffer1) (pin 11)))
+ (net (code 57) (name "Net-(EPROM1-Pad31)")
+ (node (ref HiAddrLatch1) (pin 16))
+ (node (ref EPROM1) (pin 31))
+ (node (ref HiAddrBuffer1) (pin 12)))
+ (net (code 58) (name "Net-(EPROM1-Pad30)")
+ (node (ref HiAddrBuffer1) (pin 13))
+ (node (ref EPROM1) (pin 30))
+ (node (ref HiAddrLatch1) (pin 15)))
+ (net (code 59) (name "Net-(EPROM1-Pad2)")
+ (node (ref EPROM1) (pin 2))
+ (node (ref HiAddrBuffer1) (pin 14))
+ (node (ref HiAddrLatch1) (pin 12)))
+ (net (code 60) (name "Net-(EPROM1-Pad3)")
+ (node (ref HiAddrLatch1) (pin 9))
+ (node (ref HiAddrBuffer1) (pin 15))
+ (node (ref EPROM1) (pin 3)))
+ (net (code 61) (name "Net-(EPROM1-Pad29)")
+ (node (ref HiAddrLatch1) (pin 6))
+ (node (ref EPROM1) (pin 29))
+ (node (ref HiAddrBuffer1) (pin 16)))
+ (net (code 62) (name "Net-(EPROM1-Pad28)")
+ (node (ref HiAddrBuffer1) (pin 17))
+ (node (ref HiAddrLatch1) (pin 5))
+ (node (ref EPROM1) (pin 28)))
+ (net (code 63) (name "Net-(EPROM1-Pad4)")
+ (node (ref HiAddrLatch1) (pin 2))
+ (node (ref EPROM1) (pin 4))
+ (node (ref HiAddrBuffer1) (pin 18)))
+ (net (code 64) (name "Net-(LowAddrLatch1-Pad11)")
+ (node (ref LowAddrLatch1) (pin 11))
+ (node (ref U2) (pin 8)))
+ (net (code 65) (name "Net-(DataBuffer1-Pad6)")
+ (node (ref HiAddrLatch1) (pin 13))
+ (node (ref DataBuffer1) (pin 6))
+ (node (ref J1) (pin 45))
+ (node (ref LowAddrLatch1) (pin 13)))
+ (net (code 66) (name "Net-(DataBuffer1-Pad7)")
+ (node (ref J1) (pin 44))
+ (node (ref HiAddrLatch1) (pin 14))
+ (node (ref DataBuffer1) (pin 7))
+ (node (ref LowAddrLatch1) (pin 14)))
+ (net (code 67) (name "Net-(DataBuffer1-Pad8)")
+ (node (ref LowAddrLatch1) (pin 17))
+ (node (ref DataBuffer1) (pin 8))
+ (node (ref HiAddrLatch1) (pin 17))
+ (node (ref J1) (pin 43)))
+ (net (code 68) (name "Net-(DataBuffer1-Pad2)")
+ (node (ref HiAddrLatch1) (pin 3))
+ (node (ref LowAddrLatch1) (pin 3))
+ (node (ref DataBuffer1) (pin 2))
+ (node (ref J1) (pin 49)))
+ (net (code 69) (name "Net-(DataBuffer1-Pad3)")
+ (node (ref J1) (pin 48))
+ (node (ref HiAddrLatch1) (pin 4))
+ (node (ref DataBuffer1) (pin 3))
+ (node (ref LowAddrLatch1) (pin 4)))
+ (net (code 70) (name "Net-(DataBuffer1-Pad4)")
+ (node (ref DataBuffer1) (pin 4))
+ (node (ref LowAddrLatch1) (pin 7))
+ (node (ref J1) (pin 47))
+ (node (ref HiAddrLatch1) (pin 7)))
+ (net (code 71) (name "Net-(DataBuffer1-Pad5)")
+ (node (ref DataBuffer1) (pin 5))
+ (node (ref LowAddrLatch1) (pin 8))
+ (node (ref J1) (pin 46))
+ (node (ref HiAddrLatch1) (pin 8)))
+ (net (code 72) (name "Net-(DataBuffer1-Pad12)")
+ (node (ref DataBuffer1) (pin 12))
+ (node (ref EPROM1) (pin 20)))
+ (net (code 73) (name "Net-(EPROM1-Pad22)")
+ (node (ref U2) (pin 3))
+ (node (ref EPROM1) (pin 22))
+ (node (ref EPROM1) (pin 24)))
+ (net (code 74) (name "Net-(DataBuffer1-Pad18)")
+ (node (ref EPROM1) (pin 13))
+ (node (ref DataBuffer1) (pin 18)))
+ (net (code 75) (name "Net-(DataBuffer1-Pad17)")
+ (node (ref DataBuffer1) (pin 17))
+ (node (ref EPROM1) (pin 14)))
+ (net (code 76) (name "Net-(DataBuffer1-Pad16)")
+ (node (ref EPROM1) (pin 15))
+ (node (ref DataBuffer1) (pin 16)))
+ (net (code 77) (name "Net-(DataBuffer1-Pad14)")
+ (node (ref DataBuffer1) (pin 14))
+ (node (ref EPROM1) (pin 18)))
+ (net (code 78) (name "Net-(J1-Pad7)")
+ (node (ref J1) (pin 7))
+ (node (ref LowAddrBuffer1) (pin 3)))
+ (net (code 79) (name "Net-(HiAddrLatch1-Pad1)")
+ (node (ref HiAddrLatch1) (pin 1))
+ (node (ref U1) (pin 2))
+ (node (ref LowAddrLatch1) (pin 1))
+ (node (ref J1) (pin 41))
+ (node (ref U2) (pin 5)))
+ (net (code 80) (name "Net-(DataBuffer1-Pad9)")
+ (node (ref DataBuffer1) (pin 9))
+ (node (ref J1) (pin 42))
+ (node (ref LowAddrLatch1) (pin 18))
+ (node (ref HiAddrLatch1) (pin 18)))))
\ No newline at end of file
diff --git a/Hardware/ProDOS ROM-Drive 3.0.pdf b/Hardware/ProDOS ROM-Drive 3.0.pdf
new file mode 100644
index 0000000..43029d9
Binary files /dev/null and b/Hardware/ProDOS ROM-Drive 3.0.pdf differ
diff --git a/Hardware/ProDOS ROM-Drive 3.0.pro b/Hardware/ProDOS ROM-Drive 3.0.pro
new file mode 100644
index 0000000..ccf66e6
--- /dev/null
+++ b/Hardware/ProDOS ROM-Drive 3.0.pro
@@ -0,0 +1,270 @@
+update=Wednesday, December 08, 2021 at 10:19:11 pm
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=Pcbnew
+SpiceAjustPassiveValues=0
+LabSize=50
+ERC_TestSimilarLabels=1
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=ProDOS ROM-Drive 3.0.net
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.1778
+MinViaDiameter=0.4
+MinViaDrill=0.3
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.1778
+ViaDiameter1=0.762
+ViaDrill1=0.50038
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.15
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.15
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0.051
+SolderMaskMinWidth=0.25
+SolderPasteClearance=0
+SolderPasteRatio=0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=2
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
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diff --git a/Hardware/ProDOS ROM-Drive 2.2.sch b/Hardware/ProDOS ROM-Drive 3.0.sch
old mode 100755
new mode 100644
similarity index 96%
rename from Hardware/ProDOS ROM-Drive 2.2.sch
rename to Hardware/ProDOS ROM-Drive 3.0.sch
index 768b696..aa92218
--- a/Hardware/ProDOS ROM-Drive 2.2.sch
+++ b/Hardware/ProDOS ROM-Drive 3.0.sch
@@ -1,13 +1,12 @@
EESchema Schematic File Version 4
-LIBS:ProDOS ROMDrive 2-cache
-EELAYER 26 0
+EELAYER 30 0
EELAYER END
$Descr USLetter 8500 11000 portrait
encoding utf-8
Sheet 1 1
Title "ProDOS ROM-Drive"
-Date ""
-Rev "2.2"
+Date "2021-12-07"
+Rev "3.0"
Comp ""
Comment1 ""
Comment2 ""
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 2900 5500
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 1650 6550
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 1650 7100
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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$EndSCHEMATC
diff --git a/Hardware/ProDOS ROM-Drive 2.2.svg b/Hardware/ProDOS ROM-Drive 3.0.svg
old mode 100755
new mode 100644
similarity index 76%
rename from Hardware/ProDOS ROM-Drive 2.2.svg
rename to Hardware/ProDOS ROM-Drive 3.0.svg
index ee46e62..0662759
--- a/Hardware/ProDOS ROM-Drive 2.2.svg
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diff --git a/Hardware/fp-info-cache b/Hardware/fp-info-cache
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/Hardware/fp-info-cache
@@ -0,0 +1 @@
+0
diff --git a/README.md b/README.md
index 88d9cae..ab52b5b 100644
--- a/README.md
+++ b/README.md
@@ -1,7 +1,12 @@
-# ProDOS ROM-Drive
-This is a peripheral card for the Apple ][ series computers that acts as a read-only solid state disk drive (SSD) all in EPROM. Although it won't run DOS, it is fully ProDOS compatible and will appear as a read-only hard drive even when booting from another drive. It holds 1022 KB of disk data and 2 KB of controlling code making a full megabyte. The drive boots ProDOS and into BASIC in under 1.5 seconds.
+# v3
+This is a new revision of the hardware, incompatible with previous firmware and drive image. If you have a v2.5 board, see the v2.5 tag [here](https://github.com/tjboldt/ProDOS-ROM-Drive/tree/v2.5)
-
+# ProDOS ROM-Drive
+This is a peripheral card for the Apple ][ series computers that acts as a read-only solid state disk drive (SSD) all in EPROM. Although it won't run DOS, it is fully ProDOS compatible and will appear as a read-only hard drive even when booting from another drive. It holds 1024 KB of disk data with the 256 byte firmware stored in block 0001 where the SOS boot loader normally resides. The drive boots ProDOS and into BASIC in under 1.5 seconds.
+
+
+
+You can order blank circuit boards from [PCBWay](https://www.pcbway.com/project/shareproject/ProDOS_ROM_Drive_v3_1903e388.html) or upload the provided gerber and drill files to any PCB manufacturer.
## History
@@ -19,11 +24,11 @@ To build actual circuit boards, I tried making some by hand with marker, etching
In 2019, I decided to revisit the original design as I was disappointed that the original didn't have a solder mask and was rather large for what it was. I got the board much smaller but in the process of translating my two decade old hand written notes, I made a mistake on one control line. To actually call this project finished, I had to make another revision. I also noticed the revised board was slightly larger than a credit card so I worked for a couple weeks to optimize the lines and squeeze the two-layer board down to 3.375" x 2.125". The board here is that final revision 2.5 (note that references to first, second and third design are all the solderless breadboard prototypes leading up to the 1.0 circuit board printed in 1999, 2.0 was never made, 2.1 is the board with the error patched with a jumper wire and 2.2 through 2.4 were never made).
+In 2021, the first and only issue was opened on the project requesting that the firmware be relocatable. I let that issue sit for a few months and then Ralle Palaveev supplied some relocatable firmware as a patch. I quickly realized that this could be placed into the second block on the drive normally reserved for SOS bootloader for the Apple ///, essentially allowing the full EPROM to be used for the drive. I disassembed Ralle's patch, merged it into the existing source code and made a few updates to save a few bytes and add clarity.
+
## Notes
-The firmware code needs to be assembled 7 times with different parameters specifying which slot to assemble for. It is probably easier to work from the EPROM image as it is already a 1 MB disk image with the firmware in the top four ProDOS blocks.
-
-I usually use Ciderpress to copy files onto the drive image and then burn the file to a 27C801 EPROM with a GQ-4x4 USB Programmer.
+I usually use Ciderpress to copy files onto the drive image and then burn the file to a 27C801 EPROM with a GQ-4x4 USB Programmer. Do NOT overwrite block 0001 as it contains the firmware for the card.
If you're planning on designing you own card, I highly recommend reading "Interfacing & Digital Experiments with your Apple" by Charles J. Engelisher and Apple's "Apple II Reference Manual" as well as "ProDOS Technical Reference Manual" if you want to build a drive. You also need an EPROM programmer, some chips and a prototyping board. My designs used simple logic gates to decode addresses but if you want to reduce chip count, you'll also need a PAL/GAL logic programmer (which some EPROM programmers can do).