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29 Commits
v2.5 ... main

Author SHA1 Message Date
Terence Boldt
35df9b0dd8 Add BOM, closes #19 2023-11-06 06:07:00 -05:00
Terence Boldt
90320b1ab5
Update README.md 2022-11-06 06:43:38 -05:00
Terence Boldt
abe8b085cf
Merge pull request #15 from tjboldt/esc-skip
Add ESC to skip boot, menu 1 - 7 to boot specific slot
2022-11-06 06:23:57 -05:00
Terence Boldt
950338d29a Add boot slot 1 - 7 in startup menu 2022-11-06 05:48:15 -05:00
Terence Boldt
d6691c6567 Add ESC to skip boot to next slot 2022-11-02 18:10:17 -04:00
Terence Boldt
784a63edbf
Merge pull request #13 from tjboldt/firmware-fix
Update driver to not need JSR $FF58 on entry
2022-07-13 00:08:26 -04:00
Terence Boldt
678e68b1c4 Update driver to not need JSR $FF58 on entry
Save and restore zero page values
2022-07-12 18:32:24 -04:00
Terence Boldt
51efc13f69
Merge pull request #11 from tjboldt/data-bus-fix
Update firmware date and version
2022-03-19 12:17:44 -04:00
Terence Boldt
678c6c13d0 Update firmware date and version 2022-03-19 12:02:30 -04:00
Terence Boldt
6f684105b5
Merge pull request #10 from tjboldt/data-bus-fix
Data bus fix
2022-03-19 10:30:26 -04:00
Terence Boldt
7a48901bf2 Updated gerber files to be compatible with PCBWay 2022-03-19 10:26:29 -04:00
Terence Boldt
d425b4cb52 Update schematic and fix data bus lines 2022-03-19 10:02:45 -04:00
Terence Boldt
1196230629 Update to KiCAD 6 2022-02-24 15:48:06 -05:00
Terence Boldt
ab03278499 Ignore KiCAD 6 backups 2022-02-24 15:45:58 -05:00
Terence Boldt
f0de374a56 Rename files without version 2022-02-24 15:44:31 -05:00
Terence Boldt
6b9257044d
Merge pull request #7 from tjboldt/text-fix
Fix text display due to change in Y offset
2021-12-24 00:08:20 -05:00
Terence Boldt
f916fce4c9 Fix text 2021-12-23 23:55:37 -05:00
Terence Boldt
f9d50f406d Fix text display due to change in Y offset 2021-12-23 08:25:28 -05:00
Terence Boldt
f24dcb21d1 Update image to 3.0 2021-12-22 20:32:14 -05:00
Terence Boldt
8f30793ace
Merge pull request #5 from tjboldt/block0001
Add v3 hardware with firmware in Block 0001
2021-12-22 09:40:09 -05:00
Terence Boldt
63f7ded969 Fixed firmware for v3 board 2021-12-22 09:37:54 -05:00
Terence Boldt
62c7343258 Update firmware listing 2021-12-12 10:42:18 -05:00
Terence Boldt
2adcf34942 Update blank drive image 2021-12-12 10:42:04 -05:00
Terence Boldt
1b04c84435 Update firmware source to be relocatable 2021-12-12 10:31:01 -05:00
Terence Boldt
008af8cb5e Update hardware to use block 0001 for firmware 2021-12-09 20:40:24 -05:00
Terence Boldt
5783f25a47 Move firmware patch to Firmware directory 2021-12-09 20:36:07 -05:00
Terence Boldt
a3360e132b
Merge pull request #2 from rallepalaveev/main
Firmware patch
2021-12-09 20:34:47 -05:00
Ralle Palaveev
1922847899
Add files via upload 2021-12-08 17:42:43 +02:00
Ralle Palaveev
093d5fba3a
Add files via upload
Firmware with relative code.
2021-12-08 17:41:50 +02:00
46 changed files with 139728 additions and 83087 deletions

1
.gitignore vendored
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@ -1,3 +1,4 @@
*-bak
*.o
*.DS_Store
*-backups

BIN
Firmware/BlankDriveWithFirmware.po Executable file → Normal file

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@ -1,196 +1,205 @@
;Please note this code is assembled seven times,
;once for each slot in the Apple II.
;This allows the card to work in any slot without
;having to write space consuming relocatable code.
;Install cc65 (on Ubuntu this is: sudo apt install cc65)
;Execute the following commands to generate the binary:
;ca65 Warning.asm -o warning.o
;ca65 Firmware.asm -D SLOT1 -o slot1.o
;ca65 Firmware.asm -D SLOT2 -o slot2.o
;ca65 Firmware.asm -D SLOT3 -o slot3.o
;ca65 Firmware.asm -D SLOT4 -o slot4.o
;ca65 Firmware.asm -D SLOT5 -o slot5.o
;ca65 Firmware.asm -D SLOT6 -o slot6.o
;ca65 Firmware.asm -D SLOT7 -o slot7.o
;ld65 -t none warning.o slot1.o slot2.o slot3.o slot4.o slot5.o slot6.o slot7.o -o Firmware.bin
;Determine which slot we want by command-line define
.ifdef SLOT1
slot = $01
.endif
.ifdef SLOT2
slot = $02
.endif
.ifdef SLOT3
slot = $03
.endif
.ifdef SLOT4
slot = $04
.endif
.ifdef SLOT5
slot = $05
.endif
.ifdef SLOT6
slot = $06
.endif
.ifdef SLOT7
slot = $07
.endif
;Calculate I/O addresses for this slot
slotwh = $C081+slot*$10
slotwl = $C080+slot*$10
slotrd = $C080+slot*$10
sdrive = slot*$10
sram0 = $478+slot
sram1 = $4F8+slot
sram2 = $578+slot
sram3 = $5F8+slot
sram4 = $678+slot
sram5 = $6F8+slot
sram6 = $778+slot
sram7 = $7F8+slot
;i/o ports to write to
writeLatchHigh = $C081
writeLatchLow = $C080
;ProDOS defines
command = $42 ;ProDOS command
unit = $43 ;7=drive 6-4=slot 3-0=not used
buflo = $44 ;low address of buffer
bufhi = $45 ;hi address of buffer
blklo = $46 ;low block
blkhi = $47 ;hi block
ioerr = $27 ;I/O error code
nodev = $28 ;no device connected
wperr = $2B ;write protect error
command = $42 ;ProDOS command
unit = $43 ;7=drive 6-4=slot 3-0=not used
buflo = $44 ;low address of buffer
bufhi = $45 ;hi address of buffer
blklo = $46 ;low block
blkhi = $47 ;hi block
ioerr = $27 ;I/O error code
nodev = $28 ;no device connected
wperr = $2B ;write protect error
;for relocatable code
ioAddressLo = $FA
ioAddressHi = $FB
tempY = $FC
blockHalfCounter = $FD
lowLatch = $FE
highLatch = $FF
knownRts = $FF58
.org $C000+slot*$100
;code is non-relocatable
; but duplicated seven times,
; once for each slot
;autostart ROM next card
sloop = $FABA
keyboard = $C000
clearKeyboard = $C010
.org $C700
;code is relocatable
; but set to $c700 for
; readability
;ID bytes for booting and drive detection
cpx #$20 ;ID bytes for ProDOS and the
cpx #$00 ; Apple Autostart ROM
cpx #$03 ;
cpx #$3C ;this one for older II's
cpx #$20 ;ID bytes for ProDOS and the
ldy #$00 ; Apple Autostart ROM
cpx #$03 ;
cpx #$3C ;this one for older II's
;check for ESC key and if so, jump to next slot in autostart
lda keyboard
cmp #$9B
bne start
jmp sloop
;zero out block numbers and buffer address
start:
sty buflo
sty blklo
sty blkhi
iny ;set command = 1 for read block
sty command
jsr knownRts ;jump to known RTS to get our address from the stack
tsx
lda $0100,x ;this for example would be $C7 in slot 7
sta bufhi ;keep the slot here
asl
asl
asl
asl
sta unit
;display copyright message
ldy #$00
drawtxt: lda text,y
beq boot ;check for NULL
ora #$80 ;make it visible to the Apple
sta $07D0,y ;put text on last line
iny
bpl drawtxt
;load first two blocks and execute to boot
boot: lda #$01 ;set read command
sta command
lda #sdrive ;set slot and unit
sta unit
lda #$00 ;block 0
sta blklo
sta blkhi
sta buflo ;buffer at $800
lda #$08
sta bufhi
jsr entry ;get the block
ldx #sdrive ;set up for slot n
jmp $801 ;execute the block
ldy #<text
drawtxt:
lda (buflo),y
beq boot
sta $07D0-<text,y ;put text on last line
iny
bne drawtxt
;load block 0000 at $0800
boot:
lda #$08 ;push $0800 onto the stack so an RTS will run at $0801
sta bufhi
pha
lda #$00
pha
;This is the ProDOS entry point for this card
entry: lda #sdrive ;unit number is $n0 - n = slot
cmp unit ;make sure same as ProDOS
beq docmd ;yep, do command
sec ;nope, set device not connected
lda #nodev
rts ;go back to ProDOS
entry:
ldx unit ;make sure it's drive 1
bpl docmd ;yep, do command
sec ;nope, set device not connected
lda #nodev
rts ;go back to ProDOS
docmd: lda command ;get ProDOS command
beq getstat ;command 0 is GetStatus
cmp #$01 ;
beq readblk ;command 1 is ReadBlock
sec ;Format/Write not permitted
lda #wperr ;write protect error
rts ;go back to ProDOS
docmd:
lda command
beq getstat ;command 0 is GetStatus
cmp #$01
beq readblk ;command 1 is ReadBlock
sec ;Format/Write not permitted
lda #wperr ;write protect error
rts ;go back to ProDOS
getstat: clc ;send back status
lda #$00 ;good status
ldx #$00 ;1024 blocks
ldy #$04 ;
rts
getstat:
clc ;send back status
lda #$00 ;good status
ldx #$00 ;1024 blocks
ldy #$04 ;
rts
readblk: lda blkhi ;get hi block
asl a ;shift up to top 3 bits
asl a ;since that's all the high
asl a ;blocks we can handle
asl a ;
asl a ;
sta sram0 ;save it in scratch ram 0
;so we can stuff it in the
;high latch later
lda blklo ;get low block
lsr a ;shift so we get the top 5
lsr a ;bits - this also goes in
lsr a ;the high latch
ora sram0 ;add it to those top 3 bits
sta sram0 ;save it back in scratch ram
lda blklo ;get low block
asl a ;shift it to top 3 bits
asl a ;
asl a ;
asl a ;
asl a ;
sta sram1 ;save it in scratch ram
jsr get256 ;get first half of block
lda sram1 ;get low latch
and #$F0 ;clear bottom 4 bits
ora #$10 ;set bit 5 for second half
;of 512 byte block
sta sram1 ;save it back in scratch
inc bufhi ;write 2nd block up 256 bytes
jsr get256 ;get second half of block
dec bufhi ;put ProDOS buffer back
clc ;clear error code for success
lda #$00
rts ;return to ProDOS
readblk:
saveVars:
ldy #ioAddressLo
varLoop:
lda $00,y
pha
iny
bne varLoop
lda blkhi ;get hi block
asl a ;shift up to top 3 bits
asl a ;since that's all the high
asl a ;blocks we can handle
asl a ;
asl a ;
sta highLatch
lda blklo ;get low block
lsr a ;shift so we get the top 5
lsr a ;bits - this also goes in
lsr a ;the high latch
ora highLatch ;add it to those top 3 bits
sta highLatch ;save it back in scratch ram
sta writeLatchHigh,x ;set high latch for card
lda blklo ;get low block
asl a ;shift it to top 3 bits
asl a ;
asl a ;
asl a ;
asl a ;
sta lowLatch
lda #$02
sta blockHalfCounter
lda #$C0
sta ioAddressHi
;This gets 256 bytes from the ROM card
;assuming high latch value is in sram0
;and low latch value is in sram1
get256: ldy #$00 ;clear buffer counter
lda sram0 ;get high latch value
sta slotwh ;set high latch for card
loop256: ldx #$00 ;clear port counter
lda sram1 ;get low latch value
sta slotwl ;set low latch
read256:
ldy #$00
loop256:
lda lowLatch
sta writeLatchLow,x
txa
ora #$80
sta ioAddressLo
loop16: lda slotrd,x ;get a byte
sta (buflo),y ;write into the buffer
iny
inx
cpx #$10
bne loop16 ;go until 16 bytes read
loop16:
sty tempY
ldy #$00
lda (ioAddressLo),y
ldy tempY
sta (buflo),y
iny
inc ioAddressLo
lda ioAddressLo
and #$0F
bne loop16
inc sram1 ;next 16 bytes
cpy #$00
bne loop256 ;go until 256 total
rts
continue256:
inc lowLatch
cpy #$00
bne loop256
dec blockHalfCounter
bne readnext256
text: .byte "ROM-Drive (c)1998-2019 Terence J. Boldt"
finish:
pla
sta highLatch
pla
sta lowLatch
pla
sta blockHalfCounter
pla
sta tempY
pla
sta ioAddressHi
pla
sta ioAddressLo
dec bufhi
clc ;clear error code for success
lda #$00
rts
readnext256:
inc bufhi ; set buffer to receive next 256 bytes
clc ; effectively a branch always
bcc read256
;macro for string with high-bit set
.macro aschi str
.repeat .strlen (str), c
.byte .strat (str, c) | $80
.endrep
.endmacro
text: aschi "ROM-Drive (c)1998-2022 Terence J. Boldt"
end:
.byte 0
.byte 0
; These bytes need to be at the top of the 256 byte firmware as ProDOS
; uses these to find the entry point and drive capabilities
@ -199,7 +208,6 @@ end:
.byte 0
.endrepeat
.byte 0,0 ;0000 blocks = check status
.byte 3 ;bit 0=read 1=status
.byte entry&$00FF ;low byte of entry
.byte 0,0 ;0000 blocks = check status
.byte 3 ;bit 0=read 1=status
.byte <entry ;low byte of entry

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Firmware/Firmware.lst Normal file
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ca65 V2.18 - N/A
Main file : Firmware.asm
Current file: Firmware.asm
000000r 1 ;i/o ports to write to
000000r 1 writeLatchHigh = $C081
000000r 1 writeLatchLow = $C080
000000r 1
000000r 1 ;ProDOS defines
000000r 1 command = $42 ;ProDOS command
000000r 1 unit = $43 ;7=drive 6-4=slot 3-0=not used
000000r 1 buflo = $44 ;low address of buffer
000000r 1 bufhi = $45 ;hi address of buffer
000000r 1 blklo = $46 ;low block
000000r 1 blkhi = $47 ;hi block
000000r 1 ioerr = $27 ;I/O error code
000000r 1 nodev = $28 ;no device connected
000000r 1 wperr = $2B ;write protect error
000000r 1
000000r 1 ;for relocatable code
000000r 1 ioAddressLo = $FA
000000r 1 ioAddressHi = $FB
000000r 1 tempY = $FC
000000r 1 blockHalfCounter = $FD
000000r 1 lowLatch = $FE
000000r 1 highLatch = $FF
000000r 1 knownRts = $FF58
000000r 1
000000r 1 ;autostart ROM next card
000000r 1 sloop = $FABA
000000r 1 keyboard = $C000
000000r 1 clearKeyboard = $C010
000000r 1
000000r 1 .org $C700
00C700 1 ;code is relocatable
00C700 1 ; but set to $c700 for
00C700 1 ; readability
00C700 1
00C700 1 ;ID bytes for booting and drive detection
00C700 1 E0 20 cpx #$20 ;ID bytes for ProDOS and the
00C702 1 A0 00 ldy #$00 ; Apple Autostart ROM
00C704 1 E0 03 cpx #$03 ;
00C706 1 E0 3C cpx #$3C ;this one for older II's
00C708 1
00C708 1 ;check for ESC key and if so, jump to next slot in autostart
00C708 1 AD 00 C0 lda keyboard
00C70B 1 C9 9B cmp #$9B
00C70D 1 D0 03 bne start
00C70F 1 4C BA FA jmp sloop
00C712 1
00C712 1 ;zero out block numbers and buffer address
00C712 1 start:
00C712 1 84 44 sty buflo
00C714 1 84 46 sty blklo
00C716 1 84 47 sty blkhi
00C718 1 C8 iny ;set command = 1 for read block
00C719 1 84 42 sty command
00C71B 1 20 58 FF jsr knownRts ;jump to known RTS to get our address from the stack
00C71E 1 BA tsx
00C71F 1 BD 00 01 lda $0100,x ;this for example would be $C7 in slot 7
00C722 1 85 45 sta bufhi ;keep the slot here
00C724 1 0A asl
00C725 1 0A asl
00C726 1 0A asl
00C727 1 0A asl
00C728 1 85 43 sta unit
00C72A 1
00C72A 1 ;display copyright message
00C72A 1 A0 CF ldy #<text
00C72C 1 drawtxt:
00C72C 1 B1 44 lda (buflo),y
00C72E 1 F0 06 beq boot
00C730 1 99 01 07 sta $07D0-<text,y ;put text on last line
00C733 1 C8 iny
00C734 1 D0 F6 bne drawtxt
00C736 1
00C736 1 ;load block 0000 at $0800
00C736 1 boot:
00C736 1 A9 08 lda #$08 ;push $0800 onto the stack so an RTS will run at $0801
00C738 1 85 45 sta bufhi
00C73A 1 48 pha
00C73B 1 A9 00 lda #$00
00C73D 1 48 pha
00C73E 1 ;This is the ProDOS entry point for this card
00C73E 1 entry:
00C73E 1 A6 43 ldx unit ;make sure it's drive 1
00C740 1 10 04 bpl docmd ;yep, do command
00C742 1 38 sec ;nope, set device not connected
00C743 1 A9 28 lda #nodev
00C745 1 60 rts ;go back to ProDOS
00C746 1
00C746 1 docmd:
00C746 1 A5 42 lda command
00C748 1 F0 08 beq getstat ;command 0 is GetStatus
00C74A 1 C9 01 cmp #$01
00C74C 1 F0 0C beq readblk ;command 1 is ReadBlock
00C74E 1 38 sec ;Format/Write not permitted
00C74F 1 A9 2B lda #wperr ;write protect error
00C751 1 60 rts ;go back to ProDOS
00C752 1
00C752 1 getstat:
00C752 1 18 clc ;send back status
00C753 1 A9 00 lda #$00 ;good status
00C755 1 A2 00 ldx #$00 ;1024 blocks
00C757 1 A0 04 ldy #$04 ;
00C759 1 60 rts
00C75A 1
00C75A 1 readblk:
00C75A 1 saveVars:
00C75A 1 A0 FA ldy #ioAddressLo
00C75C 1 varLoop:
00C75C 1 B9 00 00 lda $00,y
00C75F 1 48 pha
00C760 1 C8 iny
00C761 1 D0 F9 bne varLoop
00C763 1
00C763 1 A5 47 lda blkhi ;get hi block
00C765 1 0A asl a ;shift up to top 3 bits
00C766 1 0A asl a ;since that's all the high
00C767 1 0A asl a ;blocks we can handle
00C768 1 0A asl a ;
00C769 1 0A asl a ;
00C76A 1 85 FF sta highLatch
00C76C 1 A5 46 lda blklo ;get low block
00C76E 1 4A lsr a ;shift so we get the top 5
00C76F 1 4A lsr a ;bits - this also goes in
00C770 1 4A lsr a ;the high latch
00C771 1 05 FF ora highLatch ;add it to those top 3 bits
00C773 1 85 FF sta highLatch ;save it back in scratch ram
00C775 1 9D 81 C0 sta writeLatchHigh,x ;set high latch for card
00C778 1 A5 46 lda blklo ;get low block
00C77A 1 0A asl a ;shift it to top 3 bits
00C77B 1 0A asl a ;
00C77C 1 0A asl a ;
00C77D 1 0A asl a ;
00C77E 1 0A asl a ;
00C77F 1 85 FE sta lowLatch
00C781 1 A9 02 lda #$02
00C783 1 85 FD sta blockHalfCounter
00C785 1 A9 C0 lda #$C0
00C787 1 85 FB sta ioAddressHi
00C789 1
00C789 1 ;This gets 256 bytes from the ROM card
00C789 1
00C789 1 read256:
00C789 1 A0 00 ldy #$00
00C78B 1 loop256:
00C78B 1 A5 FE lda lowLatch
00C78D 1 9D 80 C0 sta writeLatchLow,x
00C790 1 8A txa
00C791 1 09 80 ora #$80
00C793 1 85 FA sta ioAddressLo
00C795 1
00C795 1 loop16:
00C795 1 84 FC sty tempY
00C797 1 A0 00 ldy #$00
00C799 1 B1 FA lda (ioAddressLo),y
00C79B 1 A4 FC ldy tempY
00C79D 1 91 44 sta (buflo),y
00C79F 1 C8 iny
00C7A0 1 E6 FA inc ioAddressLo
00C7A2 1 A5 FA lda ioAddressLo
00C7A4 1 29 0F and #$0F
00C7A6 1 D0 ED bne loop16
00C7A8 1
00C7A8 1 continue256:
00C7A8 1 E6 FE inc lowLatch
00C7AA 1 C0 00 cpy #$00
00C7AC 1 D0 DD bne loop256
00C7AE 1 C6 FD dec blockHalfCounter
00C7B0 1 D0 18 bne readnext256
00C7B2 1
00C7B2 1 finish:
00C7B2 1 68 pla
00C7B3 1 85 FF sta highLatch
00C7B5 1 68 pla
00C7B6 1 85 FE sta lowLatch
00C7B8 1 68 pla
00C7B9 1 85 FD sta blockHalfCounter
00C7BB 1 68 pla
00C7BC 1 85 FC sta tempY
00C7BE 1 68 pla
00C7BF 1 85 FB sta ioAddressHi
00C7C1 1 68 pla
00C7C2 1 85 FA sta ioAddressLo
00C7C4 1
00C7C4 1 C6 45 dec bufhi
00C7C6 1 18 clc ;clear error code for success
00C7C7 1 A9 00 lda #$00
00C7C9 1 60 rts
00C7CA 1
00C7CA 1 readnext256:
00C7CA 1 E6 45 inc bufhi ; set buffer to receive next 256 bytes
00C7CC 1 18 clc ; effectively a branch always
00C7CD 1 90 BA bcc read256
00C7CF 1
00C7CF 1 ;macro for string with high-bit set
00C7CF 1 .macro aschi str
00C7CF 1 .repeat .strlen (str), c
00C7CF 1 .byte .strat (str, c) | $80
00C7CF 1 .endrep
00C7CF 1 .endmacro
00C7CF 1
00C7CF 1 D2 CF CD AD text: aschi "ROM-Drive (c)1998-2022 Terence J. Boldt"
00C7D3 1 C4 F2 E9 F6
00C7D7 1 E5 A0 A8 E3
00C7DB 1 A9 B1 B9 B9
00C7DF 1 B8 AD B2 B0
00C7E3 1 B2 B2 A0 D4
00C7E7 1 E5 F2 E5 EE
00C7EB 1 E3 E5 A0 CA
00C7EF 1 AE A0 C2 EF
00C7F3 1 EC E4 F4
00C7F6 1 end:
00C7F6 1 00 .byte 0
00C7F7 1
00C7F7 1 ; These bytes need to be at the top of the 256 byte firmware as ProDOS
00C7F7 1 ; uses these to find the entry point and drive capabilities
00C7F7 1
00C7F7 1 00 00 00 00 .repeat 251-<end
00C7FB 1 00
00C7FC 1 .byte 0
00C7FC 1 .endrepeat
00C7FC 1
00C7FC 1 00 00 .byte 0,0 ;0000 blocks = check status
00C7FE 1 03 .byte 3 ;bit 0=read 1=status
00C7FF 1 3E .byte <entry ;low byte of entry
00C7FF 1

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Firmware/GamesWithFirmware.po Executable file

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.byte "Do not overwrite any of blocks after this point as it is used for the firmware. There are 7 copies of the 256 byte firmware, one for each slot due to 6502 code being non-relocatable. Have fun and feel free to improve on the hardware / sofware. --- Terence"
printChar = $FDED
home = $FC58
.org $2000
jsr home
ldy #$0
nextChar:
lda text,y
beq infiniteLoop
jsr printChar
iny
clc
bcc nextChar
infiniteLoop:
clc
bcc infiniteLoop ;hang for eternity
.macro aschi str
.repeat .strlen (str), c
.byte .strat (str, c) | $80
.endrep
.endmacro
text:
aschi "Block 0001 normally reserved for SOS"
.byte $8D
aschi "boot contains the firmware for the"
.byte $8D
aschi "ProDOS ROM-Drive."
.byte $8D
.byte $8D
aschi "(c)1998 - 2022 Terence J. Boldt"
.byte $8D
.byte $8D
aschi "github.com/tjboldt/ProDOS-ROMDrive"
.byte $8D
.byte $8D
aschi "Do NOT overwrite Block 0001"
end:
.byte 0
.repeat 255-<end
.byte 0
.endrepeat

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Firmware/Warning.lst Normal file
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ca65 V2.18 - N/A
Main file : Warning.asm
Current file: Warning.asm
000000r 1 printChar = $FDED
000000r 1 home = $FC58
000000r 1
000000r 1 .org $2000
002000 1
002000 1 20 58 FC jsr home
002003 1 A0 00 ldy #$0
002005 1 nextChar:
002005 1 B9 14 20 lda text,y
002008 1 F0 07 beq infiniteLoop
00200A 1 20 ED FD jsr printChar
00200D 1 C8 iny
00200E 1 18 clc
00200F 1 90 F4 bcc nextChar
002011 1 infiniteLoop:
002011 1 18 clc
002012 1 90 FD bcc infiniteLoop ;hang for eternity
002014 1
002014 1 .macro aschi str
002014 1 .repeat .strlen (str), c
002014 1 .byte .strat (str, c) | $80
002014 1 .endrep
002014 1 .endmacro
002014 1
002014 1 text:
002014 1 C2 EC EF E3 aschi "Block 0001 normally reserved for SOS"
002018 1 EB A0 B0 B0
00201C 1 B0 B1 A0 EE
002020 1 EF F2 ED E1
002024 1 EC EC F9 A0
002028 1 F2 E5 F3 E5
00202C 1 F2 F6 E5 E4
002030 1 A0 E6 EF F2
002034 1 A0 D3 CF D3
002038 1 8D .byte $8D
002039 1 E2 EF EF F4 aschi "boot contains the firmware for the"
00203D 1 A0 E3 EF EE
002041 1 F4 E1 E9 EE
002045 1 F3 A0 F4 E8
002049 1 E5 A0 E6 E9
00204D 1 F2 ED F7 E1
002051 1 F2 E5 A0 E6
002055 1 EF F2 A0 F4
002059 1 E8 E5
00205B 1 8D .byte $8D
00205C 1 D0 F2 EF C4 aschi "ProDOS ROM-Drive."
002060 1 CF D3 A0 D2
002064 1 CF CD AD C4
002068 1 F2 E9 F6 E5
00206C 1 AE
00206D 1 8D .byte $8D
00206E 1 8D .byte $8D
00206F 1 A8 E3 A9 B1 aschi "(c)1998 - 2022 Terence J. Boldt"
002073 1 B9 B9 B8 A0
002077 1 AD A0 B2 B0
00207B 1 B2 B2 A0 D4
00207F 1 E5 F2 E5 EE
002083 1 E3 E5 A0 CA
002087 1 AE A0 C2 EF
00208B 1 EC E4 F4
00208E 1 8D .byte $8D
00208F 1 8D .byte $8D
002090 1 E7 E9 F4 E8 aschi "github.com/tjboldt/ProDOS-ROMDrive"
002094 1 F5 E2 AE E3
002098 1 EF ED AF F4
00209C 1 EA E2 EF EC
0020A0 1 E4 F4 AF D0
0020A4 1 F2 EF C4 CF
0020A8 1 D3 AD D2 CF
0020AC 1 CD C4 F2 E9
0020B0 1 F6 E5
0020B2 1 8D .byte $8D
0020B3 1 8D .byte $8D
0020B4 1 C4 EF A0 CE aschi "Do NOT overwrite Block 0001"
0020B8 1 CF D4 A0 EF
0020BC 1 F6 E5 F2 F7
0020C0 1 F2 E9 F4 E5
0020C4 1 A0 C2 EC EF
0020C8 1 E3 EB A0 B0
0020CC 1 B0 B0 B1
0020CF 1
0020CF 1 end:
0020CF 1 00 .byte 0
0020D0 1
0020D0 1 00 00 00 00 .repeat 255-<end
0020D4 1 00 00 00 00
0020D8 1 00 00 00 00
0020DC 1 00 00 00 00
0020E0 1 00 00 00 00
0020E4 1 00 00 00 00
0020E8 1 00 00 00 00
0020EC 1 00 00 00 00
0020F0 1 00 00 00 00
0020F4 1 00 00 00 00
0020F8 1 00 00 00 00
0020FC 1 00 00 00 00
0020D0 1 .byte 0
0020D0 1 .endrepeat
0020D0 1

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@ -1,12 +1,13 @@
#!/bin/sh
ca65 Warning.asm -o warning.o
ca65 Firmware.asm -D SLOT1 -o slot1.o
ca65 Firmware.asm -D SLOT2 -o slot2.o
ca65 Firmware.asm -D SLOT3 -o slot3.o
ca65 Firmware.asm -D SLOT4 -o slot4.o
ca65 Firmware.asm -D SLOT5 -o slot5.o
ca65 Firmware.asm -D SLOT6 -o slot6.o
ca65 Firmware.asm -D SLOT7 -o slot7.o
ld65 -t none warning.o slot1.o slot2.o slot3.o slot4.o slot5.o slot6.o slot7.o -o Firmware.bin
ca65 Warning.asm -o warning.o --listing Warning.lst --list-bytes 255 || exit 1
ca65 Firmware.asm -o firmware.o --listing Firmware.lst --list-bytes 255 || exit 1
ld65 -t none warning.o firmware.o -o Firmware.bin || exit 1
# assumes ProDOS-Utilities is in your path: https://github.com/tjboldt/ProDOS-Utilities
rm BlankDriveWithFirmware.po || exit 1
ProDOS-Utilities -c create -d BlankDriveWithFirmware.po -v ROM -s 2048 || exit 1
ProDOS-Utilities -b 0x0001 -c writeblock -d GamesWithFirmware.po -i Firmware.bin || exit 1
ProDOS-Utilities -b 0x0001 -c writeblock -d BlankDriveWithFirmware.po -i Firmware.bin || exit 1
ProDOS-Utilities -b 0x0001 -c readblock -d BlankDriveWithFirmware.po || exit 1
ProDOS-Utilities -c ls -d BlankDriveWithFirmware.po || exit 1
cat Firmware.bin | dd of=BlankDriveWithFirmware.po bs=1 seek=1046528 count=2048 conv=notrunc

10
Hardware/BOM.csv Normal file
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@ -0,0 +1,10 @@
Part,Quantity,Supplier Part #,Supplier
74LS32,1,595-SN74LS32N,Mouser
74LS00,1,595-SN74LS00N,Mouser
74LS245,3,595-SN74LS245N,Mouser
74LS374,2,595-SN74LS374N,Mouser
0.1µF Capacitor,8,594-K104K15X7RF5TH5,Mouser
14 Pin DIP Socket,2,571-1-2199298-3,Mouser
20 Pin DIP Socket,5,571-1-2199298-6,Mouser
32 Pin DIP Socket,1,571-1-2199300-2,Mouser
27C080 or 27C801,1,Obsolete,eBay
1 Part Quantity Supplier Part # Supplier
2 74LS32 1 595-SN74LS32N Mouser
3 74LS00 1 595-SN74LS00N Mouser
4 74LS245 3 595-SN74LS245N Mouser
5 74LS374 2 595-SN74LS374N Mouser
6 0.1µF Capacitor 8 594-K104K15X7RF5TH5 Mouser
7 14 Pin DIP Socket 2 571-1-2199298-3 Mouser
8 20 Pin DIP Socket 5 571-1-2199298-6 Mouser
9 32 Pin DIP Socket 1 571-1-2199300-2 Mouser
10 27C080 or 27C801 1 Obsolete eBay

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@ -1,677 +0,0 @@
(export (version D)
(design
(source "/Volumes/data1/Apple2/ProDOS ROM-Drive 2/ProDOS ROM-Drive 2.2.sch")
(date "Tuesday, April 02, 2019 at 10:07:18 pm")
(tool "Eeschema (5.0.1-3-g963ef8bb5)")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title "ProDOS ROM-Drive")
(company)
(rev 2.2)
(date)
(source "ProDOS ROM-Drive 2.2.sch")
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref J1)
(value "Apple II Expansion Slot")
(footprint "Connector:Apple II Expansion Edge Connector")
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise) (description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72A915))
(comp (ref U1)
(value 74LS00)
(footprint Package_DIP:DIP-14_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74ls00)
(libsource (lib 74xx) (part 74LS00) (description "quad 2-input NAND gate"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72AA8F))
(comp (ref U2)
(value 74LS32)
(footprint Package_DIP:DIP-14_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74LS32)
(libsource (lib 74xx) (part 74LS32) (description "Quad 2-input OR"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72AF3F))
(comp (ref DataBuffer1)
(value 74LS245)
(footprint Package_DIP:DIP-20_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74LS245)
(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72BA8A))
(comp (ref LowAddrBuffer1)
(value 74LS245)
(footprint Package_DIP:DIP-20_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74LS245)
(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72BDB8))
(comp (ref HiAddrBuffer1)
(value 74LS245)
(footprint Package_DIP:DIP-20_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74LS245)
(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72BFE6))
(comp (ref LowAddrLatch1)
(value 74LS374)
(footprint Package_DIP:DIP-20_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74LS374)
(libsource (lib 74xx) (part 74LS374) (description "8-bit Register, 3-state outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72C29D))
(comp (ref HiAddrLatch1)
(value 74LS374)
(footprint Package_DIP:DIP-20_W7.62mm)
(datasheet http://www.ti.com/lit/gpn/sn74LS374)
(libsource (lib 74xx) (part 74LS374) (description "8-bit Register, 3-state outputs"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72C547))
(comp (ref EPROM1)
(value 27C080)
(footprint Package_DIP:DIP-32_W15.24mm)
(datasheet http://ww1.microchip.com/downloads/en/devicedoc/doc0360.pdf)
(libsource (lib Memory_EPROM) (part 27C080) (description "OTP EPROM 8 MiBit (1 Mi x 8)"))
(sheetpath (names /) (tstamps /))
(tstamp 5C72C7EC))
(comp (ref C8)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C818D34))
(comp (ref C2)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C8192D3))
(comp (ref C1)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C81986C))
(comp (ref C5)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C81A0E4))
(comp (ref C6)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C81A5A9))
(comp (ref C7)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C81B5FF))
(comp (ref C3)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C81BEDE))
(comp (ref C4)
(value 0.1µF)
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
(datasheet ~)
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
(sheetpath (names /) (tstamps /))
(tstamp 5C81C3BC)))
(libparts
(libpart (lib 74xx) (part 74LS00)
(aliases
(alias 74LS37)
(alias 7400)
(alias 74HCT00)
(alias 74HC00))
(description "quad 2-input NAND gate")
(docs http://www.ti.com/lit/gpn/sn74ls00)
(footprints
(fp DIP*W7.62mm*)
(fp SO14*))
(fields
(field (name Reference) U)
(field (name Value) 74LS00))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type input))
(pin (num 3) (name ~) (type output))
(pin (num 4) (name ~) (type input))
(pin (num 5) (name ~) (type input))
(pin (num 6) (name ~) (type output))
(pin (num 7) (name GND) (type power_in))
(pin (num 8) (name ~) (type output))
(pin (num 9) (name ~) (type input))
(pin (num 10) (name ~) (type input))
(pin (num 11) (name ~) (type output))
(pin (num 12) (name ~) (type input))
(pin (num 13) (name ~) (type input))
(pin (num 14) (name VCC) (type power_in))))
(libpart (lib 74xx) (part 74LS245)
(aliases
(alias 74HC245))
(description "Octal BUS Transceivers, 3-State outputs")
(docs http://www.ti.com/lit/gpn/sn74LS245)
(footprints
(fp DIP?20*))
(fields
(field (name Reference) U)
(field (name Value) 74LS245))
(pins
(pin (num 1) (name A->B) (type input))
(pin (num 2) (name A0) (type 3state))
(pin (num 3) (name A1) (type 3state))
(pin (num 4) (name A2) (type 3state))
(pin (num 5) (name A3) (type 3state))
(pin (num 6) (name A4) (type 3state))
(pin (num 7) (name A5) (type 3state))
(pin (num 8) (name A6) (type 3state))
(pin (num 9) (name A7) (type 3state))
(pin (num 10) (name GND) (type power_in))
(pin (num 11) (name B7) (type 3state))
(pin (num 12) (name B6) (type 3state))
(pin (num 13) (name B5) (type 3state))
(pin (num 14) (name B4) (type 3state))
(pin (num 15) (name B3) (type 3state))
(pin (num 16) (name B2) (type 3state))
(pin (num 17) (name B1) (type 3state))
(pin (num 18) (name B0) (type 3state))
(pin (num 19) (name CE) (type input))
(pin (num 20) (name VCC) (type power_in))))
(libpart (lib 74xx) (part 74LS32)
(description "Quad 2-input OR")
(docs http://www.ti.com/lit/gpn/sn74LS32)
(footprints
(fp DIP?14*))
(fields
(field (name Reference) U)
(field (name Value) 74LS32))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type input))
(pin (num 3) (name ~) (type output))
(pin (num 4) (name ~) (type input))
(pin (num 5) (name ~) (type input))
(pin (num 6) (name ~) (type output))
(pin (num 7) (name GND) (type power_in))
(pin (num 8) (name ~) (type output))
(pin (num 9) (name ~) (type input))
(pin (num 10) (name ~) (type input))
(pin (num 11) (name ~) (type output))
(pin (num 12) (name ~) (type input))
(pin (num 13) (name ~) (type input))
(pin (num 14) (name VCC) (type power_in))))
(libpart (lib 74xx) (part 74LS374)
(description "8-bit Register, 3-state outputs")
(docs http://www.ti.com/lit/gpn/sn74LS374)
(footprints
(fp DIP?20*))
(fields
(field (name Reference) U)
(field (name Value) 74LS374))
(pins
(pin (num 1) (name OE) (type input))
(pin (num 2) (name O0) (type 3state))
(pin (num 3) (name D0) (type input))
(pin (num 4) (name D1) (type input))
(pin (num 5) (name O1) (type 3state))
(pin (num 6) (name O2) (type 3state))
(pin (num 7) (name D2) (type input))
(pin (num 8) (name D3) (type input))
(pin (num 9) (name O3) (type 3state))
(pin (num 10) (name GND) (type power_in))
(pin (num 11) (name Cp) (type input))
(pin (num 12) (name O4) (type 3state))
(pin (num 13) (name D4) (type input))
(pin (num 14) (name D5) (type input))
(pin (num 15) (name O5) (type 3state))
(pin (num 16) (name O6) (type 3state))
(pin (num 17) (name D6) (type input))
(pin (num 18) (name D7) (type input))
(pin (num 19) (name O7) (type 3state))
(pin (num 20) (name VCC) (type power_in))))
(libpart (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise)
(description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_2x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_02x25_Counter_Clockwise))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))
(pin (num 9) (name Pin_9) (type passive))
(pin (num 10) (name Pin_10) (type passive))
(pin (num 11) (name Pin_11) (type passive))
(pin (num 12) (name Pin_12) (type passive))
(pin (num 13) (name Pin_13) (type passive))
(pin (num 14) (name Pin_14) (type passive))
(pin (num 15) (name Pin_15) (type passive))
(pin (num 16) (name Pin_16) (type passive))
(pin (num 17) (name Pin_17) (type passive))
(pin (num 18) (name Pin_18) (type passive))
(pin (num 19) (name Pin_19) (type passive))
(pin (num 20) (name Pin_20) (type passive))
(pin (num 21) (name Pin_21) (type passive))
(pin (num 22) (name Pin_22) (type passive))
(pin (num 23) (name Pin_23) (type passive))
(pin (num 24) (name Pin_24) (type passive))
(pin (num 25) (name Pin_25) (type passive))
(pin (num 26) (name Pin_26) (type passive))
(pin (num 27) (name Pin_27) (type passive))
(pin (num 28) (name Pin_28) (type passive))
(pin (num 29) (name Pin_29) (type passive))
(pin (num 30) (name Pin_30) (type passive))
(pin (num 31) (name Pin_31) (type passive))
(pin (num 32) (name Pin_32) (type passive))
(pin (num 33) (name Pin_33) (type passive))
(pin (num 34) (name Pin_34) (type passive))
(pin (num 35) (name Pin_35) (type passive))
(pin (num 36) (name Pin_36) (type passive))
(pin (num 37) (name Pin_37) (type passive))
(pin (num 38) (name Pin_38) (type passive))
(pin (num 39) (name Pin_39) (type passive))
(pin (num 40) (name Pin_40) (type passive))
(pin (num 41) (name Pin_41) (type passive))
(pin (num 42) (name Pin_42) (type passive))
(pin (num 43) (name Pin_43) (type passive))
(pin (num 44) (name Pin_44) (type passive))
(pin (num 45) (name Pin_45) (type passive))
(pin (num 46) (name Pin_46) (type passive))
(pin (num 47) (name Pin_47) (type passive))
(pin (num 48) (name Pin_48) (type passive))
(pin (num 49) (name Pin_49) (type passive))
(pin (num 50) (name Pin_50) (type passive))))
(libpart (lib Device) (part C_Small)
(description "Unpolarized capacitor, small symbol")
(docs ~)
(footprints
(fp C_*))
(fields
(field (name Reference) C)
(field (name Value) C_Small))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib Memory_EPROM) (part 27C080)
(description "OTP EPROM 8 MiBit (1 Mi x 8)")
(docs http://ww1.microchip.com/downloads/en/devicedoc/doc0360.pdf)
(footprints
(fp DIP*W15.24mm*)
(fp PLCC*))
(fields
(field (name Reference) U)
(field (name Value) 27C080))
(pins
(pin (num 1) (name A19) (type input))
(pin (num 2) (name A16) (type input))
(pin (num 3) (name A15) (type input))
(pin (num 4) (name A12) (type input))
(pin (num 5) (name A7) (type input))
(pin (num 6) (name A6) (type input))
(pin (num 7) (name A5) (type input))
(pin (num 8) (name A4) (type input))
(pin (num 9) (name A3) (type input))
(pin (num 10) (name A2) (type input))
(pin (num 11) (name A1) (type input))
(pin (num 12) (name A0) (type input))
(pin (num 13) (name D0) (type 3state))
(pin (num 14) (name D1) (type 3state))
(pin (num 15) (name D2) (type 3state))
(pin (num 16) (name GND) (type power_in))
(pin (num 17) (name D3) (type 3state))
(pin (num 18) (name D4) (type 3state))
(pin (num 19) (name D5) (type 3state))
(pin (num 20) (name D6) (type 3state))
(pin (num 21) (name D7) (type 3state))
(pin (num 22) (name ~CE) (type input))
(pin (num 23) (name A10) (type input))
(pin (num 24) (name ~OE) (type input))
(pin (num 25) (name A11) (type input))
(pin (num 26) (name A9) (type input))
(pin (num 27) (name A8) (type input))
(pin (num 28) (name A13) (type input))
(pin (num 29) (name A14) (type input))
(pin (num 30) (name A17) (type input))
(pin (num 31) (name A18) (type input))
(pin (num 32) (name VCC) (type power_in)))))
(libraries
(library (logical 74xx)
(uri "/Library/Application Support/kicad/library/74xx.lib"))
(library (logical Connector_Generic)
(uri "/Library/Application Support/kicad/library/Connector_Generic.lib"))
(library (logical Device)
(uri "/Library/Application Support/kicad/library/Device.lib"))
(library (logical Memory_EPROM)
(uri "/Library/Application Support/kicad/library/Memory_EPROM.lib")))
(nets
(net (code 1) (name "Net-(J1-Pad10)")
(node (ref J1) (pin 10))
(node (ref LowAddrBuffer1) (pin 6)))
(net (code 2) (name "Net-(J1-Pad11)")
(node (ref LowAddrBuffer1) (pin 7))
(node (ref J1) (pin 11)))
(net (code 3) (name "Net-(J1-Pad12)")
(node (ref J1) (pin 12))
(node (ref LowAddrBuffer1) (pin 8)))
(net (code 4) (name "Net-(J1-Pad13)")
(node (ref J1) (pin 13)))
(net (code 5) (name "Net-(J1-Pad14)")
(node (ref J1) (pin 14)))
(net (code 6) (name "Net-(J1-Pad15)")
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(net (code 7) (name "Net-(J1-Pad16)")
(node (ref J1) (pin 16)))
(net (code 8) (name "Net-(J1-Pad17)")
(node (ref J1) (pin 17)))
(net (code 9) (name "Net-(J1-Pad18)")
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(node (ref U1) (pin 10))
(node (ref U2) (pin 4))
(node (ref J1) (pin 18)))
(net (code 10) (name "Net-(J1-Pad19)")
(node (ref J1) (pin 19)))
(net (code 11) (name "Net-(J1-Pad20)")
(node (ref J1) (pin 20)))
(net (code 12) (name "Net-(J1-Pad21)")
(node (ref J1) (pin 21)))
(net (code 13) (name "Net-(J1-Pad22)")
(node (ref J1) (pin 22)))
(net (code 14) (name "Net-(J1-Pad24)")
(node (ref J1) (pin 24))
(node (ref J1) (pin 27)))
(net (code 15) (name "Net-(J1-Pad23)")
(node (ref J1) (pin 23))
(node (ref J1) (pin 28)))
(net (code 16) (name "Net-(J1-Pad29)")
(node (ref J1) (pin 29)))
(net (code 17) (name "Net-(EPROM1-Pad11)")
(node (ref EPROM1) (pin 11))
(node (ref J1) (pin 3)))
(net (code 18) (name "Net-(J1-Pad30)")
(node (ref J1) (pin 30)))
(net (code 19) (name "Net-(J1-Pad31)")
(node (ref J1) (pin 31)))
(net (code 20) (name "Net-(J1-Pad32)")
(node (ref J1) (pin 32)))
(net (code 21) (name "Net-(J1-Pad33)")
(node (ref J1) (pin 33)))
(net (code 22) (name "Net-(J1-Pad34)")
(node (ref J1) (pin 34)))
(net (code 23) (name "Net-(J1-Pad35)")
(node (ref J1) (pin 35)))
(net (code 24) (name "Net-(J1-Pad36)")
(node (ref J1) (pin 36)))
(net (code 25) (name "Net-(J1-Pad37)")
(node (ref J1) (pin 37)))
(net (code 26) (name "Net-(J1-Pad38)")
(node (ref J1) (pin 38)))
(net (code 27) (name "Net-(J1-Pad39)")
(node (ref J1) (pin 39)))
(net (code 28) (name "Net-(EPROM1-Pad10)")
(node (ref EPROM1) (pin 10))
(node (ref J1) (pin 4)))
(net (code 29) (name "Net-(J1-Pad40)")
(node (ref J1) (pin 40)))
(net (code 30) (name "Net-(EPROM1-Pad9)")
(node (ref EPROM1) (pin 9))
(node (ref J1) (pin 5)))
(net (code 31) (name "Net-(J1-Pad50)")
(node (ref J1) (pin 50)))
(net (code 32) (name "Net-(J1-Pad6)")
(node (ref LowAddrBuffer1) (pin 2))
(node (ref J1) (pin 6)))
(net (code 33) (name "Net-(J1-Pad8)")
(node (ref LowAddrBuffer1) (pin 4))
(node (ref J1) (pin 8)))
(net (code 34) (name "Net-(J1-Pad9)")
(node (ref LowAddrBuffer1) (pin 5))
(node (ref J1) (pin 9)))
(net (code 35) (name "Net-(HiAddrBuffer1-Pad19)")
(node (ref LowAddrBuffer1) (pin 19))
(node (ref J1) (pin 1))
(node (ref U1) (pin 1))
(node (ref HiAddrBuffer1) (pin 19)))
(net (code 36) (name "Net-(U1-Pad3)")
(node (ref U1) (pin 5))
(node (ref U1) (pin 4))
(node (ref U1) (pin 3)))
(net (code 37) (name "Net-(DataBuffer1-Pad19)")
(node (ref DataBuffer1) (pin 19))
(node (ref U1) (pin 6))
(node (ref U2) (pin 1)))
(net (code 38) (name "Net-(DataBuffer1-Pad1)")
(node (ref U2) (pin 2))
(node (ref DataBuffer1) (pin 1))
(node (ref U1) (pin 8)))
(net (code 39) (name "Net-(U1-Pad11)")
(node (ref U2) (pin 13))
(node (ref U1) (pin 11)))
(net (code 40) (name "Net-(U2-Pad12)")
(node (ref U2) (pin 9))
(node (ref U2) (pin 12))
(node (ref U2) (pin 6)))
(net (code 41) (name "Net-(EPROM1-Pad12)")
(node (ref EPROM1) (pin 12))
(node (ref U1) (pin 13))
(node (ref J1) (pin 2))
(node (ref U2) (pin 10))
(node (ref U1) (pin 12)))
(net (code 42) (name "Net-(HiAddrLatch1-Pad11)")
(node (ref U2) (pin 11))
(node (ref HiAddrLatch1) (pin 11)))
(net (code 43) (name "Net-(DataBuffer1-Pad11)")
(node (ref DataBuffer1) (pin 11))
(node (ref EPROM1) (pin 21)))
(net (code 44) (name "Net-(DataBuffer1-Pad13)")
(node (ref DataBuffer1) (pin 13))
(node (ref EPROM1) (pin 19)))
(net (code 45) (name "Net-(DataBuffer1-Pad15)")
(node (ref EPROM1) (pin 17))
(node (ref DataBuffer1) (pin 15)))
(net (code 46) (name "Net-(EPROM1-Pad25)")
(node (ref EPROM1) (pin 25))
(node (ref LowAddrLatch1) (pin 19))
(node (ref LowAddrBuffer1) (pin 11)))
(net (code 47) (name "Net-(EPROM1-Pad23)")
(node (ref LowAddrBuffer1) (pin 12))
(node (ref EPROM1) (pin 23))
(node (ref LowAddrLatch1) (pin 16)))
(net (code 48) (name "Net-(EPROM1-Pad26)")
(node (ref EPROM1) (pin 26))
(node (ref LowAddrBuffer1) (pin 13))
(node (ref LowAddrLatch1) (pin 15)))
(net (code 49) (name "Net-(EPROM1-Pad27)")
(node (ref LowAddrBuffer1) (pin 14))
(node (ref LowAddrLatch1) (pin 12))
(node (ref EPROM1) (pin 27)))
(net (code 50) (name "Net-(EPROM1-Pad5)")
(node (ref EPROM1) (pin 5))
(node (ref LowAddrLatch1) (pin 9))
(node (ref LowAddrBuffer1) (pin 15)))
(net (code 51) (name "Net-(EPROM1-Pad6)")
(node (ref LowAddrBuffer1) (pin 16))
(node (ref LowAddrLatch1) (pin 6))
(node (ref EPROM1) (pin 6)))
(net (code 52) (name "Net-(EPROM1-Pad7)")
(node (ref LowAddrBuffer1) (pin 17))
(node (ref LowAddrLatch1) (pin 5))
(node (ref EPROM1) (pin 7)))
(net (code 53) (name "Net-(EPROM1-Pad8)")
(node (ref LowAddrBuffer1) (pin 18))
(node (ref LowAddrLatch1) (pin 2))
(node (ref EPROM1) (pin 8)))
(net (code 54) (name "Net-(EPROM1-Pad1)")
(node (ref HiAddrBuffer1) (pin 11))
(node (ref EPROM1) (pin 1))
(node (ref HiAddrLatch1) (pin 19)))
(net (code 55) (name "Net-(EPROM1-Pad31)")
(node (ref EPROM1) (pin 31))
(node (ref HiAddrLatch1) (pin 16))
(node (ref HiAddrBuffer1) (pin 12)))
(net (code 56) (name "Net-(EPROM1-Pad30)")
(node (ref HiAddrBuffer1) (pin 13))
(node (ref EPROM1) (pin 30))
(node (ref HiAddrLatch1) (pin 15)))
(net (code 57) (name "Net-(EPROM1-Pad2)")
(node (ref HiAddrLatch1) (pin 12))
(node (ref HiAddrBuffer1) (pin 14))
(node (ref EPROM1) (pin 2)))
(net (code 58) (name "Net-(EPROM1-Pad3)")
(node (ref HiAddrLatch1) (pin 9))
(node (ref EPROM1) (pin 3))
(node (ref HiAddrBuffer1) (pin 15)))
(net (code 59) (name "Net-(EPROM1-Pad29)")
(node (ref HiAddrLatch1) (pin 6))
(node (ref HiAddrBuffer1) (pin 16))
(node (ref EPROM1) (pin 29)))
(net (code 60) (name "Net-(EPROM1-Pad28)")
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(node (ref HiAddrLatch1) (pin 5))
(node (ref EPROM1) (pin 28)))
(net (code 61) (name "Net-(EPROM1-Pad4)")
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(node (ref HiAddrLatch1) (pin 2))
(node (ref HiAddrBuffer1) (pin 18)))
(net (code 62) (name "Net-(LowAddrLatch1-Pad11)")
(node (ref U2) (pin 8))
(node (ref LowAddrLatch1) (pin 11)))
(net (code 63) (name "Net-(DataBuffer1-Pad6)")
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(node (ref HiAddrLatch1) (pin 13))
(node (ref J1) (pin 45))
(node (ref DataBuffer1) (pin 6)))
(net (code 64) (name "Net-(DataBuffer1-Pad7)")
(node (ref DataBuffer1) (pin 7))
(node (ref HiAddrLatch1) (pin 14))
(node (ref J1) (pin 44))
(node (ref LowAddrLatch1) (pin 14)))
(net (code 65) (name "Net-(DataBuffer1-Pad8)")
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(node (ref HiAddrLatch1) (pin 17))
(node (ref LowAddrLatch1) (pin 17))
(node (ref J1) (pin 43)))
(net (code 66) (name "Net-(DataBuffer1-Pad2)")
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(node (ref LowAddrLatch1) (pin 3))
(node (ref J1) (pin 49)))
(net (code 67) (name "Net-(DataBuffer1-Pad3)")
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(node (ref HiAddrLatch1) (pin 4)))
(net (code 68) (name "Net-(DataBuffer1-Pad4)")
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(node (ref J1) (pin 47))
(node (ref HiAddrLatch1) (pin 7)))
(net (code 69) (name "Net-(DataBuffer1-Pad5)")
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(node (ref DataBuffer1) (pin 5))
(node (ref LowAddrLatch1) (pin 8)))
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(node (ref DataBuffer1) (pin 12)))
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(node (ref EPROM1) (pin 22))
(node (ref U2) (pin 3)))
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(node (ref DataBuffer1) (pin 18)))
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(node (ref DataBuffer1) (pin 17)))
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(node (ref EPROM1) (pin 15)))
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(node (ref DataBuffer1) (pin 14)))
(net (code 76) (name "Net-(J1-Pad7)")
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(node (ref LowAddrBuffer1) (pin 3)))
(net (code 77) (name "Net-(HiAddrLatch1-Pad1)")
(node (ref U2) (pin 5))
(node (ref U1) (pin 2))
(node (ref J1) (pin 41))
(node (ref LowAddrLatch1) (pin 1))
(node (ref HiAddrLatch1) (pin 1)))
(net (code 78) (name "Net-(DataBuffer1-Pad9)")
(node (ref HiAddrLatch1) (pin 18))
(node (ref J1) (pin 42))
(node (ref DataBuffer1) (pin 9))
(node (ref LowAddrLatch1) (pin 18)))
(net (code 79) (name GND)
(node (ref C4) (pin 2))
(node (ref C3) (pin 2))
(node (ref C7) (pin 2))
(node (ref C6) (pin 2))
(node (ref C5) (pin 2))
(node (ref C1) (pin 2))
(node (ref C2) (pin 2))
(node (ref C8) (pin 2))
(node (ref J1) (pin 26))
(node (ref U1) (pin 7))
(node (ref LowAddrBuffer1) (pin 10))
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M48
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G04 #@! TF.CreationDate,2022-03-19T10:19:41-04:00*
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T0
M30

View File

@ -0,0 +1,437 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74xx_74LS00
#
DEF 74xx_74LS00 U 0 40 Y Y 5 L N
F0 "U" 0 50 50 H V C CNN
F1 "74xx_74LS00" 0 -50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS37 7400 74HCT00 74HC00
$FPLIST
DIP*W7.62mm*
SO14*
$ENDFPLIST
DRAW
A 0 0 150 -899 899 1 1 10 f 0 -150 0 150
A 0 0 150 -899 899 2 1 10 f 0 -150 0 150
A 0 0 150 -899 899 3 1 10 f 0 -150 0 150
A 0 0 150 -899 899 4 1 10 f 0 -150 0 150
A -360 0 258 354 -354 1 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 1 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 1 2 10 f 150 0 -24 -150
A -360 0 258 354 -354 2 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 2 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 2 2 10 f 150 0 -24 -150
A -360 0 258 354 -354 3 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 3 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 3 2 10 f 150 0 -24 -150
A -360 0 258 354 -354 4 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 4 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 4 2 10 f 150 0 -24 -150
S -200 300 200 -300 5 1 10 f
P 4 1 1 10 0 150 -150 150 -150 -150 0 -150 f
P 4 2 1 10 0 150 -150 150 -150 -150 0 -150 f
P 4 3 1 10 0 150 -150 150 -150 -150 0 -150 f
P 4 4 1 10 0 150 -150 150 -150 -150 0 -150 f
P 2 1 2 10 -150 -150 -25 -150 f
P 2 1 2 10 -150 150 -25 150 f
P 12 1 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 2 2 10 -150 -150 -25 -150 f
P 2 2 2 10 -150 150 -25 150 f
P 12 2 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 3 2 10 -150 -150 -25 -150 f
P 2 3 2 10 -150 150 -25 150 f
P 12 3 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 4 2 10 -150 -150 -25 -150 f
P 2 4 2 10 -150 150 -25 150 f
P 12 4 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
X VCC 14 0 500 200 D 50 50 5 0 W
X GND 7 0 -500 200 U 50 50 5 0 W
X ~ 1 -300 100 150 R 50 50 1 1 I
X ~ 2 -300 -100 150 R 50 50 1 1 I
X ~ 3 300 0 150 L 50 50 1 1 O I
X ~ 4 -300 100 150 R 50 50 2 1 I
X ~ 5 -300 -100 150 R 50 50 2 1 I
X ~ 6 300 0 150 L 50 50 2 1 O I
X ~ 10 -300 -100 150 R 50 50 3 1 I
X ~ 8 300 0 150 L 50 50 3 1 O I
X ~ 9 -300 100 150 R 50 50 3 1 I
X ~ 11 300 0 150 L 50 50 4 1 O I
X ~ 12 -300 100 150 R 50 50 4 1 I
X ~ 13 -300 -100 150 R 50 50 4 1 I
X ~ 1 -300 100 170 R 50 50 1 2 I I
X ~ 2 -300 -100 170 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O
X ~ 4 -300 100 170 R 50 50 2 2 I I
X ~ 5 -300 -100 170 R 50 50 2 2 I I
X ~ 6 300 0 150 L 50 50 2 2 O
X ~ 10 -300 -100 170 R 50 50 3 2 I I
X ~ 8 300 0 150 L 50 50 3 2 O
X ~ 9 -300 100 170 R 50 50 3 2 I I
X ~ 11 300 0 150 L 50 50 4 2 O
X ~ 12 -300 100 170 R 50 50 4 2 I I
X ~ 13 -300 -100 170 R 50 50 4 2 I I
ENDDRAW
ENDDEF
#
# 74xx_74LS245
#
DEF 74xx_74LS245 U 0 40 Y Y 1 L N
F0 "U" -300 650 50 H V C CNN
F1 "74xx_74LS245" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HC245
$FPLIST
DIP?20*
$ENDFPLIST
DRAW
S -300 600 300 -600 1 1 10 f
P 3 1 0 0 -25 -50 -25 50 25 50 N
P 4 1 0 0 -50 -50 25 -50 25 50 50 50 N
X A->B 1 -500 -400 200 R 50 50 1 0 I
X GND 10 0 -800 200 U 50 50 1 0 W
X B7 11 500 -200 200 L 50 50 1 0 T
X B6 12 500 -100 200 L 50 50 1 0 T
X B5 13 500 0 200 L 50 50 1 0 T
X B4 14 500 100 200 L 50 50 1 0 T
X B3 15 500 200 200 L 50 50 1 0 T
X B2 16 500 300 200 L 50 50 1 0 T
X B1 17 500 400 200 L 50 50 1 0 T
X B0 18 500 500 200 L 50 50 1 0 T
X CE 19 -500 -500 200 R 50 50 1 0 I I
X A0 2 -500 500 200 R 50 50 1 0 T
X VCC 20 0 800 200 D 50 50 1 0 W
X A1 3 -500 400 200 R 50 50 1 0 T
X A2 4 -500 300 200 R 50 50 1 0 T
X A3 5 -500 200 200 R 50 50 1 0 T
X A4 6 -500 100 200 R 50 50 1 0 T
X A5 7 -500 0 200 R 50 50 1 0 T
X A6 8 -500 -100 200 R 50 50 1 0 T
X A7 9 -500 -200 200 R 50 50 1 0 T
ENDDRAW
ENDDEF
#
# 74xx_74LS32
#
DEF 74xx_74LS32 U 0 40 Y Y 5 L N
F0 "U" 0 50 50 H V C CNN
F1 "74xx_74LS32" 0 -50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP?14*
$ENDFPLIST
DRAW
A -360 0 258 354 -354 1 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 1 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 1 1 10 f 150 0 -24 -150
A -360 0 258 354 -354 2 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 2 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 2 1 10 f 150 0 -24 -150
A -360 0 258 354 -354 3 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 3 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 3 1 10 f 150 0 -24 -150
A -360 0 258 354 -354 4 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 4 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 4 1 10 f 150 0 -24 -150
A 0 0 150 -899 899 1 2 10 f 0 -150 0 150
A 0 0 150 -899 899 2 2 10 f 0 -150 0 150
A 0 0 150 -899 899 3 2 10 f 0 -150 0 150
A 0 0 150 -899 899 4 2 10 f 0 -150 0 150
S -200 300 200 -300 5 1 10 f
P 2 1 1 10 -150 -150 -25 -150 f
P 2 1 1 10 -150 150 -25 150 f
P 12 1 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 2 1 10 -150 -150 -25 -150 f
P 2 2 1 10 -150 150 -25 150 f
P 12 2 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 3 1 10 -150 -150 -25 -150 f
P 2 3 1 10 -150 150 -25 150 f
P 12 3 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 4 1 10 -150 -150 -25 -150 f
P 2 4 1 10 -150 150 -25 150 f
P 12 4 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 4 1 2 10 0 150 -150 150 -150 -150 0 -150 f
P 4 2 2 10 0 150 -150 150 -150 -150 0 -150 f
P 4 3 2 10 0 150 -150 150 -150 -150 0 -150 f
P 4 4 2 10 0 150 -150 150 -150 -150 0 -150 f
X VCC 14 0 500 200 D 50 50 5 0 W
X GND 7 0 -500 200 U 50 50 5 0 W
X ~ 1 -300 100 170 R 50 50 1 1 I
X ~ 2 -300 -100 170 R 50 50 1 1 I
X ~ 3 300 0 150 L 50 50 1 1 O
X ~ 4 -300 100 170 R 50 50 2 1 I
X ~ 5 -300 -100 170 R 50 50 2 1 I
X ~ 6 300 0 150 L 50 50 2 1 O
X ~ 10 -300 -100 170 R 50 50 3 1 I
X ~ 8 300 0 150 L 50 50 3 1 O
X ~ 9 -300 100 170 R 50 50 3 1 I
X ~ 11 300 0 150 L 50 50 4 1 O
X ~ 12 -300 100 170 R 50 50 4 1 I
X ~ 13 -300 -100 170 R 50 50 4 1 I
X ~ 1 -300 100 150 R 50 50 1 2 I I
X ~ 2 -300 -100 150 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O I
X ~ 4 -300 100 150 R 50 50 2 2 I I
X ~ 5 -300 -100 150 R 50 50 2 2 I I
X ~ 6 300 0 150 L 50 50 2 2 O I
X ~ 10 -300 -100 150 R 50 50 3 2 I I
X ~ 8 300 0 150 L 50 50 3 2 O I
X ~ 9 -300 100 150 R 50 50 3 2 I I
X ~ 11 300 0 150 L 50 50 4 2 O I
X ~ 12 -300 100 150 R 50 50 4 2 I I
X ~ 13 -300 -100 150 R 50 50 4 2 I I
ENDDRAW
ENDDEF
#
# 74xx_74LS374
#
DEF 74xx_74LS374 U 0 20 Y Y 1 F N
F0 "U" -300 650 50 H V C CNN
F1 "74xx_74LS374" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HC374 74HCT374 74AHC374 74AHCT374
$FPLIST
DIP?20*
SOIC?20*
SO?20*
$ENDFPLIST
DRAW
S -300 600 300 -600 1 1 10 f
X OE 1 -500 -500 200 R 50 50 1 0 I I
X GND 10 0 -800 200 U 50 50 1 0 W
X Cp 11 -500 -400 200 R 50 50 1 0 I C
X O4 12 500 100 200 L 50 50 1 0 T
X D4 13 -500 100 200 R 50 50 1 0 I
X D5 14 -500 0 200 R 50 50 1 0 I
X O5 15 500 0 200 L 50 50 1 0 T
X O6 16 500 -100 200 L 50 50 1 0 T
X D6 17 -500 -100 200 R 50 50 1 0 I
X D7 18 -500 -200 200 R 50 50 1 0 I
X O7 19 500 -200 200 L 50 50 1 0 T
X O0 2 500 500 200 L 50 50 1 0 T
X VCC 20 0 800 200 D 50 50 1 0 W
X D0 3 -500 500 200 R 50 50 1 0 I
X D1 4 -500 400 200 R 50 50 1 0 I
X O1 5 500 400 200 L 50 50 1 0 T
X O2 6 500 300 200 L 50 50 1 0 T
X D2 7 -500 300 200 R 50 50 1 0 I
X D3 8 -500 200 200 R 50 50 1 0 I
X O3 9 500 200 200 L 50 50 1 0 T
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x25_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 1300 50 H V C CNN
F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1250 150 -1250 1 1 10 f
S 150 -1195 100 -1205 1 1 6 N
S 150 -1095 100 -1105 1 1 6 N
S 150 -995 100 -1005 1 1 6 N
S 150 -895 100 -905 1 1 6 N
S 150 -795 100 -805 1 1 6 N
S 150 -695 100 -705 1 1 6 N
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
S 150 705 100 695 1 1 6 N
S 150 805 100 795 1 1 6 N
S 150 905 100 895 1 1 6 N
S 150 1005 100 995 1 1 6 N
S 150 1105 100 1095 1 1 6 N
S 150 1205 100 1195 1 1 6 N
X Pin_1 1 -200 1200 150 R 50 50 1 1 P
X Pin_10 10 -200 300 150 R 50 50 1 1 P
X Pin_11 11 -200 200 150 R 50 50 1 1 P
X Pin_12 12 -200 100 150 R 50 50 1 1 P
X Pin_13 13 -200 0 150 R 50 50 1 1 P
X Pin_14 14 -200 -100 150 R 50 50 1 1 P
X Pin_15 15 -200 -200 150 R 50 50 1 1 P
X Pin_16 16 -200 -300 150 R 50 50 1 1 P
X Pin_17 17 -200 -400 150 R 50 50 1 1 P
X Pin_18 18 -200 -500 150 R 50 50 1 1 P
X Pin_19 19 -200 -600 150 R 50 50 1 1 P
X Pin_2 2 -200 1100 150 R 50 50 1 1 P
X Pin_20 20 -200 -700 150 R 50 50 1 1 P
X Pin_21 21 -200 -800 150 R 50 50 1 1 P
X Pin_22 22 -200 -900 150 R 50 50 1 1 P
X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
X Pin_26 26 300 -1200 150 L 50 50 1 1 P
X Pin_27 27 300 -1100 150 L 50 50 1 1 P
X Pin_28 28 300 -1000 150 L 50 50 1 1 P
X Pin_29 29 300 -900 150 L 50 50 1 1 P
X Pin_3 3 -200 1000 150 R 50 50 1 1 P
X Pin_30 30 300 -800 150 L 50 50 1 1 P
X Pin_31 31 300 -700 150 L 50 50 1 1 P
X Pin_32 32 300 -600 150 L 50 50 1 1 P
X Pin_33 33 300 -500 150 L 50 50 1 1 P
X Pin_34 34 300 -400 150 L 50 50 1 1 P
X Pin_35 35 300 -300 150 L 50 50 1 1 P
X Pin_36 36 300 -200 150 L 50 50 1 1 P
X Pin_37 37 300 -100 150 L 50 50 1 1 P
X Pin_38 38 300 0 150 L 50 50 1 1 P
X Pin_39 39 300 100 150 L 50 50 1 1 P
X Pin_4 4 -200 900 150 R 50 50 1 1 P
X Pin_40 40 300 200 150 L 50 50 1 1 P
X Pin_41 41 300 300 150 L 50 50 1 1 P
X Pin_42 42 300 400 150 L 50 50 1 1 P
X Pin_43 43 300 500 150 L 50 50 1 1 P
X Pin_44 44 300 600 150 L 50 50 1 1 P
X Pin_45 45 300 700 150 L 50 50 1 1 P
X Pin_46 46 300 800 150 L 50 50 1 1 P
X Pin_47 47 300 900 150 L 50 50 1 1 P
X Pin_48 48 300 1000 150 L 50 50 1 1 P
X Pin_49 49 300 1100 150 L 50 50 1 1 P
X Pin_5 5 -200 800 150 R 50 50 1 1 P
X Pin_50 50 300 1200 150 L 50 50 1 1 P
X Pin_6 6 -200 700 150 R 50 50 1 1 P
X Pin_7 7 -200 600 150 R 50 50 1 1 P
X Pin_8 8 -200 500 150 R 50 50 1 1 P
X Pin_9 9 -200 400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Memory_EPROM_27C080
#
DEF Memory_EPROM_27C080 U 0 20 Y Y 1 F N
F0 "U" -300 1250 50 H V C CNN
F1 "Memory_EPROM_27C080" 100 -1250 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP*W15.24mm*
PLCC*
$ENDFPLIST
DRAW
S -300 1200 300 -1200 1 1 10 f
X A19 1 -400 -800 100 R 50 50 1 1 I
X A2 10 -400 900 100 R 50 50 1 1 I
X A1 11 -400 1000 100 R 50 50 1 1 I
X A0 12 -400 1100 100 R 50 50 1 1 I
X D0 13 400 1100 100 L 50 50 1 1 T
X D1 14 400 1000 100 L 50 50 1 1 T
X D2 15 400 900 100 L 50 50 1 1 T
X GND 16 0 -1300 100 U 50 50 1 1 W
X D3 17 400 800 100 L 50 50 1 1 T
X D4 18 400 700 100 L 50 50 1 1 T
X D5 19 400 600 100 L 50 50 1 1 T
X A16 2 -400 -500 100 R 50 50 1 1 I
X D6 20 400 500 100 L 50 50 1 1 T
X D7 21 400 400 100 L 50 50 1 1 T
X ~CE 22 -400 -1000 100 R 50 50 1 1 I
X A10 23 -400 100 100 R 50 50 1 1 I
X ~OE 24 -400 -1100 100 R 50 50 1 1 I
X A11 25 -400 0 100 R 50 50 1 1 I
X A9 26 -400 200 100 R 50 50 1 1 I
X A8 27 -400 300 100 R 50 50 1 1 I
X A13 28 -400 -200 100 R 50 50 1 1 I
X A14 29 -400 -300 100 R 50 50 1 1 I
X A15 3 -400 -400 100 R 50 50 1 1 I
X A17 30 -400 -600 100 R 50 50 1 1 I
X A18 31 -400 -700 100 R 50 50 1 1 I
X VCC 32 0 1300 100 D 50 50 1 1 W
X A12 4 -400 -100 100 R 50 50 1 1 I
X A7 5 -400 400 100 R 50 50 1 1 I
X A6 6 -400 500 100 R 50 50 1 1 I
X A5 7 -400 600 100 R 50 50 1 1 I
X A4 8 -400 700 100 R 50 50 1 1 I
X A3 9 -400 800 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

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# ProDOS ROM-Drive
This is a peripheral card for the Apple ][ series computers that acts as a read-only solid state disk drive (SSD) all in EPROM. Although it won't run DOS, it is fully ProDOS compatible and will appear as a read-only hard drive even when booting from another drive. It holds 1022 KB of disk data and 2 KB of controlling code making a full megabyte. The drive boots ProDOS and into BASIC in under 1.5 seconds.
# v4.0
This is a new revision of the hardware, incompatible with previous firmware and drive image before v3. If you have a v2.5 board, see the v2.5 tag [here](https://github.com/tjboldt/ProDOS-ROM-Drive/tree/v2.5). Note that all of v2.1, v2.5 and v3.0 have a small design mistake that didn't properly buffer the data bus the way it was intended in the original v1.0 version. This has been fixed for v4.0.
![Image of Board](/Hardware/ProDOS%20ROM-Drive%202.5%20Front.jpg)
# ProDOS ROM-Drive
This is a peripheral card for the Apple ][ series computers that acts as a read-only solid state disk drive (SSD) all in EPROM. Although it won't run DOS, it is fully ProDOS compatible and will appear as a read-only hard drive even when booting from another drive. It holds 1024 KB of disk data with the 256 byte firmware stored in block 0001 where the SOS boot loader normally resides. The drive boots ProDOS and into BASIC in under 1.5 seconds.
![Image of Board](/Hardware/ProDOS%20ROM-Drive%20Front.jpg)
You can order blank circuit boards from [PCBWay](https://www.pcbway.com/project/shareproject/ProDOS_ROM_Drive_v4_4fe0794f.html) or upload the provided gerber and drill files to any PCB manufacturer.
## History
@ -17,15 +22,22 @@ By mid-May of 1999 I finally got around to building a third design. This time I
To build actual circuit boards, I tried making some by hand with marker, etching solution and copper on fibreglass boards but this proved to be far too difficult. I then learned the wonders of gerber files which can be created with a variety of PCB layout software. The files were emailed to a company in Alberta, Canada and three days later in July of 1999 I received a batch of 10 blank boards. These boards did not have the familiar green board look to them, nor were they pre-cut. I had to cut and file them to fit an Apple II slot by hand. Back then it was prohitively expensive for a young hobbiest to make less than 20 or 30 boards with the full solder-masking process due to the set-up fees.
In 2019, I decided to revisit the original design as I was disappointed that the original didn't have a solder mask and was rather large for what it was. I got the board much smaller but in the process of translating my two decade old hand written notes, I made a mistake on one control line. To actually call this project finished, I had to make another revision. I also noticed the revised board was slightly larger than a credit card so I worked for a couple weeks to optimize the lines and squeeze the two-layer board down to 3.375" x 2.125". The board here is that final revision 2.5 (note that references to first, second and third design are all the solderless breadboard prototypes leading up to the 1.0 circuit board printed in 1999, 2.0 was never made, 2.1 is the board with the error patched with a jumper wire and 2.2 through 2.4 were never made).
In 2019, I decided to revisit the original design as I was disappointed that the original didn't have a solder mask and was rather large for what it was. I got the board much smaller but in the process of translating my two decade old hand written notes, I made a mistake on one control line. To actually call this project finished, I had to make another revision. I also noticed the revised board was slightly larger than a credit card so I worked for a couple weeks to optimize the lines and squeeze the two-layer board down to 3.375" x 2.125". (Note that references above to first, second and third design are all the solderless breadboard prototypes leading up to the 1.0 circuit board printed in 1999, 2.0 was never made, 2.1 is the board with the error patched with a jumper wire and 2.2 through 2.4 were never made).
In 2021, the first ever issue was opened on the project requesting that the firmware be relocatable. I let that issue sit for a few months and then Ralle Palaveev supplied some relocatable firmware as a patch. I quickly realized that this could be placed into the second block on the drive normally reserved for SOS bootloader for the Apple ///, essentially allowing the full EPROM to be used for the drive. I disassembed Ralle's patch, merged it into the existing source code and made a few updates to save a few bytes and add clarity. This change required some differences in wiring for the firmware addressing on the card. The final revision 4.0 was made in 2022 to fix the data buffer wiring but was otherwise the same as 3.0.
## Notes
The firmware code needs to be assembled 7 times with different parameters specifying which slot to assemble for. It is probably easier to work from the EPROM image as it is already a 1 MB disk image with the firmware in the top four ProDOS blocks.
I usually use Ciderpress to copy files onto the drive image and then burn the file to a 27C801 EPROM with a GQ-4x4 USB Programmer.
I used to use Ciderpress to copy files onto the drive image but now use my own cross-platform command line tool [ProDOS-Utilities](https://github.com/tjboldt/ProDOS-Utilities) and sometimes make modifications to the image live via an Apple II emulator. I then burn the file to a 27C801 EPROM with a GQ-4x4 USB Programmer. Do NOT overwrite block 0001 in the image as it contains the firmware for the card.
If you're planning on designing you own card, I highly recommend reading "Interfacing & Digital Experiments with your Apple" by Charles J. Engelisher and Apple's "Apple II Reference Manual" as well as "ProDOS Technical Reference Manual" if you want to build a drive. You also need an EPROM programmer, some chips and a prototyping board. My designs used simple logic gates to decode addresses but if you want to reduce chip count, you'll also need a PAL/GAL logic programmer (which some EPROM programmers can do).
##
## Website
Official website is [apple2.ca](http://apple2.ca/).
## Purchasing a ProDOS ROM-Drive
I generally no longer sell these cards but you can buy them online from [Laser](https://www.laser.com/product_info.php/item/ProDOS_ROM_Drive-Apple_II_ProDOS_bootable_1MB_read-only_drive/cPath/288_292/products_id/1984) and other retailers.
## Other links
- [Thread about building the card](https://tinkerdifferent.com/threads/building-tjboldts-prodos-rom-drive-for-apple.1249/)
- [Article about the card](https://www.callapple.org/hardware/prodos-rom-drive-version-3/)
- [Alternate version with fewer chips](https://www.ebay.com/itm/374004896438)