RAM2GS/CPLD/LCMXO256C/impl1/ram2gs_lcmxo256c_impl1.ior

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2023-08-20 11:10:11 +00:00
Loading design for application iotiming from file ram2gs_lcmxo256c_impl1.ncd.
Design name: RAM2GS
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO256C
Package: TQFP100
Performance: 4
Package Status: Final Version 1.19.
Performance Hardware Data Status: Version 1.124.
Loading design for application iotiming from file ram2gs_lcmxo256c_impl1.ncd.
Design name: RAM2GS
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO256C
Package: TQFP100
Performance: 5
Package Status: Final Version 1.19.
Performance Hardware Data Status: Version 1.124.
Loading design for application iotiming from file ram2gs_lcmxo256c_impl1.ncd.
Design name: RAM2GS
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO256C
Package: TQFP100
Performance: M
Package Status: Final Version 1.19.
Performance Hardware Data Status: Version 1.124.
// Design: RAM2GS
// Package: TQFP100
// ncd File: ram2gs_lcmxo256c_impl1.ncd
// Version: Diamond (64-bit) 3.12.1.454
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// Written on Sat Jan 06 06:25:13 2024
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// M: Minimum Performance Grade
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// iotiming RAM2GS_LCMXO256C_impl1.ncd RAM2GS_LCMXO256C_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2GS/CPLD/LCMXO256C/promote.xml
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I/O Timing Report (All units are in ns)
Worst Case Results across Performance Grades (M, 5, 4, 3):
// Input Setup and Hold Times
Port Clock Edge Setup Performance_Grade Hold Performance_Grade
----------------------------------------------------------------------
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CROW[0] nCRAS F -0.006 M 1.907 3
CROW[1] nCRAS F -0.006 M 1.907 3
Din[0] PHI2 F 4.304 3 2.935 3
Din[0] nCCAS F 0.567 3 0.723 3
Din[1] PHI2 F 4.920 3 3.034 3
Din[1] nCCAS F 0.414 3 0.851 3
Din[2] PHI2 F 3.171 3 3.327 3
Din[2] nCCAS F 0.909 3 0.432 3
Din[3] PHI2 F 4.332 3 2.525 3
Din[3] nCCAS F 0.038 3 1.155 3
Din[4] PHI2 F 5.624 3 2.635 3
Din[4] nCCAS F 1.448 3 -0.041 M
Din[5] PHI2 F 4.126 3 2.124 3
Din[5] nCCAS F 1.046 3 0.159 3
Din[6] PHI2 F 5.565 3 2.394 3
Din[6] nCCAS F 0.563 3 0.729 3
Din[7] PHI2 F 5.293 3 1.654 3
Din[7] nCCAS F 0.719 3 0.583 3
MAin[0] PHI2 F 8.072 3 -0.164 M
MAin[0] nCRAS F -0.128 M 2.331 3
MAin[1] PHI2 F 7.487 3 -0.178 M
MAin[1] nCRAS F -0.129 M 2.331 3
MAin[2] PHI2 F 6.793 3 -0.034 M
MAin[2] nCRAS F -0.129 M 2.331 3
MAin[3] PHI2 F 7.235 3 -0.226 M
MAin[3] nCRAS F -0.035 M 2.023 3
MAin[4] PHI2 F 7.305 3 -0.207 M
MAin[4] nCRAS F 0.428 3 1.517 3
MAin[5] PHI2 F 7.672 3 -0.236 M
MAin[5] nCRAS F -0.037 M 2.028 3
MAin[6] PHI2 F 9.015 3 -0.710 M
MAin[6] nCRAS F -0.003 M 1.896 3
MAin[7] PHI2 F 7.764 3 -0.441 M
MAin[7] nCRAS F -0.126 M 2.324 3
MAin[8] nCRAS F -0.038 M 2.034 3
MAin[9] nCRAS F 0.206 3 1.728 3
PHI2 RCLK R 2.769 3 -0.274 M
UFMSDO RCLK R 1.753 3 -0.052 M
nCCAS RCLK R 1.935 3 -0.108 M
nCCAS nCRAS F 0.843 3 1.179 3
nCRAS RCLK R 1.093 3 0.277 3
nFWE PHI2 F 4.435 3 0.640 3
nFWE nCRAS F 1.163 3 0.894 3
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// Clock to Output Delay
Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
------------------------------------------------------------------------
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LED RCLK R 15.407 3 4.713 M
LED nCRAS F 17.685 3 5.215 M
RA[0] RCLK R 10.436 3 2.152 M
RA[0] nCRAS F 11.488 3 2.330 M
RA[10] RCLK R 8.093 3 1.668 M
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RA[11] PHI2 R 9.420 3 1.925 M
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RA[1] RCLK R 10.958 3 2.270 M
RA[1] nCRAS F 12.371 3 2.529 M
RA[2] RCLK R 10.892 3 2.242 M
RA[2] nCRAS F 11.786 3 2.402 M
RA[3] RCLK R 10.561 3 2.184 M
RA[3] nCRAS F 12.541 3 2.560 M
RA[4] RCLK R 10.909 3 2.257 M
RA[4] nCRAS F 12.060 3 2.456 M
RA[5] RCLK R 9.970 3 2.057 M
RA[5] nCRAS F 12.271 3 2.508 M
RA[6] RCLK R 9.222 3 1.920 M
RA[6] nCRAS F 10.844 3 2.210 M
RA[7] RCLK R 9.613 3 1.981 M
RA[7] nCRAS F 11.686 3 2.379 M
RA[8] RCLK R 9.617 3 1.982 M
RA[8] nCRAS F 11.487 3 2.339 M
RA[9] RCLK R 9.762 3 2.016 M
RA[9] nCRAS F 11.488 3 2.337 M
RBA[0] nCRAS F 8.925 3 1.828 M
RBA[1] nCRAS F 10.608 3 2.153 M
RCKE RCLK R 7.609 3 1.570 M
RDQMH RCLK R 10.915 3 2.299 M
RDQML RCLK R 11.554 3 2.433 M
RD[0] nCCAS F 8.539 3 1.899 M
RD[1] nCCAS F 9.248 3 2.027 M
RD[2] nCCAS F 9.706 3 2.118 M
RD[3] nCCAS F 8.539 3 1.899 M
RD[4] nCCAS F 9.228 3 2.015 M
RD[5] nCCAS F 8.772 3 1.924 M
RD[6] nCCAS F 8.539 3 1.899 M
RD[7] nCCAS F 9.706 3 2.118 M
UFMCLK RCLK R 8.007 3 1.714 M
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UFMSDI RCLK R 8.007 3 1.714 M
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nRCAS RCLK R 8.120 3 1.681 M
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nRCS RCLK R 6.854 3 1.431 M
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nRRAS RCLK R 8.089 3 1.669 M
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nRWE RCLK R 6.854 3 1.431 M
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nUFMCS RCLK R 8.732 3 1.846 M
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WARNING: you must also run trce with hold speed: 3
WARNING: you must also run trce with setup speed: M