mirror of
https://github.com/garrettsworkshop/RAM2GS.git
synced 2024-08-18 02:28:57 +00:00
115 lines
6.5 KiB
Plaintext
115 lines
6.5 KiB
Plaintext
|
Assembler report for RAM4GS
|
||
|
Thu Jul 23 02:20:55 2020
|
||
|
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||
|
|
||
|
|
||
|
---------------------
|
||
|
; Table of Contents ;
|
||
|
---------------------
|
||
|
1. Legal Notice
|
||
|
2. Assembler Summary
|
||
|
3. Assembler Settings
|
||
|
4. Assembler Generated Files
|
||
|
5. Assembler Device Options: /Repos/RAM4GS/cpld/output_files/RAM4GS.pof
|
||
|
6. Assembler Messages
|
||
|
|
||
|
|
||
|
|
||
|
----------------
|
||
|
; Legal Notice ;
|
||
|
----------------
|
||
|
Copyright (C) 1991-2013 Altera Corporation
|
||
|
Your use of Altera Corporation's design tools, logic functions
|
||
|
and other software and tools, and its AMPP partner logic
|
||
|
functions, and any output files from any of the foregoing
|
||
|
(including device programming or simulation files), and any
|
||
|
associated documentation or information are expressly subject
|
||
|
to the terms and conditions of the Altera Program License
|
||
|
Subscription Agreement, Altera MegaCore Function License
|
||
|
Agreement, or other applicable license agreement, including,
|
||
|
without limitation, that your use is for the sole purpose of
|
||
|
programming logic devices manufactured by Altera and sold by
|
||
|
Altera or its authorized distributors. Please refer to the
|
||
|
applicable agreement for further details.
|
||
|
|
||
|
|
||
|
|
||
|
+---------------------------------------------------------------+
|
||
|
; Assembler Summary ;
|
||
|
+-----------------------+---------------------------------------+
|
||
|
; Assembler Status ; Successful - Thu Jul 23 02:20:55 2020 ;
|
||
|
; Revision Name ; RAM4GS ;
|
||
|
; Top-level Entity Name ; RAM4GS ;
|
||
|
; Family ; MAX II ;
|
||
|
; Device ; EPM240T100C5 ;
|
||
|
+-----------------------+---------------------------------------+
|
||
|
|
||
|
|
||
|
+---------------------------------------------------------------------------------------------------------+
|
||
|
; Assembler Settings ;
|
||
|
+-----------------------------------------------------------------------------+-----------+---------------+
|
||
|
; Option ; Setting ; Default Value ;
|
||
|
+-----------------------------------------------------------------------------+-----------+---------------+
|
||
|
; Use smart compilation ; Off ; Off ;
|
||
|
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
|
||
|
; Enable compact report table ; Off ; Off ;
|
||
|
; Compression mode ; Off ; Off ;
|
||
|
; Clock source for configuration device ; Internal ; Internal ;
|
||
|
; Clock frequency of the configuration device ; 10 MHZ ; 10 MHz ;
|
||
|
; Divide clock frequency by ; 1 ; 1 ;
|
||
|
; Auto user code ; On ; On ;
|
||
|
; Security bit ; Off ; Off ;
|
||
|
; Use configuration device ; On ; On ;
|
||
|
; Configuration device ; Auto ; Auto ;
|
||
|
; Configuration device auto user code ; Off ; Off ;
|
||
|
; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ;
|
||
|
; Generate Raw Binary File (.rbf) For Target Device ; Off ; Off ;
|
||
|
; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ;
|
||
|
; Hexadecimal Output File start address ; 0 ; 0 ;
|
||
|
; Hexadecimal Output File count direction ; Up ; Up ;
|
||
|
; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ;
|
||
|
; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ;
|
||
|
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ;
|
||
|
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ;
|
||
|
; In-System Programming Default Clamp State ; Tri-state ; Tri-state ;
|
||
|
+-----------------------------------------------------------------------------+-----------+---------------+
|
||
|
|
||
|
|
||
|
+--------------------------------------------+
|
||
|
; Assembler Generated Files ;
|
||
|
+--------------------------------------------+
|
||
|
; File Name ;
|
||
|
+--------------------------------------------+
|
||
|
; /Repos/RAM4GS/cpld/output_files/RAM4GS.pof ;
|
||
|
+--------------------------------------------+
|
||
|
|
||
|
|
||
|
+----------------------------------------------------------------------+
|
||
|
; Assembler Device Options: /Repos/RAM4GS/cpld/output_files/RAM4GS.pof ;
|
||
|
+----------------+-----------------------------------------------------+
|
||
|
; Option ; Setting ;
|
||
|
+----------------+-----------------------------------------------------+
|
||
|
; Device ; EPM240T100C5 ;
|
||
|
; JTAG usercode ; 0x00173F26 ;
|
||
|
; Checksum ; 0x0017428E ;
|
||
|
+----------------+-----------------------------------------------------+
|
||
|
|
||
|
|
||
|
+--------------------+
|
||
|
; Assembler Messages ;
|
||
|
+--------------------+
|
||
|
Info: *******************************************************************
|
||
|
Info: Running Quartus II 32-bit Assembler
|
||
|
Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||
|
Info: Processing started: Thu Jul 23 02:20:53 2020
|
||
|
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off RAM4GS -c RAM4GS
|
||
|
Info (115031): Writing out detailed assembly data for power analysis
|
||
|
Info (115030): Assembler is generating device programming files
|
||
|
Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
|
||
|
Info: Peak virtual memory: 296 megabytes
|
||
|
Info: Processing ended: Thu Jul 23 02:20:55 2020
|
||
|
Info: Elapsed time: 00:00:02
|
||
|
Info: Total CPU time (on all processors): 00:00:02
|
||
|
|
||
|
|