RAM2GS/CPLD/RAM2GS.sdc

5 lines
177 B
Tcl

create_clock [get_ports RCLK] -period 16ns
create_clock [get_ports PHI2] -period 350ns
create_clock [get_ports nCRAS] -period 350ns
create_clock [get_ports nCCAS] -period 350ns