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https://github.com/garrettsworkshop/RAM2GS.git
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274 lines
22 KiB
Plaintext
274 lines
22 KiB
Plaintext
PAD Specification File
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***************************
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PART TYPE: LCMXO2-640HC
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Performance Grade: 4
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PACKAGE: TQFP100
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Package Status: Final Version 1.39
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Sat Oct 09 01:19:20 2021
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Pinout by Port Name:
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+-----------+----------+--------------+-------+-----------+-----------+------------------------------------------------------------+
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| Port Name | Pin/Bank | Buffer Type | Site | PG Enable | BC Enable | Properties |
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+-----------+----------+--------------+-------+-----------+-----------+------------------------------------------------------------+
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| CROW[0] | 10/3 | LVTTL33_IN | PL3D | | | CLAMP:ON HYSTERESIS:SMALL |
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| CROW[1] | 16/3 | LVTTL33_IN | PL6A | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[0] | 3/3 | LVTTL33_IN | PL2C | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[1] | 96/0 | LVTTL33_IN | PT6D | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[2] | 88/0 | LVTTL33_IN | PT9A | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[3] | 97/0 | LVTTL33_IN | PT6C | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[4] | 99/0 | LVTTL33_IN | PT6A | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[5] | 98/0 | LVTTL33_IN | PT6B | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[6] | 2/3 | LVTTL33_IN | PL2B | | | CLAMP:ON HYSTERESIS:SMALL |
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| Din[7] | 1/3 | LVTTL33_IN | PL2A | | | CLAMP:ON HYSTERESIS:SMALL |
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| Dout[0] | 76/0 | LVTTL33_OUT | PT11D | | | DRIVE:4mA SLEW:SLOW |
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| Dout[1] | 86/0 | LVTTL33_OUT | PT9C | | | DRIVE:4mA SLEW:SLOW |
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| Dout[2] | 87/0 | LVTTL33_OUT | PT9B | | | DRIVE:4mA SLEW:SLOW |
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| Dout[3] | 85/0 | LVTTL33_OUT | PT9D | | | DRIVE:4mA SLEW:SLOW |
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| Dout[4] | 83/0 | LVTTL33_OUT | PT10B | | | DRIVE:4mA SLEW:SLOW |
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| Dout[5] | 84/0 | LVTTL33_OUT | PT10A | | | DRIVE:4mA SLEW:SLOW |
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| Dout[6] | 78/0 | LVTTL33_OUT | PT11A | | | DRIVE:4mA SLEW:SLOW |
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| Dout[7] | 82/0 | LVTTL33_OUT | PT10C | | | DRIVE:4mA SLEW:SLOW |
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| LED | 34/2 | LVTTL33_OUT | PB6C | | | DRIVE:16mA SLEW:SLOW |
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| MAin[0] | 14/3 | LVTTL33_IN | PL5C | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[1] | 12/3 | LVTTL33_IN | PL5A | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[2] | 13/3 | LVTTL33_IN | PL5B | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[3] | 21/3 | LVTTL33_IN | PL7B | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[4] | 20/3 | LVTTL33_IN | PL7A | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[5] | 19/3 | LVTTL33_IN | PL6D | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[6] | 24/3 | LVTTL33_IN | PL7C | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[7] | 18/3 | LVTTL33_IN | PL6C | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[8] | 25/3 | LVTTL33_IN | PL7D | | | CLAMP:ON HYSTERESIS:SMALL |
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| MAin[9] | 32/2 | LVTTL33_IN | PB6B | | | CLAMP:ON HYSTERESIS:SMALL |
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| PHI2 | 8/3 | LVTTL33_IN | PL3B | | | CLAMP:ON HYSTERESIS:SMALL |
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| RA[0] | 66/1 | LVTTL33_OUT | PR3D | | | DRIVE:4mA SLEW:SLOW |
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| RA[10] | 64/1 | LVTTL33_OUT | PR5B | | | DRIVE:4mA SLEW:SLOW |
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| RA[11] | 59/1 | LVTTL33_OUT | PR6B | | | DRIVE:4mA SLEW:SLOW |
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| RA[1] | 67/1 | LVTTL33_OUT | PR3C | | | DRIVE:4mA SLEW:SLOW |
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| RA[2] | 69/1 | LVTTL33_OUT | PR3A | | | DRIVE:4mA SLEW:SLOW |
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| RA[3] | 71/1 | LVTTL33_OUT | PR2C | | | DRIVE:4mA SLEW:SLOW |
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| RA[4] | 74/1 | LVTTL33_OUT | PR2B | | | DRIVE:4mA SLEW:SLOW |
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| RA[5] | 70/1 | LVTTL33_OUT | PR2D | | | DRIVE:4mA SLEW:SLOW |
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| RA[6] | 68/1 | LVTTL33_OUT | PR3B | | | DRIVE:4mA SLEW:SLOW |
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| RA[7] | 75/1 | LVTTL33_OUT | PR2A | | | DRIVE:4mA SLEW:SLOW |
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| RA[8] | 65/1 | LVTTL33_OUT | PR5A | | | DRIVE:4mA SLEW:SLOW |
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| RA[9] | 62/1 | LVTTL33_OUT | PR5D | | | DRIVE:4mA SLEW:SLOW |
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| RBA[0] | 58/1 | LVTTL33_OUT | PR6C | | | DRIVE:4mA SLEW:SLOW |
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| RBA[1] | 60/1 | LVTTL33_OUT | PR6A | | | DRIVE:4mA SLEW:SLOW |
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| RCKE | 53/1 | LVTTL33_OUT | PR7B | | | DRIVE:4mA SLEW:SLOW |
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| RCLK | 63/1 | LVTTL33_IN | PR5C | | | CLAMP:ON HYSTERESIS:SMALL |
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| RDQMH | 51/1 | LVTTL33_OUT | PR7D | | | DRIVE:4mA SLEW:SLOW |
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| RDQML | 48/2 | LVTTL33_OUT | PB14C | | | DRIVE:4mA SLEW:SLOW |
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| RD[0] | 36/2 | LVTTL33_BIDI | PB10A | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[1] | 37/2 | LVTTL33_BIDI | PB10B | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[2] | 38/2 | LVTTL33_BIDI | PB10C | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[3] | 39/2 | LVTTL33_BIDI | PB10D | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[4] | 40/2 | LVTTL33_BIDI | PB12A | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[5] | 41/2 | LVTTL33_BIDI | PB12B | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[6] | 42/2 | LVTTL33_BIDI | PB12C | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| RD[7] | 43/2 | LVTTL33_BIDI | PB12D | | | DRIVE:4mA PULL:KEEPER CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW |
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| nCCAS | 9/3 | LVTTL33_IN | PL3C | | | CLAMP:ON HYSTERESIS:SMALL |
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| nCRAS | 17/3 | LVTTL33_IN | PL6B | | | CLAMP:ON HYSTERESIS:SMALL |
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| nFWE | 15/3 | LVTTL33_IN | PL5D | | | CLAMP:ON HYSTERESIS:SMALL |
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| nRCAS | 52/1 | LVTTL33_OUT | PR7C | | | DRIVE:4mA SLEW:SLOW |
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| nRCS | 57/1 | LVTTL33_OUT | PR6D | | | DRIVE:4mA SLEW:SLOW |
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| nRRAS | 54/1 | LVTTL33_OUT | PR7A | | | DRIVE:4mA SLEW:SLOW |
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| nRWE | 49/2 | LVTTL33_OUT | PB14D | | | DRIVE:4mA SLEW:SLOW |
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+-----------+----------+--------------+-------+-----------+-----------+------------------------------------------------------------+
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Vccio by Bank:
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+------+-------+
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| Bank | Vccio |
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+------+-------+
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| 0 | 3.3V |
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| 1 | 3.3V |
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| 2 | 3.3V |
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| 3 | 3.3V |
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+------+-------+
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Vref by Bank:
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+------+-----+-----------------+---------+
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| Vref | Pin | Bank # / Vref # | Load(s) |
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+------+-----+-----------------+---------+
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+------+-----+-----------------+---------+
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Pinout by Pin Number:
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+----------+-----------------------+------------+--------------+-------+---------------+-----------+-----------+
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| Pin/Bank | Pin Info | Preference | Buffer Type | Site | Dual Function | PG Enable | BC Enable |
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+----------+-----------------------+------------+--------------+-------+---------------+-----------+-----------+
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| 1/3 | Din[7] | LOCATED | LVTTL33_IN | PL2A | | | |
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| 2/3 | Din[6] | LOCATED | LVTTL33_IN | PL2B | | | |
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| 3/3 | Din[0] | LOCATED | LVTTL33_IN | PL2C | PCLKT3_2 | | |
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| 4/3 | unused, PULL:DOWN | | | PL2D | PCLKC3_2 | | |
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| 7/3 | unused, PULL:DOWN | | | PL3A | | | |
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| 8/3 | PHI2 | LOCATED | LVTTL33_IN | PL3B | | | |
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| 9/3 | nCCAS | LOCATED | LVTTL33_IN | PL3C | | | |
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| 10/3 | CROW[0] | LOCATED | LVTTL33_IN | PL3D | | | |
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| 12/3 | MAin[1] | LOCATED | LVTTL33_IN | PL5A | PCLKT3_1 | | |
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| 13/3 | MAin[2] | LOCATED | LVTTL33_IN | PL5B | PCLKC3_1 | | |
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| 14/3 | MAin[0] | LOCATED | LVTTL33_IN | PL5C | | | |
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| 15/3 | nFWE | LOCATED | LVTTL33_IN | PL5D | | | |
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| 16/3 | CROW[1] | LOCATED | LVTTL33_IN | PL6A | | | |
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| 17/3 | nCRAS | LOCATED | LVTTL33_IN | PL6B | | | |
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| 18/3 | MAin[7] | LOCATED | LVTTL33_IN | PL6C | | | |
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| 19/3 | MAin[5] | LOCATED | LVTTL33_IN | PL6D | | | |
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| 20/3 | MAin[4] | LOCATED | LVTTL33_IN | PL7A | PCLKT3_0 | | |
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| 21/3 | MAin[3] | LOCATED | LVTTL33_IN | PL7B | PCLKC3_0 | | |
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| 24/3 | MAin[6] | LOCATED | LVTTL33_IN | PL7C | | | |
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| 25/3 | MAin[8] | LOCATED | LVTTL33_IN | PL7D | | | |
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| 27/2 | unused, PULL:DOWN | | | PB4A | CSSPIN | | |
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| 28/2 | unused, PULL:DOWN | | | PB4B | | | |
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| 29/2 | unused, PULL:DOWN | | | PB4C | | | |
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| 30/2 | unused, PULL:DOWN | | | PB4D | | | |
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| 31/2 | unused, PULL:DOWN | | | PB6A | MCLK/CCLK | | |
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| 32/2 | MAin[9] | LOCATED | LVTTL33_IN | PB6B | SO/SPISO | | |
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| 34/2 | LED | LOCATED | LVTTL33_OUT | PB6C | PCLKT2_0 | | |
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| 35/2 | unused, PULL:DOWN | | | PB6D | PCLKC2_0 | | |
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| 36/2 | RD[0] | LOCATED | LVTTL33_BIDI | PB10A | | | |
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| 37/2 | RD[1] | LOCATED | LVTTL33_BIDI | PB10B | | | |
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| 38/2 | RD[2] | LOCATED | LVTTL33_BIDI | PB10C | PCLKT2_1 | | |
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| 39/2 | RD[3] | LOCATED | LVTTL33_BIDI | PB10D | PCLKC2_1 | | |
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| 40/2 | RD[4] | LOCATED | LVTTL33_BIDI | PB12A | | | |
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| 41/2 | RD[5] | LOCATED | LVTTL33_BIDI | PB12B | | | |
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| 42/2 | RD[6] | LOCATED | LVTTL33_BIDI | PB12C | | | |
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| 43/2 | RD[7] | LOCATED | LVTTL33_BIDI | PB12D | | | |
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| 45/2 | unused, PULL:DOWN | | | PB14A | | | |
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| 47/2 | unused, PULL:DOWN | | | PB14B | | | |
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| 48/2 | RDQML | LOCATED | LVTTL33_OUT | PB14C | SN | | |
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| 49/2 | nRWE | LOCATED | LVTTL33_OUT | PB14D | SI/SISPI | | |
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| 51/1 | RDQMH | LOCATED | LVTTL33_OUT | PR7D | | | |
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| 52/1 | nRCAS | LOCATED | LVTTL33_OUT | PR7C | | | |
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| 53/1 | RCKE | LOCATED | LVTTL33_OUT | PR7B | | | |
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| 54/1 | nRRAS | LOCATED | LVTTL33_OUT | PR7A | | | |
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| 57/1 | nRCS | LOCATED | LVTTL33_OUT | PR6D | | | |
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| 58/1 | RBA[0] | LOCATED | LVTTL33_OUT | PR6C | | | |
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| 59/1 | RA[11] | LOCATED | LVTTL33_OUT | PR6B | | | |
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| 60/1 | RBA[1] | LOCATED | LVTTL33_OUT | PR6A | | | |
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| 62/1 | RA[9] | LOCATED | LVTTL33_OUT | PR5D | PCLKC1_0 | | |
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| 63/1 | RCLK | LOCATED | LVTTL33_IN | PR5C | PCLKT1_0 | | |
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| 64/1 | RA[10] | LOCATED | LVTTL33_OUT | PR5B | | | |
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| 65/1 | RA[8] | LOCATED | LVTTL33_OUT | PR5A | | | |
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| 66/1 | RA[0] | LOCATED | LVTTL33_OUT | PR3D | | | |
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| 67/1 | RA[1] | LOCATED | LVTTL33_OUT | PR3C | | | |
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| 68/1 | RA[6] | LOCATED | LVTTL33_OUT | PR3B | | | |
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| 69/1 | RA[2] | LOCATED | LVTTL33_OUT | PR3A | | | |
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| 70/1 | RA[5] | LOCATED | LVTTL33_OUT | PR2D | | | |
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| 71/1 | RA[3] | LOCATED | LVTTL33_OUT | PR2C | | | |
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| 74/1 | RA[4] | LOCATED | LVTTL33_OUT | PR2B | | | |
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| 75/1 | RA[7] | LOCATED | LVTTL33_OUT | PR2A | | | |
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| 76/0 | Dout[0] | LOCATED | LVTTL33_OUT | PT11D | DONE | | |
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| 77/0 | unused, PULL:DOWN | | | PT11C | INITN | | |
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| 78/0 | Dout[6] | LOCATED | LVTTL33_OUT | PT11A | | | |
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| 81/0 | unused, PULL:DOWN | | | PT10D | PROGRAMN | | |
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| 82/0 | Dout[7] | LOCATED | LVTTL33_OUT | PT10C | JTAGENB | | |
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| 83/0 | Dout[4] | LOCATED | LVTTL33_OUT | PT10B | | | |
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| 84/0 | Dout[5] | LOCATED | LVTTL33_OUT | PT10A | | | |
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| 85/0 | Dout[3] | LOCATED | LVTTL33_OUT | PT9D | SDA/PCLKC0_0 | | |
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| 86/0 | Dout[1] | LOCATED | LVTTL33_OUT | PT9C | SCL/PCLKT0_0 | | |
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| 87/0 | Dout[2] | LOCATED | LVTTL33_OUT | PT9B | PCLKC0_1 | | |
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| 88/0 | Din[2] | LOCATED | LVTTL33_IN | PT9A | PCLKT0_1 | | |
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| 90/0 | Reserved: sysCONFIG | | | PT7D | TMS | | |
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| 91/0 | Reserved: sysCONFIG | | | PT7C | TCK | | |
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| 94/0 | Reserved: sysCONFIG | | | PT7B | TDI | | |
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| 95/0 | Reserved: sysCONFIG | | | PT7A | TDO | | |
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| 96/0 | Din[1] | LOCATED | LVTTL33_IN | PT6D | | | |
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| 97/0 | Din[3] | LOCATED | LVTTL33_IN | PT6C | | | |
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| 98/0 | Din[5] | LOCATED | LVTTL33_IN | PT6B | | | |
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| 99/0 | Din[4] | LOCATED | LVTTL33_IN | PT6A | | | |
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| PT11B/0 | unused, PULL:DOWN | | | PT11B | | | |
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+----------+-----------------------+------------+--------------+-------+---------------+-----------+-----------+
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sysCONFIG Pins:
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+----------+--------------------+--------------------+----------+-------------+-------------------+
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| Pad Name | sysCONFIG Pin Name | sysCONFIG Settings | Pin/Bank | Buffer Type | Config Pull Mode |
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+----------+--------------------+--------------------+----------+-------------+-------------------+
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| PT7D | TMS | JTAG_PORT=ENABLE | 90/0 | | PULLUP |
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| PT7C | TCK/TEST_CLK | JTAG_PORT=ENABLE | 91/0 | | NO pull up/down |
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| PT7B | TDI/MD7 | JTAG_PORT=ENABLE | 94/0 | | PULLUP |
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| PT7A | TDO | JTAG_PORT=ENABLE | 95/0 | | PULLUP |
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+----------+--------------------+--------------------+----------+-------------+-------------------+
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Dedicated sysCONFIG Pins:
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List of All Pins' Locate Preferences Based on Final Placement After PAR
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to Help Users Lock Down ALL the Pins Easily (by Simply Copy & Paste):
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LOCATE COMP "CROW[0]" SITE "10";
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LOCATE COMP "CROW[1]" SITE "16";
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LOCATE COMP "Din[0]" SITE "3";
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LOCATE COMP "Din[1]" SITE "96";
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LOCATE COMP "Din[2]" SITE "88";
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LOCATE COMP "Din[3]" SITE "97";
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LOCATE COMP "Din[4]" SITE "99";
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LOCATE COMP "Din[5]" SITE "98";
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LOCATE COMP "Din[6]" SITE "2";
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LOCATE COMP "Din[7]" SITE "1";
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LOCATE COMP "Dout[0]" SITE "76";
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LOCATE COMP "Dout[1]" SITE "86";
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LOCATE COMP "Dout[2]" SITE "87";
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LOCATE COMP "Dout[3]" SITE "85";
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LOCATE COMP "Dout[4]" SITE "83";
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LOCATE COMP "Dout[5]" SITE "84";
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LOCATE COMP "Dout[6]" SITE "78";
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LOCATE COMP "Dout[7]" SITE "82";
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LOCATE COMP "LED" SITE "34";
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LOCATE COMP "MAin[0]" SITE "14";
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LOCATE COMP "MAin[1]" SITE "12";
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LOCATE COMP "MAin[2]" SITE "13";
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LOCATE COMP "MAin[3]" SITE "21";
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LOCATE COMP "MAin[4]" SITE "20";
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LOCATE COMP "MAin[5]" SITE "19";
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LOCATE COMP "MAin[6]" SITE "24";
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LOCATE COMP "MAin[7]" SITE "18";
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LOCATE COMP "MAin[8]" SITE "25";
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LOCATE COMP "MAin[9]" SITE "32";
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LOCATE COMP "PHI2" SITE "8";
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LOCATE COMP "RA[0]" SITE "66";
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LOCATE COMP "RA[10]" SITE "64";
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LOCATE COMP "RA[11]" SITE "59";
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LOCATE COMP "RA[1]" SITE "67";
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LOCATE COMP "RA[2]" SITE "69";
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LOCATE COMP "RA[3]" SITE "71";
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LOCATE COMP "RA[4]" SITE "74";
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LOCATE COMP "RA[5]" SITE "70";
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LOCATE COMP "RA[6]" SITE "68";
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LOCATE COMP "RA[7]" SITE "75";
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LOCATE COMP "RA[8]" SITE "65";
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LOCATE COMP "RA[9]" SITE "62";
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LOCATE COMP "RBA[0]" SITE "58";
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LOCATE COMP "RBA[1]" SITE "60";
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LOCATE COMP "RCKE" SITE "53";
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LOCATE COMP "RCLK" SITE "63";
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LOCATE COMP "RDQMH" SITE "51";
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LOCATE COMP "RDQML" SITE "48";
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LOCATE COMP "RD[0]" SITE "36";
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LOCATE COMP "RD[1]" SITE "37";
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LOCATE COMP "RD[2]" SITE "38";
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LOCATE COMP "RD[3]" SITE "39";
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LOCATE COMP "RD[4]" SITE "40";
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LOCATE COMP "RD[5]" SITE "41";
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LOCATE COMP "RD[6]" SITE "42";
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LOCATE COMP "RD[7]" SITE "43";
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LOCATE COMP "nCCAS" SITE "9";
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LOCATE COMP "nCRAS" SITE "17";
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LOCATE COMP "nFWE" SITE "15";
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LOCATE COMP "nRCAS" SITE "52";
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LOCATE COMP "nRCS" SITE "57";
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LOCATE COMP "nRRAS" SITE "54";
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LOCATE COMP "nRWE" SITE "49";
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PAR: Place And Route Diamond (64-bit) 3.12.0.240.2.
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Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
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Copyright (c) 1995 AT&T Corp. All rights reserved.
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Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
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Copyright (c) 2001 Agere Systems All rights reserved.
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Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights reserved.
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Sat Oct 09 01:19:22 2021
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