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https://github.com/garrettsworkshop/RAM2GS.git
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42 lines
1.0 KiB
Common Lisp
42 lines
1.0 KiB
Common Lisp
[ActiveSupport PAR]
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; Global primary clocks
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GLOBAL_PRIMARY_USED = 4;
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; Global primary clock #0
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GLOBAL_PRIMARY_0_SIGNALNAME = RCLK_c;
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GLOBAL_PRIMARY_0_DRIVERTYPE = CLK_PIN;
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GLOBAL_PRIMARY_0_LOADNUM = 52;
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; Global primary clock #1
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GLOBAL_PRIMARY_1_SIGNALNAME = PHI2_c;
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GLOBAL_PRIMARY_1_DRIVERTYPE = PIO;
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GLOBAL_PRIMARY_1_LOADNUM = 13;
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; Global primary clock #2
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GLOBAL_PRIMARY_2_SIGNALNAME = nCRAS_c;
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GLOBAL_PRIMARY_2_DRIVERTYPE = PIO;
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GLOBAL_PRIMARY_2_LOADNUM = 7;
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; Global primary clock #3
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GLOBAL_PRIMARY_3_SIGNALNAME = nCCAS_c;
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GLOBAL_PRIMARY_3_DRIVERTYPE = PIO;
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GLOBAL_PRIMARY_3_LOADNUM = 4;
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; # of global secondary clocks
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GLOBAL_SECONDARY_USED = 0;
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; I/O Bank 0 Usage
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BANK_0_USED = 13;
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BANK_0_AVAIL = 19;
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BANK_0_VCCIO = 3.3V;
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BANK_0_VREF1 = NA;
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; I/O Bank 1 Usage
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BANK_1_USED = 20;
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BANK_1_AVAIL = 20;
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BANK_1_VCCIO = 3.3V;
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BANK_1_VREF1 = NA;
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; I/O Bank 2 Usage
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BANK_2_USED = 12;
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BANK_2_AVAIL = 20;
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BANK_2_VCCIO = 3.3V;
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BANK_2_VREF1 = NA;
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; I/O Bank 3 Usage
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BANK_3_USED = 18;
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BANK_3_AVAIL = 20;
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BANK_3_VCCIO = 3.3V;
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BANK_3_VREF1 = NA;
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