mirror of
https://github.com/garrettsworkshop/RAM2GS.git
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139 lines
6.5 KiB
Plaintext
139 lines
6.5 KiB
Plaintext
Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: 5
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: 6
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: M
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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// Design: RAM2GS
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// Package: TQFP100
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// ncd File: ram2gs_lcmxo2_640hc_impl1.ncd
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// Version: Diamond (64-bit) 3.12.1.454
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// Written on Tue Aug 15 22:56:41 2023
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// M: Minimum Performance Grade
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// iotiming RAM2GS_LCMXO2_640HC_impl1.ncd RAM2GS_LCMXO2_640HC_impl1.prf -gui -msgset D:/OneDrive/Documents/GitHub/RAM2GS/CPLD/LCMXO2-640HC/promote.xml
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I/O Timing Report (All units are in ns)
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Worst Case Results across Performance Grades (M, 6, 5, 4):
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// Input Setup and Hold Times
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Port Clock Edge Setup Performance_Grade Hold Performance_Grade
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----------------------------------------------------------------------
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CROW[0] nCRAS F 3.268 4 -0.395 M
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CROW[1] nCRAS F 1.999 4 -0.040 M
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Din[0] PHI2 F 4.389 4 3.636 4
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Din[0] nCCAS F 0.646 4 0.538 4
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Din[1] PHI2 F 4.456 4 3.516 4
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Din[1] nCCAS F 1.108 4 0.143 4
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Din[2] PHI2 F 4.106 4 3.516 4
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Din[2] nCCAS F 1.315 4 0.036 M
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Din[3] PHI2 F 4.427 4 3.516 4
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Din[3] nCCAS F 1.893 4 -0.089 M
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Din[4] PHI2 F 4.612 4 3.516 4
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Din[4] nCCAS F 0.714 4 0.460 4
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Din[5] PHI2 F 4.805 4 3.516 4
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Din[5] nCCAS F 1.636 4 -0.054 M
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Din[6] PHI2 F 4.266 4 3.636 4
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Din[6] nCCAS F 1.078 4 0.185 4
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Din[7] PHI2 F 5.607 4 3.636 4
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Din[7] nCCAS F 2.050 4 -0.188 M
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MAin[0] PHI2 F 6.493 4 -0.289 M
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MAin[0] nCRAS F 0.832 4 0.632 4
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MAin[1] PHI2 F 5.109 4 0.055 M
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MAin[1] nCRAS F 1.627 4 0.047 M
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MAin[2] PHI2 F 5.349 4 0.695 4
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MAin[2] nCRAS F 1.684 4 0.048 M
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MAin[3] PHI2 F 7.301 4 -0.533 M
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MAin[3] nCRAS F 1.660 4 0.035 M
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MAin[4] PHI2 F 6.167 4 -0.223 M
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MAin[4] nCRAS F 1.339 4 0.181 4
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MAin[5] PHI2 F 6.923 4 -0.449 M
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MAin[5] nCRAS F 1.082 4 0.412 4
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MAin[6] PHI2 F 6.784 4 -0.408 M
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MAin[6] nCRAS F 0.961 4 0.423 4
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MAin[7] PHI2 F 6.547 4 -0.171 M
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MAin[7] nCRAS F 1.331 4 0.186 4
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MAin[8] nCRAS F 0.454 4 0.874 4
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MAin[9] nCRAS F 0.782 4 0.684 4
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PHI2 RCLK R -0.312 M 3.167 4
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UFMSDO RCLK R 0.397 4 0.958 4
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nCCAS RCLK R 2.272 4 -0.095 M
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nCCAS nCRAS F 3.094 4 -0.308 M
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nCRAS RCLK R 1.843 4 0.009 M
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nFWE PHI2 F 5.987 4 -0.179 M
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nFWE nCRAS F 0.594 4 0.839 4
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// Clock to Output Delay
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Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
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------------------------------------------------------------------------
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LED RCLK R 11.623 4 3.337 M
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LED nCRAS F 10.867 4 3.086 M
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RA[0] RCLK R 10.387 4 3.085 M
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RA[0] nCRAS F 10.473 4 3.018 M
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RA[10] RCLK R 8.141 4 2.620 M
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RA[11] PHI2 R 8.610 4 2.756 M
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RA[1] RCLK R 11.208 4 3.281 M
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RA[1] nCRAS F 10.655 4 3.096 M
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RA[2] RCLK R 11.477 4 3.355 M
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RA[2] nCRAS F 10.655 4 3.096 M
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RA[3] RCLK R 10.954 4 3.201 M
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RA[3] nCRAS F 10.693 4 3.092 M
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RA[4] RCLK R 12.338 4 3.584 M
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RA[4] nCRAS F 10.776 4 3.099 M
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RA[5] RCLK R 11.516 4 3.347 M
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RA[5] nCRAS F 11.072 4 3.177 M
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RA[6] RCLK R 11.068 4 3.255 M
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RA[6] nCRAS F 10.655 4 3.096 M
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RA[7] RCLK R 10.823 4 3.207 M
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RA[7] nCRAS F 11.129 4 3.214 M
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RA[8] RCLK R 11.034 4 3.275 M
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RA[8] nCRAS F 10.664 4 3.099 M
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RA[9] RCLK R 10.925 4 3.239 M
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RA[9] nCRAS F 10.710 4 3.093 M
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RBA[0] nCRAS F 8.157 4 2.563 M
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RBA[1] nCRAS F 8.157 4 2.563 M
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RCKE RCLK R 8.141 4 2.620 M
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RDQMH RCLK R 11.337 4 3.355 M
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RDQML RCLK R 10.800 4 3.223 M
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RD[0] nCCAS F 7.888 4 2.510 M
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RD[1] nCCAS F 7.888 4 2.510 M
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RD[2] nCCAS F 7.888 4 2.510 M
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RD[3] nCCAS F 7.888 4 2.510 M
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RD[4] nCCAS F 7.888 4 2.510 M
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RD[5] nCCAS F 7.888 4 2.510 M
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RD[6] nCCAS F 7.888 4 2.510 M
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RD[7] nCCAS F 7.888 4 2.510 M
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UFMCLK RCLK R 8.121 4 2.627 M
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UFMSDI RCLK R 8.121 4 2.627 M
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nRCAS RCLK R 8.141 4 2.620 M
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nRCS RCLK R 8.141 4 2.620 M
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nRRAS RCLK R 8.141 4 2.620 M
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nRWE RCLK R 8.121 4 2.627 M
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nUFMCS RCLK R 8.121 4 2.627 M
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WARNING: you must also run trce with hold speed: 4
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WARNING: you must also run trce with setup speed: M
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