README.md - added yosys4gal link

Yosys4gal can produce .jed files for GAL16V8 and GAL22V10 from a Verilog source file.
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ole00 authored and GitHub committed 2025-12-26 13:36:14 +00:00
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@@ -460,6 +460,8 @@ Troubleshooting:
* Try GAL Asm to produce .jed files - see link bellow.
* Try Yosys4gal to produce .jed files from Verilog HDL files: https://github.com/annoyatron255/yosys4gal
- can I use .jed files with ATF150X IC?
* Not directly. You have to convert the .jed file into .xsvf format. Use the python tools located in the utils/jtag
subdirectory to do that. See readme.txt in that directory for more info. Once you convert the .jed to .xsvf
@@ -485,6 +487,8 @@ Other GAL related links:
- GAL Asm online compiler: https://rhgndf.github.io/galasm-web/
- GAL Verilog compiler: https://github.com/annoyatron255/yosys4gal
- PLD and GAL info: https://github.com/peterzieba/5Vpld
- Fusemap info: