mirror of
https://github.com/V2RetroComputing/analog.git
synced 2024-06-18 06:29:30 +00:00
f7d4779880
Progress on PCPI mode bug fixes. PCPI mode is now working again, but the config interface is still broken enough to prevent the use of the config utility while in this mode.. Sending the FORMAT command from the monitor rom returns the card to defaults. Replace n with the slot number the card is installed in: Correction of mousetext / inverse / flashing handling on IIe see https://github.com/V2RetroComputing/analog/issues/3 ]CALL -151 *CnF0:46 4F 52 4D 41 54 00 00 Monochrome mode & color palettes are now implemented. $C0n1: Monochrome mode & palette $80: B&W $90: Inverse $A0: Amber $B0: Inverse Amber $C0: Green $D0: Inverse Green $E0: Commodore 64 Theme $F0: Use IIgs palette $C0n2: Mirror of IIgs TBCOLOR register $C0n3: Mirror of IIgs BORDER register
118 lines
2.5 KiB
C
118 lines
2.5 KiB
C
#include <pico/stdlib.h>
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#include <pico/multicore.h>
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#include "common/config.h"
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#include "z80/businterface.h"
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#include "z80/z80buf.h"
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#include "z80/z80rom.h"
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volatile uint8_t rom_shadow = 1;
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volatile uint8_t ram_bank = 0;
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volatile uint8_t ram_common = 0;
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#define Z80break (z80_res || (current_mode != MODE_APPLICARD) || (config_cmdbuf[7] == 0))
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uint8_t cpu_in(uint16_t address) {
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uint8_t rv = 0;
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switch(address & 0xe0) {
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case 0x00: // Write Data to 6502
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rv = pcpi_reg[0];
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break;
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case 0x20: // Read Data from 6502
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clr_z80_stat;
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rv = pcpi_reg[1];
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//printf("I%01X:%02X\r\n", (address >> 4), rv);
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break;
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case 0x40: // Status Port
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if(rd_z80_stat)
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rv |= 0x80;
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if(rd_6502_stat)
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rv |= 0x01;
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break;
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case 0x60:
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break;
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}
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return rv;
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}
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void cpu_out(uint16_t address, uint8_t value) {
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switch(address & 0xe0) {
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case 0x00: // Write Data to 6502
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//printf("O%01X:%02X\r\n", (address >> 4), value);
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pcpi_reg[0] = value;
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set_6502_stat;
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break;
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case 0x60:
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rom_shadow = (value & 1);
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break;
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case 0xC0:
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ram_bank = (value >> 1) & 7;
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ram_common = (value >> 6) & 1;
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break;
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}
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}
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uint8_t _RamRead(uint16_t address) {
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if((rom_shadow & 1) && (address < 0x8000))
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return z80_rom[address & 0x7ff];
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if((address > 0xE000) && (ram_common)) {
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return z80_ram[address];
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}
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if(ram_bank) {
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return 0xff;
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}
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return z80_ram[address];
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}
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void _RamWrite(uint16_t address, uint8_t value) {
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if((rom_shadow & 1) && (address < 0x8000))
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return;
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if((address > 0xE000) && (ram_common)) {
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z80_ram[address] = value;
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return;
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}
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if(ram_bank) {
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return;
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}
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z80_ram[address] = value;
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}
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#include "z80cpu.h"
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void z80main() {
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z80_res = 1;
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while(current_mode == MODE_APPLICARD) {
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if(config_cmdbuf[7] == 0) {
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config_handler();
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} else
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if(cardslot != 0) {
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if(z80_res) {
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rom_shadow = 1;
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ram_bank = 0;
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ram_common = 0;
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z80_nmi = 0;
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z80_irq = 0;
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z80_res = 0;
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// 6502 -> Z80
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clr_z80_stat;
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// Z80 -> 6502
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clr_6502_stat;
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Z80reset();
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}
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Z80run();
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}
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}
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}
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