27 lines
417 B
Verilog
27 lines
417 B
Verilog
module blink (
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output pin_led,
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output en_245
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);
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wire clk;
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OSCH #(
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.NOM_FREQ("2.08")
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) internal_oscillator_inst (
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.STDBY(1'b0),
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.OSC(clk)
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);
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reg [23:0] led_timer;
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always @(posedge clk) begin
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led_timer <= led_timer + 1;
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end
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//assign pin_led = led_timer[23];
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//assign pin_led = led_timer[22];
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assign pin_led = led_timer[20];
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assign en_245 = 1'b1;
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endmodule |