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https://github.com/steve-chamberlin/fpga-disk-controller.git
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68 lines
2.5 KiB
Plaintext
68 lines
2.5 KiB
Plaintext
SCHEMATIC START ;
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# map: version Diamond (64-bit) 3.9.0.99.2 -- WARNING: Map write only section -- Thu Feb 22 10:56:39 2018
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SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE BACKGROUND_RECONFIG=OFF INBUF=ON ;
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LOCATE COMP "data[7]" SITE "52" ;
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LOCATE COMP "data[6]" SITE "51" ;
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LOCATE COMP "data[5]" SITE "47" ;
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LOCATE COMP "data[4]" SITE "39" ;
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LOCATE COMP "data[3]" SITE "38" ;
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LOCATE COMP "data[2]" SITE "37" ;
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LOCATE COMP "data[1]" SITE "36" ;
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LOCATE COMP "data[0]" SITE "35" ;
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LOCATE COMP "wrdata" SITE "83" ;
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LOCATE COMP "phase[3]" SITE "87" ;
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LOCATE COMP "phase[2]" SITE "86" ;
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LOCATE COMP "phase[1]" SITE "85" ;
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LOCATE COMP "phase[0]" SITE "84" ;
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LOCATE COMP "_wrreq" SITE "88" ;
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LOCATE COMP "_enbl1" SITE "82" ;
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LOCATE COMP "_enbl2" SITE "99" ;
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LOCATE COMP "select" SITE "78" ;
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LOCATE COMP "_en35" SITE "98" ;
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LOCATE COMP "spi_clk" SITE "31" ;
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LOCATE COMP "spi_mosi" SITE "49" ;
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LOCATE COMP "spi_cs" SITE "27" ;
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LOCATE COMP "_en245" SITE "30" ;
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LOCATE COMP "debugInfo[7]" SITE "25" ;
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LOCATE COMP "debugInfo[6]" SITE "24" ;
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LOCATE COMP "debugInfo[5]" SITE "17" ;
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LOCATE COMP "debugInfo[4]" SITE "16" ;
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LOCATE COMP "debugInfo[3]" SITE "15" ;
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LOCATE COMP "debugInfo[2]" SITE "14" ;
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LOCATE COMP "debugInfo[1]" SITE "13" ;
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LOCATE COMP "debugInfo[0]" SITE "12" ;
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LOCATE COMP "addr[11]" SITE "69" ;
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LOCATE COMP "addr[10]" SITE "68" ;
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LOCATE COMP "addr[9]" SITE "67" ;
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LOCATE COMP "addr[8]" SITE "66" ;
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LOCATE COMP "addr[7]" SITE "65" ;
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LOCATE COMP "addr[6]" SITE "64" ;
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LOCATE COMP "addr[5]" SITE "62" ;
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LOCATE COMP "addr[4]" SITE "60" ;
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LOCATE COMP "addr[3]" SITE "59" ;
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LOCATE COMP "addr[2]" SITE "58" ;
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LOCATE COMP "addr[1]" SITE "57" ;
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LOCATE COMP "addr[0]" SITE "54" ;
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LOCATE COMP "fclk" SITE "63" ;
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LOCATE COMP "q3" SITE "70" ;
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LOCATE COMP "rw" SITE "71" ;
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LOCATE COMP "_iostrobe" SITE "74" ;
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LOCATE COMP "_iosel" SITE "53" ;
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LOCATE COMP "_devsel" SITE "34" ;
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LOCATE COMP "_reset" SITE "75" ;
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LOCATE COMP "sense" SITE "97" ;
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LOCATE COMP "rddata" SITE "96" ;
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LOCATE COMP "spi_miso" SITE "32" ;
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SCHEMATIC END ;
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BLOCK RESETPATHS ;
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BLOCK ASYNCPATHS ;
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PROHIBIT SITE "48" ;
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PROHIBIT SITE "61" ;
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COMMERCIAL ;
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// No timing preferences found. TRCE invokes auto-generation of timing preferences
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// Section Autogen
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FREQUENCY NET "fclk_c" 149.993 MHz ;
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// End Section Autogen
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