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https://codeberg.org/cryu/micro-sci-a2-controller
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Reformat, add comments from S.Elliott@AppleFritter
This commit is contained in:
Christopher RYU
parent
49fa0c2180
commit
8f415a7306
205
firmware/util.s
205
firmware/util.s
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@ -1,27 +1,49 @@
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; da65 V2.11.0 - (C) Copyright 2000-2005, Ullrich von Bassewitz
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; Created: 2022-01-26 21:00:18
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; Input file: xaa
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; Page: 1
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; Micro-SCI / Franklin "Technician Mode" firmware
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;
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; Thanks to S.Elliott@AppleFritter for comments/analysis
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.setcpu "6502"
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.org $c600
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.setcpu "6502"
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.org $c600
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A2L := $3e
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SLOTx16 := $fd
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A2L := $3e
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MON_WAIT := $FCA8
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GETLNZ := $FD67
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BELL := $FF3A
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IORTS := $FF58
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GETNUM := $FFA7
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; motherboard IO ports
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KBD := $C000
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KBDSTRB := $C010
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; DEVSEL ports, accessed via SLOTx16 in X reg
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STEPOFF := $C080
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STEPON := $C081
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MOTOROFF := $C088
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MOTORON := $C089
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Q6OFF := $C08C
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Q6ON := $C08D
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Q7OFF := $C08E
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Q7ON := $C08F
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lda #$A3 ; '#'
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MON_WAIT := $FCA8
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GETLNZ := $FD67
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BELL := $FF3A
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IORTS := $FF58
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GETNUM := $FFA7
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KEY_POUND := $A3
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KEY_S := $EC
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KEY_W := $F0
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KEY_Z := $F3
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KEY_M := $06
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KEY_R := $EB
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KEY_X := $F1
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KEY_Q := $EA
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lda #KEY_POUND
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sta $33 ; set input-prompt character to '#'
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LC604: jsr BELL
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LC607: jsr GETLNZ ; start new line and take input
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lda #$00
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sta $F2
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LC60E: sta $C010 ; clear keyboard strobe
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LC60E: sta KBDSTRB ; clear keyboard strobe
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sta $F3
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ldy $F2
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jsr GETNUM ; parse hex into A2, A has last char xor $b0
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@ -29,128 +51,135 @@ LC60E: sta $C010 ; clear keyboard strobe
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sty $F2
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cmp #$C6 ; $C6 from $8D (return)
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beq LC607 ; no more input, go prompt for new input
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cmp #$EC ; 'S'
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cmp #KEY_S ; 'S'
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beq CMD_S
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cmp #$F0 ; 'W'
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cmp #KEY_W ; 'W'
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beq CMD_W
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cmp #$F3 ; 'Z'
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cmp #KEY_Z ; 'Z'
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beq CMD_Z
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ldy #$7F
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cmp #$06 ; 'M'
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cmp #KEY_M ; 'M'
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beq CMD_MX
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cmp #$EB ; 'R'
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cmp #KEY_R ; 'R'
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beq CMD_R
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ldx #$06
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stx $F3
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cmp #$F1 ; 'X'
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cmp #KEY_X ; 'X'
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beq CMD_MX
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cmp #$EA ; 'Q'
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cmp #KEY_Q ; 'Q'
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bne LC604 ; BEEP and prompt for new input
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brk ; 'Q' exits out
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; 'R'
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CMD_R: lda #$50
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sta $FC
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txa
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adc #$00
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sta $F3
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lda #$00
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beq LC651
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; 'R': recalibrate by seeking track $00 from track $50
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CMD_R: lda #$50 ; set starting track to #$50
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sta $FC ; store accumulator as 'current' track at $FC
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txa ; set accumulator to 0
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adc #$00 ; inc A (carry still set from CMP #$EB)
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sta $F3 ; set ($F3)=01
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lda #$00 ; pass target track #$00 through accumulator
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beq LC651 ; branch to end of 'S' command to finish
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; 'S': seek logical-track index in A2L ('22S' seeks logical track $22)
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CMD_S: lda A2L
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asl a
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LC651: sta $F0
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ldy #$FF
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bne CMD_MX
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CMD_S: lda A2L ; load logical track-index from A2L
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asl a ; convert to physical track-index
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LC651: sta $F0 ; store accumulator as target track at $F0
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ldy #$FF ; value to be stored at $09 = #$FF
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bne CMD_MX ; branch to 'M' command for next step
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; 'Z'
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CMD_Z: lda A2L
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asl a
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sta $F1
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ldy #$00
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beq CMD_MX
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; 'Z': seek logical-track index in A2L (eg: "22Z" seeks logical track $22)
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CMD_Z: lda A2L ; load logical track-index from A2L
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asl a ; convert to physical track-index
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sta $F1 ; store as target track in $F1
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ldy #$00 ; value to stored at $09 = #$00
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beq CMD_MX ; branch to 'M' command for next step
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; temporarily stop motor, then branch to turn it on again
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LC660: lda #$50
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jsr MON_WAIT
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sta $C088,x
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sta MOTOROFF,x
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ldy A2L
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LC66A: jsr MON_WAIT
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dey
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bpl LC66A
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bmi LC68E
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; EXIT THRU GIFT SHOP, current command finished, go back to parser
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LC672: lda #$00
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beq LC60E
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; 'W'
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; 'W' command, write nibble-pattern in A2L (eg: "96W" writes 96 96 96...)
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CMD_W: lda A2L
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sta $FF
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ldy #$0F
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CMD_MX: sty $09
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jsr IORTS
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; 'M' command while Y=#7F and X=#00
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; 'X' command while Y=#7F and X=#06 and ($f3)=#06
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CMD_MX: sty $09 ; preserve actual command
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jsr IORTS ; put our address on stack
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tsx
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lda $0100,x
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lda $0100,x ; derive our DEVSEL index
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asl a
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asl a
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asl a
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asl a
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sta $FD
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sta SLOTx16 ; save DEVSEL index for future IO
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adc $F3
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tax
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LC68E: sta $C089,x
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LC68E: sta MOTORON,x
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lda $09
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beq LC6BA
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bmi LC6BA
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beq LC6BA ; Y=00, branch for 'Z'
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bmi LC6BA ; Y=FF, branch for 'S'
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asl a
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bmi LC6AC
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sta $C08F,x
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LC69D: lda $09
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asl a
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bmi LC660
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sta Q7ON,x ; start writing/erasing
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LC69D: lda $09 ; [3 cycles] reload saved Y byte
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asl a ; [2] shift-left to test second bit
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bmi LC660 ; [2] branch to stop motor for 'M' and 'X' and 'S' commands
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nop
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nop
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lda $FF
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sta $C08D,x
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cmp $C08C,x
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LC6AC: lda $C000
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eor #$9B
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bne LC69D
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ldx $FD
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sta $C08E,x
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LC6B8: beq LC672
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LC6BA: ldx $FD
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sta $C089,x
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lda $FF ; byte value to be written
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sta Q6ON,x ; store into data register (wrong timing for Disk II, it would probably write $DD instead)
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cmp Q6OFF,x ; [4] shift data-out
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LC6AC: lda KBD ; get keypress
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eor #$9B ; ESC?
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bne LC69D ; if not, continue loop
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ldx SLOTx16
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sta Q7OFF,x
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LC6B8: beq LC672 ; all done, branch to branch-to-parser
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LC6BA: ldx SLOTx16
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sta MOTORON,x
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LC6BF: ldy $FC
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LC6C1: cpy $F0
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bne LC6E3
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lda $F0
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sta $FC
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LC6C1: cpy $F0 ; compare track index in Y to target track (result in carry flag)
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bne LC6E3 ; track doesn't match, go to stepper routine
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lda $F0 ; load current track into accumulator (redundant, same value is already in Y reg)
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sta $FC ; store current track
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lda $09
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bne LC672
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lda $F0
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bne LC672 ; Y=00, branch for 'Z'
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lda $F0 ; exchange target track indexes in $F0 vs $F1
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ldy $F1
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sta $F1
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sty $F0
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lda $C000
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eor #$9B
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beq LC6B8
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lda KBD ; read current key value
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eor #$9B ; $9B = <esc>
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beq LC6B8 ; if current key is <esc> then branch
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lda #$73
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jsr MON_WAIT
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jsr MON_WAIT ; delay for mechanical seek time
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bcs LC6BF
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LC6E3: bcs LC6E7
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iny
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iny
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LC6E3: bcs LC6E7 ; track numbers increasing or decreasing?
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iny ; increment track number in Y reg
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iny ; decrement track number in Y reg
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LC6E7: dey
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tya
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and #$03
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asl a
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ora $FD
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tax
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lsr a
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lsr a
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sta $C081,x
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nop
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and #$03 ; mask track to just 4 low bits, numbers 00-01-02-03
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asl a ; shift left, convert to stepper-motor phases 02-04-06-08
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ora SLOTx16 ; bitwise-OR to make it into a DEVSEL-relative IO address
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tax ; move it into X reg for IO
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lsr a ; shift right to make track number again
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lsr a ; now shift low-bit into carry flag (odd vs even)
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sta STEPON,x ; turn on stepper motor phase indicated in X reg
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nop ; dead code
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nop
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lda #$56
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jsr MON_WAIT
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sta $C080,x
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bcs LC6C1
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jsr MON_WAIT ; wait stepper delay (returns with A=00, carry set)
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sta STEPOFF,x ; turn off stepper motor phase indicated in X reg
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bcs LC6C1 ; branch always
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