114 lines
6.9 KiB
Plaintext
Executable File
114 lines
6.9 KiB
Plaintext
Executable File
(module Male_Card-Edge_50_pin__100_mil (layer F.Cu) (tedit 5BA10E74)
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(descr A2_BUS)
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(fp_text reference Ref** (at 0 -5.08) (layer F.SilkS) hide
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(effects (font (size 1.016 0.762) (thickness 0.127)))
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)
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(fp_text value Val** (at 0 5.08) (layer F.SilkS) hide
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(effects (font (size 1.016 0.762) (thickness 0.127)))
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)
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(fp_poly (pts (xy -32.893 -3.81) (xy -31.75 -3.81) (xy -31.75 3.81) (xy -32.893 3.81)) (layer B.Mask) (width 0.001))
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(fp_poly (pts (xy -32.893 -3.81) (xy -31.75 -3.81) (xy -31.75 3.81) (xy -32.893 3.81)) (layer F.Mask) (width 0.001))
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(fp_poly (pts (xy 32.893 -3.81) (xy 31.75 -3.81) (xy 31.75 3.81) (xy 32.893 3.81)) (layer B.Mask) (width 0.001))
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(fp_poly (pts (xy 32.893 -3.81) (xy 31.75 -3.81) (xy 31.75 3.81) (xy 32.893 3.81)) (layer F.Mask) (width 0.001))
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(pad 25 smd rect (at 30.48 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 24 smd rect (at 27.94 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 23 smd rect (at 25.4 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 22 smd rect (at 22.86 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 21 smd rect (at 20.32 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 20 smd rect (at 17.78 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 19 smd rect (at 15.24 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 18 smd rect (at 12.7 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 17 smd rect (at 10.16 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 16 smd rect (at 7.62 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 15 smd rect (at 5.08 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 14 smd rect (at 2.54 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 13 smd rect (at 0 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 12 smd rect (at -2.54 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 11 smd rect (at -5.08 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 10 smd rect (at -7.62 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 9 smd rect (at -10.16 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 8 smd rect (at -12.7 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 7 smd rect (at -15.24 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 6 smd rect (at -17.78 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 5 smd rect (at -20.32 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 4 smd rect (at -22.86 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 3 smd rect (at -25.4 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 2 smd rect (at -27.94 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 1 smd rect (at -30.48 0 270) (size 6.35 1.524) (layers F.Cu F.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 26 smd rect (at 30.48 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 27 smd rect (at 27.94 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 28 smd rect (at 25.4 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 29 smd rect (at 22.86 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 30 smd rect (at 20.32 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 31 smd rect (at 17.78 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 32 smd rect (at 15.24 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 33 smd rect (at 12.7 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 34 smd rect (at 10.16 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 35 smd rect (at 7.62 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 36 smd rect (at 5.08 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 37 smd rect (at 2.54 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 38 smd rect (at 0 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 39 smd rect (at -2.54 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 40 smd rect (at -5.08 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 41 smd rect (at -7.62 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 42 smd rect (at -10.16 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 43 smd rect (at -12.7 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 44 smd rect (at -15.24 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 45 smd rect (at -17.78 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 46 smd rect (at -20.32 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 47 smd rect (at -22.86 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 48 smd rect (at -25.4 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 49 smd rect (at -27.94 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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(pad 50 smd rect (at -30.48 0 270) (size 6.35 1.524) (layers B.Cu B.Mask)
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(solder_mask_margin 0.65) (clearance 0.254))
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)
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