mirror of
https://github.com/osiweb/unified_retro_keyboard.git
synced 2025-02-16 20:31:09 +00:00
4884 lines
432 KiB
Plaintext
4884 lines
432 KiB
Plaintext
(kicad_pcb (version 20211014) (generator pcbnew)
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(general
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(thickness 1.6)
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)
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(paper "B")
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(title_block
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(title "Unified Retro Keyboard")
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(date "2022-11-15")
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(rev "3")
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)
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(layers
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(0 "F.Cu" signal)
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(31 "B.Cu" signal)
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(32 "B.Adhes" user "B.Adhesive")
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(33 "F.Adhes" user "F.Adhesive")
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(34 "B.Paste" user)
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(35 "F.Paste" user)
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(36 "B.SilkS" user "B.Silkscreen")
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(37 "F.SilkS" user "F.Silkscreen")
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(38 "B.Mask" user)
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(39 "F.Mask" user)
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(40 "Dwgs.User" user "User.Drawings")
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(41 "Cmts.User" user "User.Comments")
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(42 "Eco1.User" user "User.Eco1")
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(43 "Eco2.User" user "User.Eco2")
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(44 "Edge.Cuts" user)
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(45 "Margin" user)
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(46 "B.CrtYd" user "B.Courtyard")
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(47 "F.CrtYd" user "F.Courtyard")
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(48 "B.Fab" user)
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(49 "F.Fab" user)
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)
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(setup
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(pad_to_mask_clearance 0)
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(aux_axis_origin 61.4172 179.1081)
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(grid_origin 209.4 88.8)
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(pcbplotparams
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(layerselection 0x00010fc_ffffffff)
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(disableapertmacros false)
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(usegerberextensions true)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(svguseinch false)
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(svgprecision 6)
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(excludeedgelayer true)
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(plotframeref false)
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(viasonmask true)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(dxfpolygonmode true)
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(dxfimperialunits true)
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(dxfusepcbnewfont true)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(sketchpadsonfab false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory "production-package/PCB_dir/outputs")
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)
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)
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(net 0 "")
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(net 1 "GND")
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(net 2 "+5V")
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(net 3 "/Row3")
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(net 4 "/Row0")
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(net 5 "/Row1")
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(net 6 "/Row4")
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(net 7 "/Row5")
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(net 8 "/Row7")
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(net 9 "/D7")
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(net 10 "/D1")
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(net 11 "/D2")
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(net 12 "/D3")
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(net 13 "/D4")
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(net 14 "/D5")
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(net 15 "/D6")
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(net 16 "/Col0")
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(net 17 "/Col1")
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(net 18 "/Col2")
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(net 19 "/Col3")
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(net 20 "/Col4")
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(net 21 "/Col5")
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(net 22 "/Col6")
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(net 23 "/Col7")
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(net 24 "/Row6")
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(net 25 "/Row2")
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(net 26 "/D0")
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(net 27 "Net-(U1-Pad25)")
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(net 28 "Net-(U1-Pad24)")
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(net 29 "Net-(U1-Pad23)")
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(net 30 "/~{STROBE}")
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(net 31 "Net-(U1-Pad14)")
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(net 32 "Net-(U1-Pad26)")
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(net 33 "Net-(U1-Pad16)")
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(net 34 "Net-(U1-Pad15)")
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(net 35 "/Row10")
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(net 36 "/Row9")
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(net 37 "/Row8")
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(net 38 "/Row15")
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(net 39 "/Row14")
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(net 40 "/Row13")
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(net 41 "/Row12")
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(net 42 "/Row11")
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(net 43 "/~{RESET}")
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(net 44 "/Rx")
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(net 45 "Net-(D9-Pad1)")
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(net 46 "Net-(D12-Pad1)")
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(net 47 "Net-(D13-Pad1)")
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(net 48 "Net-(D14-Pad1)")
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(net 49 "Net-(D15-Pad1)")
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(net 50 "Net-(D16-Pad1)")
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(net 51 "Net-(D17-Pad1)")
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(net 52 "Net-(D18-Pad1)")
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(net 53 "Net-(D19-Pad1)")
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(net 54 "Net-(D20-Pad1)")
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(net 55 "Net-(D24-Pad1)")
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(net 56 "Net-(D3-Pad1)")
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(net 57 "Net-(D4-Pad1)")
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(net 58 "Net-(D5-Pad1)")
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(net 59 "Net-(D6-Pad1)")
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(net 60 "Net-(D7-Pad1)")
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(net 61 "Net-(D8-Pad1)")
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(net 62 "Net-(D10-Pad1)")
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(net 63 "Net-(D11-Pad1)")
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(net 64 "Net-(D1-Pad1)")
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(net 65 "Net-(D2-Pad1)")
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(net 66 "unconnected-(J1-Pad4)")
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(net 67 "unconnected-(J1-Pad9)")
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(net 68 "unconnected-(J1-Pad14)")
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(net 69 "unconnected-(J1-Pad15)")
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(net 70 "unconnected-(J1-Pad16)")
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(net 71 "unconnected-(J2-Pad10)")
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(net 72 "unconnected-(J2-Pad11)")
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(net 73 "unconnected-(J2-Pad13)")
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(net 74 "unconnected-(J6-Pad26)")
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(net 75 "unconnected-(J6-Pad28)")
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(net 76 "unconnected-(J6-Pad30)")
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(net 77 "unconnected-(J6-Pad32)")
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(net 78 "/Tx")
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(net 79 "Net-(J6-Pad16)")
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(net 80 "Net-(J6-Pad24)")
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(net 81 "/LED1")
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(net 82 "unconnected-(U5-Pad6)")
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(net 83 "unconnected-(U5-Pad8)")
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(net 84 "unconnected-(U5-Pad10)")
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(net 85 "/OUT1")
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(net 86 "/OUT2")
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(net 87 "/OUT3")
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(net 88 "/MOSI-OUT2")
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(net 89 "/SCK-LED2")
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(net 90 "/MISO-LED3")
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(net 91 "Net-(D21-Pad1)")
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(net 92 "Net-(D22-Pad1)")
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(net 93 "Net-(D23-Pad1)")
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(net 94 "Net-(D25-Pad2)")
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(net 95 "Net-(D26-Pad2)")
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(net 96 "Net-(D27-Pad2)")
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(footprint "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" (layer "F.Cu")
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(tedit 5AE50EF0) (tstamp 00000000-0000-0000-0000-00005d0d6fb5)
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(at 181.587 115.216 -90)
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(descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 2.50mm diameter 3.0mm width 1.6mm Capacitor")
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(property "Fitted" "Y")
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(property "Label" "0.1 uF")
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(property "Manufacturer" "Murata")
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(property "Manufacturer PN" "RCER71E104K0A2H3B")
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(property "May substitute" "Y")
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(property "Part Value" "0.1 uF")
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(property "Sheetfile" "File: interface-ascii.kicad_sch")
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(property "Sheetname" "")
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(path "/00000000-0000-0000-0000-00005bfe9d13")
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(attr through_hole)
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(fp_text reference "C2" (at -2.159 0.762 90) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 4d005b84-55ae-4327-aa98-1e5a46004359)
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)
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(fp_text value "0.1 uF" (at -3.556 2.286 90) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp bcb721bd-4a1f-4e87-89e9-9059472e0ae7)
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)
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(fp_text user "${REFERENCE}" (at 4.191 -0.635 180) (layer "F.SilkS") hide
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(effects (font (size 0.9 0.9) (thickness 0.135)))
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(tstamp 89d8c16b-f6df-4c63-9887-127f13fe43c1)
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)
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(fp_line (start 0.621 -0.92) (end 1.879 -0.92) (layer "F.SilkS") (width 0.12) (tstamp 074e41d4-e171-4201-9bb8-0a31a889235a))
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(fp_line (start 0.621 0.92) (end 1.879 0.92) (layer "F.SilkS") (width 0.12) (tstamp cdad7beb-d5c3-460f-98ff-104b0df0c1dd))
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(fp_line (start -1.05 1.05) (end 3.55 1.05) (layer "F.CrtYd") (width 0.05) (tstamp 17dddcac-6f31-431f-a23e-8891c09dd012))
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(fp_line (start 3.55 -1.05) (end -1.05 -1.05) (layer "F.CrtYd") (width 0.05) (tstamp 1bd996be-e46e-4679-a1ec-b5b8cac65d7b))
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(fp_line (start 3.55 1.05) (end 3.55 -1.05) (layer "F.CrtYd") (width 0.05) (tstamp 6d9214d4-79e1-47cc-8e0f-46bad394906c))
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(fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer "F.CrtYd") (width 0.05) (tstamp bd41ad14-3487-4ead-8557-71a28d4a0c08))
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(fp_line (start -0.25 -0.8) (end -0.25 0.8) (layer "F.Fab") (width 0.1) (tstamp 440b77f5-4544-4901-9640-7d7e8b5d50f1))
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(fp_line (start 2.75 0.8) (end 2.75 -0.8) (layer "F.Fab") (width 0.1) (tstamp 6f1e2464-9f73-4f9c-81b4-d4be616cb9dc))
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(fp_line (start -0.25 0.8) (end 2.75 0.8) (layer "F.Fab") (width 0.1) (tstamp 8f561c9e-b46d-45a9-88cf-92432287a569))
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(fp_line (start 2.75 -0.8) (end -0.25 -0.8) (layer "F.Fab") (width 0.1) (tstamp fdc5a210-2706-4124-b176-fff1561c8e81))
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(pad "1" thru_hole circle locked (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 2 "+5V") (pintype "passive") (tstamp b54cfc11-6229-439e-af3c-892484c314de))
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(pad "2" thru_hole circle locked (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 "GND") (pintype "passive") (tstamp 48fb2def-f84d-4041-8246-9721811027d2))
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(model "${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.0mm_W1.6mm_P2.50mm.wrl"
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(offset (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(footprint "Package_DIP:DIP-16_W7.62mm_Socket" (layer "F.Cu")
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(tedit 5A02E8C5) (tstamp 00000000-0000-0000-0000-00005d0d78ad)
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(at 184.390166 77.37 90)
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(descr "16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket")
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(tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket")
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(property "BOM Comment" "Install for Apple 2. Dual Wipe recommended to reduce insertion force")
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(property "Fitted" "Y")
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(property "Label" "Apple 1")
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(property "Manufacturer" "3M")
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(property "Manufacturer PN" "4816-3000-CP")
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(property "May substitute" "Y")
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(property "Part Value" "16-pin Dual-wipe DIP socket")
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(property "Sheetfile" "File: interface-ascii.kicad_sch")
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(property "Sheetname" "")
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(path "/00000000-0000-0000-0000-00005bcb9e1d")
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(attr through_hole)
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(fp_text reference "J2" (at 8.255 -2.549166 270) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp b4aad4ca-6e7b-4044-bc40-c69034ab8950)
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)
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(fp_text value "Apple 1" (at 10.5156 3.445234 180) (layer "F.SilkS")
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(effects (font (size 1.27 1.27) (thickness 0.15)))
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(tstamp d778f708-b866-4bce-bf04-c7b2f821565e)
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)
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(fp_text user "${REFERENCE}" (at 9.50214 -0.78486 180) (layer "F.SilkS") hide
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 240e410c-b5d3-406e-a7aa-dcc6a53b5f9c)
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)
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(fp_line (start 1.16 -1.33) (end 1.16 19.11) (layer "F.SilkS") (width 0.12) (tstamp 082eb085-fea6-4ed2-81e0-037a8dbcb967))
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(fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer "F.SilkS") (width 0.12) (tstamp 3ae1cad5-c8e3-4598-8ffe-1cc177310890))
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(fp_line (start 6.46 19.11) (end 6.46 -1.33) (layer "F.SilkS") (width 0.12) (tstamp 634081d5-a36f-4e78-b5b9-db8aa70fcda7))
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(fp_line (start 8.95 19.17) (end 8.95 -1.39) (layer "F.SilkS") (width 0.12) (tstamp 6b3a99ba-b7f0-446a-8c3a-dc9561e18423))
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(fp_line (start 1.16 19.11) (end 6.46 19.11) (layer "F.SilkS") (width 0.12) (tstamp 7761bdb5-f4cc-4636-ba40-2077e49e0161))
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(fp_line (start -1.33 -1.39) (end -1.33 19.17) (layer "F.SilkS") (width 0.12) (tstamp acd28162-be5d-41a1-b4f1-02b48da3d668))
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(fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer "F.SilkS") (width 0.12) (tstamp afca0931-40ea-4d17-9668-15d2dfeccd13))
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(fp_line (start -1.33 19.17) (end 8.95 19.17) (layer "F.SilkS") (width 0.12) (tstamp b9ae56a0-fecc-4f17-8490-be4570cbfc9c))
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(fp_line (start 8.95 -1.39) (end -1.33 -1.39) (layer "F.SilkS") (width 0.12) (tstamp bf73c9bd-f88d-49b9-b1e6-d74bb268e458))
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(fp_arc (start 4.81 -1.33) (mid 3.81 -0.33) (end 2.81 -1.33) (layer "F.SilkS") (width 0.12) (tstamp 0bd9e639-134b-4e75-96bc-4c4c51a22bc8))
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(fp_line (start -1.55 19.4) (end 9.15 19.4) (layer "F.CrtYd") (width 0.05) (tstamp 339ffe26-b98e-417c-ab1f-4079a12f1c2f))
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(fp_line (start 9.15 19.4) (end 9.15 -1.6) (layer "F.CrtYd") (width 0.05) (tstamp 352ee01d-fcef-4893-8498-286f4db11646))
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(fp_line (start -1.55 -1.6) (end -1.55 19.4) (layer "F.CrtYd") (width 0.05) (tstamp 79f9a297-c01a-4216-bb9f-083a8e175fa5))
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(fp_line (start -1.27 -1.33) (end -1.27 19.11) (layer "F.Fab") (width 0.1) (tstamp 00392068-470c-4182-bfe4-143e64e57f6c))
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(fp_line (start 6.985 -1.27) (end 6.985 19.05) (layer "F.Fab") (width 0.1) (tstamp 4a06143c-294d-4e70-903f-af2d22264a9c))
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(fp_line (start 0.635 19.05) (end 0.635 -0.27) (layer "F.Fab") (width 0.1) (tstamp 920d5296-d6c6-49b1-90b0-bd74fa2eb008))
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(fp_line (start 6.985 19.05) (end 0.635 19.05) (layer "F.Fab") (width 0.1) (tstamp c0e9d970-73af-4a28-b40e-c7c34a7c570e))
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(fp_line (start -1.27 19.11) (end 8.89 19.11) (layer "F.Fab") (width 0.1) (tstamp cf04a0ae-4faa-4c60-8ccf-89a2da0e0ac8))
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(fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer "F.Fab") (width 0.1) (tstamp edd92dc6-218b-4c1d-b2aa-bf85f7853b1b))
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(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer "F.Fab") (width 0.1) (tstamp f1e2ad4d-5561-4ea9-ab20-71af6b8b8951))
|
|
(pad "1" thru_hole rect locked (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 87 "/OUT3") (pinfunction "Pin_1") (pintype "passive") (tstamp d56feb55-df7c-4abb-895a-a7d8b9264921))
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|
(pad "2" thru_hole oval locked (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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|
(net 12 "/D3") (pinfunction "Pin_2") (pintype "passive") (tstamp e6130a68-0450-46a9-814f-9eb4cf2bc83e))
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|
(pad "3" thru_hole oval locked (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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|
(net 11 "/D2") (pinfunction "Pin_3") (pintype "passive") (tstamp 1e3b212c-b29d-4ea7-82fc-902922902c46))
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(pad "4" thru_hole oval locked (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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|
(net 10 "/D1") (pinfunction "Pin_4") (pintype "passive") (tstamp b44f7a25-6b96-4e36-a595-6d33433baa2d))
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(pad "5" thru_hole oval locked (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 26 "/D0") (pinfunction "Pin_5") (pintype "passive") (tstamp 5ee2e988-685a-419f-ab68-7cf22cd0f923))
|
|
(pad "6" thru_hole oval locked (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 13 "/D4") (pinfunction "Pin_6") (pintype "passive") (tstamp fa56060d-eacd-491e-b95c-cfaa6c92550b))
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|
(pad "7" thru_hole oval locked (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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|
(net 14 "/D5") (pinfunction "Pin_7") (pintype "passive") (tstamp d734b332-88d3-4f52-900f-f2adb8f3fab5))
|
|
(pad "8" thru_hole oval locked (at 0 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(footprint "Package_DIP:DIP-14_W7.62mm" (layer "F.Cu")
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(tedit 5A02E8C5) (tstamp 00000000-0000-0000-0000-00005e0f3819)
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(at 192.89 94.896 90)
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(descr "14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)")
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(tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil")
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(property "Fitted" "Y")
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(property "Label" "74LS04")
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(property "Manufacturer" "Texas Instruments")
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(property "Manufacturer PN" "SN74LS04N")
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(property "May substitute" "Y")
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(property "Part Value" "74LS04")
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(property "Sheetfile" "File: interface-ascii.kicad_sch")
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(property "Sheetname" "")
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(path "/00000000-0000-0000-0000-00005ee70d7e")
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(attr through_hole)
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(pad "1" thru_hole rect locked (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 90 "/MISO-LED3") (pintype "input") (tstamp 0b197f55-c2ad-4d9c-b27c-c283dcbe0afa))
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(pad "2" thru_hole oval locked (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 80 "Net-(J6-Pad24)") (pintype "output") (tstamp 17df23da-2fc0-4f7f-975e-a2166b9616e2))
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(pad "3" thru_hole oval locked (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 89 "/SCK-LED2") (pintype "input") (tstamp d75aee93-6a36-46e5-b870-0944ce5aa700))
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(pad "4" thru_hole oval locked (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 79 "Net-(J6-Pad16)") (pintype "output") (tstamp 2c9284aa-3b3a-4861-9c76-e7353072dbeb))
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(pad "5" thru_hole oval locked (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 "GND") (pintype "input") (tstamp 844ee5f4-5cb5-4e26-8cd0-cc5c755af67a))
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(pad "6" thru_hole oval locked (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 82 "unconnected-(U5-Pad6)") (pintype "output+no_connect") (tstamp 3e314877-a4a1-4b3e-bfb5-2df144b312fd))
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(pad "7" thru_hole oval locked (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 58f4240d-63e5-4288-af06-9231e2d9490a))
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(pad "8" thru_hole oval locked (at 7.62 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 83 "unconnected-(U5-Pad8)") (pintype "output+no_connect") (tstamp db34db2b-5ad9-4aa7-83da-1b9e189c508f))
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(pad "9" thru_hole oval locked (at 7.62 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 "GND") (pintype "input") (tstamp 927c1e6d-e18f-4a65-81b1-2c3a828d8559))
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(pad "10" thru_hole oval locked (at 7.62 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 84 "unconnected-(U5-Pad10)") (pintype "output+no_connect") (tstamp e98df9e9-7031-43d3-9340-91a8fe0e99a8))
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(pad "11" thru_hole oval locked (at 7.62 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 "GND") (pintype "input") (tstamp 0a6ba170-76bf-4a13-9b2c-67659f20f120))
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(pad "12" thru_hole oval locked (at 7.62 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 86 "/OUT2") (pintype "output") (tstamp 406d02ca-23c5-4b0a-85e9-0bd334453588))
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(pad "13" thru_hole oval locked (at 7.62 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 88 "/MOSI-OUT2") (pintype "input") (tstamp cc70b7d6-584e-476f-a763-74b935dd317a))
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(pad "14" thru_hole oval locked (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 2 "+5V") (pinfunction "VCC") (pintype "power_in") (tstamp 1ecca7fc-a75e-4b42-8550-769860e01d57))
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(model "${KISYS3DMOD}/Package_DIP.3dshapes/DIP-14_W7.62mm.wrl"
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(offset (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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(footprint "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" (layer "F.Cu")
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(tedit 5AE50EF0) (tstamp 00000000-0000-0000-0000-00005e0f57bb)
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(at 187.81 89.562 -90)
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(descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 2.50mm diameter 3.0mm width 1.6mm Capacitor")
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(property "Fitted" "Y")
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(property "Label" "0.1 uF")
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(property "Manufacturer" "Murata")
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(property "Manufacturer PN" "RCER71E104K0A2H3B")
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(property "May substitute" "Y")
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(property "Part Value" "0.1 uF")
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(property "Sheetfile" "File: interface-ascii.kicad_sch")
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(property "Sheetname" "")
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(path "/00000000-0000-0000-0000-00005e4f4413")
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(attr through_hole)
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(fp_text reference "C5" (at 4.572 0 90) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 930f5827-9d17-4888-98fd-a81f7edaa8d4)
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)
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(fp_text value "0.1 uF" (at 3.556 2.05 90) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 63d73c52-4b7c-40d8-94ab-df2152acb7d4)
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)
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(fp_text user "${REFERENCE}" (at 1.25 0 90) (layer "F.Fab")
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(effects (font (size 0.6 0.6) (thickness 0.09)))
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(pad "1" thru_hole circle locked (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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