2017-12-22 21:24:30 +00:00
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NEW
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2017-03-29 15:48:15 +00:00
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PREFIX /A2OSX.BUILD
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2017-12-22 21:24:30 +00:00
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AUTO 4,1
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2016-01-10 22:16:07 +00:00
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.LIST OFF
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.OP 65C02
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.OR $2000
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2017-03-29 15:48:15 +00:00
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.TF /A2OSX.BUILD/DRV/LANCEGS.DRV
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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2017-03-29 15:48:15 +00:00
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.INB /A2OSX.BUILD/INC/MACROS.I
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.INB /A2OSX.BUILD/INC/A2OSX.I
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2017-04-17 19:36:00 +00:00
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.INB /A2OSX.BUILD/INC/MLI.ERR.I
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2017-12-22 21:24:30 +00:00
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.INB /A2OSX.BUILD/INC/NIC.I
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.INB /A2OSX.BUILD/INC/NIC.91C96.I
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2017-03-29 15:48:15 +00:00
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.INB /A2OSX.BUILD/INC/LIBTCPIP.I
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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ZPTmpPTR .EQ ZPDRV
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2017-10-27 14:56:46 +00:00
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Size .EQ ZPDRV+2
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2017-04-27 20:08:12 +00:00
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Counter .EQ ZPDRV+4
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* File Header (16 Bytes)
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*--------------------------------------
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CS.START cld
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jmp Dev.Detect cld,jmp abs=DRV
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.DA #$61 6502,Level 1 (65c02)
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.DA #1 DRV Layout Version 1
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.DA 0
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.DA CS.END-CS.START Code Length
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.DA DEV.HEADER-CS.START Device Header Offset
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.DA DRV.CS.START-CS.START Driver Code Offset
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.DA DRV.CS.END-DRV.CS.START Drv Code Length
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*--------------------------------------
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* Relocation Table
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*--------------------------------------
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L.MSG.DETECT .DA MSG.DETECT
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L.MSG.DETECT.OK .DA MSG.DETECT.OK
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L.MSG.DETECT.KO .DA MSG.DETECT.KO
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L.DEV.HEADER.NAME .DA DEV.HEADER.NAME
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.DA 0 End Of Reloc Table
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*--------------------------------------
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2016-10-17 15:47:50 +00:00
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Dev.Detect >STYA Args
|
2016-01-10 22:16:07 +00:00
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>LDYA L.MSG.DETECT
|
2018-06-21 15:12:10 +00:00
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>SYSCALL printf
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2016-01-10 22:16:07 +00:00
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2017-04-17 19:36:00 +00:00
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ldx #$70
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2017-04-27 20:08:12 +00:00
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ldy #7
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2017-04-17 19:36:00 +00:00
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2017-10-19 15:27:38 +00:00
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.1 lda A2osX.S,y IO based detection, avoid scanning in Disk Controller IO!!!!
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2017-04-17 19:36:00 +00:00
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bne .2
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lda L91C96.BSR+1,x
|
2016-01-10 22:16:07 +00:00
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cmp #DEVID
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2016-03-30 15:54:47 +00:00
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beq .3
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2016-01-10 22:16:07 +00:00
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2018-06-12 10:19:53 +00:00
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.2 dec DEV.HEADER.NAME+3
|
2016-01-10 22:16:07 +00:00
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txa
|
2017-04-17 19:36:00 +00:00
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sec
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sbc #$10
|
2016-01-10 22:16:07 +00:00
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tax
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2017-04-27 20:08:12 +00:00
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dey
|
2017-04-17 19:36:00 +00:00
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bne .1
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2016-01-10 22:16:07 +00:00
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>LDYA L.MSG.DETECT.KO
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2018-06-21 15:12:10 +00:00
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>SYSCALL printf
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2016-01-10 22:16:07 +00:00
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2017-10-26 16:01:54 +00:00
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lda #MLI.E.NODEV
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2016-01-10 22:16:07 +00:00
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sec
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rts
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.3 stx DEVSLOTx0
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2017-10-19 15:27:38 +00:00
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lda #A2osX.S.NIC
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sta A2osX.S,y
|
2017-04-17 19:36:00 +00:00
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2016-10-17 15:47:50 +00:00
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>LDYA ARGS
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>STYA ZPTmpPTR
|
2018-06-12 10:19:53 +00:00
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2016-10-17 15:47:50 +00:00
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lda (ZPTmpPTR)
|
2016-01-10 22:16:07 +00:00
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beq .4
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2016-10-17 15:47:50 +00:00
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2016-03-13 22:07:01 +00:00
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sec
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ror USERMAC
|
2018-07-18 15:30:42 +00:00
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>SYSCALL GetMemPtr
|
2016-01-10 22:16:07 +00:00
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>STYA ZPTmpPTR
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jsr DecodeMac
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bcc .4
|
2017-10-26 16:01:54 +00:00
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lda #K.E.SYN
|
2016-01-10 22:16:07 +00:00
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sec
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rts
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2016-10-17 15:47:50 +00:00
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.4 >PUSHW L.DEV.HEADER.NAME
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>LDYA L.MSG.DETECT.OK
|
2018-06-21 15:12:10 +00:00
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>SYSCALL printf
|
2016-01-10 22:16:07 +00:00
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clc
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rts
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*--------------------------------------
|
2017-04-17 19:36:00 +00:00
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.INB /A2OSX.SRC/DRV/X.NET.DRV.S
|
2016-01-10 22:16:07 +00:00
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|
*--------------------------------------
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CS.END
|
2018-04-11 15:35:51 +00:00
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MSG.DETECT .AZ "LanCeGS/SMSC91C96 Driver.\r\n"
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MSG.DETECT.OK .AZ "LanCeGS/SMSC91C96 Installed As Device : %S\r\n"
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MSG.DETECT.KO .AZ "Hardware Not Found.\r\n"
|
2016-10-17 15:47:50 +00:00
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|
Args .BS 2
|
2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* Device Header (16 Bytes)
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*--------------------------------------
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DEV.HEADER cld
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jmp (DRV.CS.START,x)
|
2017-04-17 19:36:00 +00:00
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.DA #0
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.BS 6
|
2018-04-11 15:35:51 +00:00
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DEV.HEADER.NAME .AZ "ETH7"
|
2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* Driver Code
|
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*--------------------------------------
|
2017-04-17 19:36:00 +00:00
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DRV.CS.START .DA STATUS
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.DA READBLOCK
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.DA WRITEBLOCK
|
2017-07-06 15:30:40 +00:00
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.DA A2osX.BADCALL
|
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.DA A2osX.BADCALL
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.DA A2osX.BADCALL
|
2017-04-17 19:36:00 +00:00
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.DA OPEN
|
2016-01-10 22:16:07 +00:00
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.DA CLOSE
|
2017-07-06 15:30:40 +00:00
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.DA A2osX.BADCALL
|
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.DA A2osX.BADCALL
|
2017-04-17 19:36:00 +00:00
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L.DEVSTAT .DA DEVSTAT
|
2016-01-10 22:16:07 +00:00
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|
.DA 0 end or relocation
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|
*--------------------------------------
|
2017-12-22 21:24:30 +00:00
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|
STATUS lda #S.DSTAT.NIC.STATUS.10
|
2017-04-17 19:36:00 +00:00
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sta LINK.STATUS
|
2016-03-13 22:07:01 +00:00
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2017-04-17 19:36:00 +00:00
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ldx DEVSLOTx0
|
2016-03-13 22:07:01 +00:00
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2017-04-17 19:36:00 +00:00
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stz L91C96.BSR,x
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lda L91C96.0.EPHSR,x
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lda L91C96.0.EPHSR+1,x
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and /L91C96.0.EPHSR.LINK
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beq .1
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lda LINK.STATUS
|
2017-12-22 21:24:30 +00:00
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ora #S.DSTAT.NIC.STATUS.OK
|
2017-04-17 19:36:00 +00:00
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sta LINK.STATUS
|
2016-03-13 22:07:01 +00:00
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2017-04-17 19:36:00 +00:00
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.1 lda L91C96.0.TCR,x
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lda L91C96.0.TCR+1,x
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and /L91C96.0.TCR.FDSE
|
2016-03-13 22:07:01 +00:00
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bne .2
|
2017-04-17 19:36:00 +00:00
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lda LINK.STATUS
|
2017-12-22 21:24:30 +00:00
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ora #S.DSTAT.NIC.STATUS.FD
|
2017-04-17 19:36:00 +00:00
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sta LINK.STATUS
|
2016-03-13 22:07:01 +00:00
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2017-04-17 19:36:00 +00:00
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.2 >LDYA L.DEVSTAT
|
2016-01-10 22:16:07 +00:00
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clc
|
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|
rts
|
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*--------------------------------------
|
2017-04-17 19:36:00 +00:00
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READBLOCK ldx DEVSLOTx0
|
2016-03-13 22:07:01 +00:00
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|
lda #2
|
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sta L91C96.BSR,x
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lda L91C96.2.IST,x
|
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and #L91C96.2.IST.RCV
|
2017-04-17 19:36:00 +00:00
|
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bne READBLOCK.RxOK
|
2016-03-20 22:12:57 +00:00
|
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lda #ERR.DEV.NOFRAME
|
2016-03-13 22:07:01 +00:00
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sec
|
2016-01-10 22:16:07 +00:00
|
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rts
|
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2017-04-17 19:36:00 +00:00
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READBLOCK.RxOK lda #L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
|
2016-03-13 22:07:01 +00:00
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sta L91C96.2.PTR,x
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lda /L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
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sta L91C96.2.PTR+1,x
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|
2016-03-30 15:54:47 +00:00
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lda L91C96.2.DATA,x Get Frame Status Word (lo)
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lda L91C96.2.DATA,x Get Frame Status Word (HI)
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2017-04-17 19:36:00 +00:00
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asl
|
2016-03-30 15:54:47 +00:00
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asl
|
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asl #$10 = odd?
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asl if odd, CS
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lda L91C96.2.DATA,x get lo byte count
|
2017-04-27 20:08:12 +00:00
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|
sbc #5 compute Size
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sta Size
|
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|
eor #$ff
|
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sta Counter
|
2016-03-13 22:07:01 +00:00
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tay
|
2017-04-27 20:08:12 +00:00
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2016-03-30 15:54:47 +00:00
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lda L91C96.2.DATA,x get hi byte count
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sbc #0
|
2017-04-27 20:08:12 +00:00
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sta Size+1
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eor #$ff
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sta Counter+1
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eor #$ff
|
2016-03-13 22:07:01 +00:00
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|
2016-03-30 15:54:47 +00:00
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|
iny
|
|
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bne .1
|
2017-04-17 19:36:00 +00:00
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2016-03-30 15:54:47 +00:00
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inc
|
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.1 iny
|
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bne .11
|
2017-04-17 19:36:00 +00:00
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2016-03-30 15:54:47 +00:00
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inc
|
2017-08-25 06:37:21 +00:00
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|
.11 >SYSCALL GetMem.YA
|
2016-03-13 22:07:01 +00:00
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|
bcs .99
|
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|
>STYA ZPTmpPTR
|
2017-04-17 19:36:00 +00:00
|
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|
stx .8+1
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sty .8+3
|
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|
sta .8+5
|
2016-03-13 22:07:01 +00:00
|
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|
2017-04-27 20:08:12 +00:00
|
|
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|
lda Size
|
2016-03-30 15:54:47 +00:00
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|
sta (ZPTmpPTR)
|
|
|
|
|
ldy #1
|
2017-04-27 20:08:12 +00:00
|
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|
lda Size+1
|
2016-03-13 22:07:01 +00:00
|
|
|
|
sta (ZPTmpPTR),y
|
2016-03-30 15:54:47 +00:00
|
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|
2016-03-13 22:07:01 +00:00
|
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|
iny
|
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ldx DEVSLOTx0
|
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|
2017-04-27 20:08:12 +00:00
|
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|
.2 inc Counter
|
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|
bne .21
|
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|
inc Counter+1
|
2017-04-17 19:36:00 +00:00
|
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|
beq .4
|
2017-04-27 20:08:12 +00:00
|
|
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|
.21 lda L91C96.2.DATA,x
|
2016-03-13 22:07:01 +00:00
|
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|
sta (ZPTmpPTR),y
|
|
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|
iny
|
|
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|
bne .3
|
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|
|
inc ZPTmpPTR+1
|
2017-04-27 20:08:12 +00:00
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|
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|
.3 inc Counter
|
|
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|
bne .31
|
|
|
|
|
inc Counter+1
|
2017-04-17 19:36:00 +00:00
|
|
|
|
beq .4
|
2017-04-27 20:08:12 +00:00
|
|
|
|
|
|
|
|
|
.31 lda L91C96.2.DATA,x
|
2016-03-13 22:07:01 +00:00
|
|
|
|
sta (ZPTmpPTR),y
|
|
|
|
|
iny
|
|
|
|
|
bne .2
|
|
|
|
|
inc ZPTmpPTR+1
|
|
|
|
|
bra .2
|
|
|
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|
|
2017-04-17 19:36:00 +00:00
|
|
|
|
.4 lda #L91C96.2.MMUCR.REMREL
|
2016-03-13 22:07:01 +00:00
|
|
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|
sta L91C96.2.MMUCR,x
|
|
|
|
|
|
2017-04-17 19:36:00 +00:00
|
|
|
|
.8 ldx #$ff hMem
|
|
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|
ldy #$ff PtrLO
|
|
|
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|
lda #$ff PtrHI
|
2016-01-10 22:16:07 +00:00
|
|
|
|
clc
|
2017-04-17 19:36:00 +00:00
|
|
|
|
.99 rts
|
2016-01-10 22:16:07 +00:00
|
|
|
|
*--------------------------------------
|
2017-04-17 19:36:00 +00:00
|
|
|
|
WRITEBLOCK >STYA ZPTmpPTR
|
2016-03-13 22:07:01 +00:00
|
|
|
|
|
|
|
|
|
ldx DEVSLOTx0
|
|
|
|
|
lda #2
|
|
|
|
|
sta L91C96.BSR,x
|
|
|
|
|
|
|
|
|
|
lda (ZPTmpPTR)
|
2017-04-27 20:08:12 +00:00
|
|
|
|
sta Size
|
|
|
|
|
eor #$ff
|
|
|
|
|
sta Counter
|
|
|
|
|
eor #$ff
|
|
|
|
|
|
2016-01-10 22:16:07 +00:00
|
|
|
|
clc
|
2016-03-13 22:07:01 +00:00
|
|
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adc #6 3 WORDs more Status, len & Control
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2016-03-31 20:07:47 +00:00
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bne .10
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clc LO byte is 0, no need for an extra empty page
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2016-03-24 17:02:50 +00:00
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2016-03-31 20:07:47 +00:00
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.10 ldy #1
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2016-03-13 22:07:01 +00:00
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lda (ZPTmpPTR),y
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2017-04-27 20:08:12 +00:00
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sta Size+1
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eor #$ff
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sta Counter+1
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eor #$ff
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2016-03-13 22:07:01 +00:00
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adc #0
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.1 ora #L91C96.2.MMUCR.ALLOC
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sta L91C96.2.MMUCR,x
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ldy #0
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.2 lda L91C96.2.IST,x
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and #L91C96.2.IST.ALLOC
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bne .3
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dey
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bne .2
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2016-03-20 22:12:57 +00:00
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lda #ERR.DEV.NOBUFFER
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2016-03-13 22:07:01 +00:00
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sec
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rts
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.3 lda L91C96.2.AAR,x
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sta L91C96.2.PNR,x
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2016-03-30 06:30:41 +00:00
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lda #L91C96.2.PTR.AUTOI
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.PTR,x
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2016-03-30 06:30:41 +00:00
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lda /L91C96.2.PTR.AUTOI
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.PTR+1,x
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2016-03-30 06:30:41 +00:00
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ldy #S.ETH.SRCMAC+5 Add Src MAC Address
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2016-03-13 22:07:01 +00:00
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ldx #5
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.4 lda MAC,x
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sta (ZPTmpPTR),y
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dey
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dex
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bpl .4
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ldx DEVSLOTx0
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2016-03-30 15:54:47 +00:00
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stz L91C96.2.DATA,x write fake status word
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2016-03-30 06:30:41 +00:00
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stz L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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2017-04-27 20:08:12 +00:00
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lda Size
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2016-03-13 22:07:01 +00:00
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pha
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2016-03-30 15:54:47 +00:00
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eor #$01
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2016-03-13 22:07:01 +00:00
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lsr
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pla
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2016-03-30 15:54:47 +00:00
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adc #$05 add 5 if odd, 6 if even
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.DATA,x
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2017-04-27 20:08:12 +00:00
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lda Size+1
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2016-03-30 15:54:47 +00:00
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adc #$00
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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ldy #2
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2017-04-27 20:08:12 +00:00
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.5 inc Counter
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bne .51
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inc Counter+1
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2016-03-13 22:07:01 +00:00
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beq .70
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2017-04-27 20:08:12 +00:00
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.51 lda (ZPTmpPTR),y
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2016-03-13 22:07:01 +00:00
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iny
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bne .6
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inc ZPTmpPTR+1
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2017-04-27 20:08:12 +00:00
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.6 inc Counter
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bne .61
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inc Counter+1
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2016-03-13 22:07:01 +00:00
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beq .71
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2017-04-27 20:08:12 +00:00
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.61 sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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lda (ZPTmpPTR),y
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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iny
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bne .5
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inc ZPTmpPTR+1
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bra .5
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.70 lda #0
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sta L91C96.2.DATA,x
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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bra .8
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2017-04-27 20:08:12 +00:00
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.71 sta L91C96.2.DATA,x
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2016-03-30 15:54:47 +00:00
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lda #%00100000 signal an extra (odd) byte
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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.8 lda #L91C96.2.MMUCR.NQPKT
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sta L91C96.2.MMUCR,x
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clc
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rts
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.9 sec
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rts
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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2017-04-17 19:36:00 +00:00
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OPEN jsr CLOSE
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lda #L91C96.0.TCR.FDSE+L91C96.0.TCR.FUDPLX+L91C96.0.TCR.PADEN+L91C96.0.TCR.TXENA
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sta L91C96.0.TCR,x
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lda /L91C96.0.TCR.FDSE+L91C96.0.TCR.FUDPLX+L91C96.0.TCR.PADEN+L91C96.0.TCR.TXENA
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sta L91C96.0.TCR+1,x
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lda #L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
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sta L91C96.0.RCR+1,x
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lda #1
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sta L91C96.BSR,x
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lda #L91C96.1.CR.NOWAIT
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sta L91C96.1.CR,x
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lda /L91C96.1.CR.NOWAIT
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sta L91C96.1.CR+1,x
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ldy #0
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bit USERMAC
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bmi .2
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.1 lda L91C96.1.IAR,x
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sta MAC,y
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inx
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iny
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cpy #6
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bne .1
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bra .3
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.2 lda MAC,y
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sta L91C96.1.IAR,x
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inx
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iny
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cpy #6
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bne .2
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.3 ldx DEVSLOTx0
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lda #L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
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sta L91C96.1.CTR,x
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lda /L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
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sta L91C96.1.CTR+1,x
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clc
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rts
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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2017-04-17 19:36:00 +00:00
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CLOSE ldx DEVSLOTx0
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2016-03-30 15:54:47 +00:00
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stz L91C96.BSR,x
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2016-03-13 22:07:01 +00:00
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lda #L91C96.0.RCR.RESET
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.RESET
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sta L91C96.0.RCR+1,x
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lda $C019 we can use VBL as we are not on //c
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.1 eor $C019
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bpl .1
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2016-03-30 15:54:47 +00:00
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lda $C019
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2016-03-13 22:07:01 +00:00
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.2 eor $C019
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bpl .2
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2016-03-30 15:54:47 +00:00
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stz L91C96.0.RCR,x
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stz L91C96.0.RCR+1,x
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2017-04-17 19:36:00 +00:00
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clc
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2016-01-10 22:16:07 +00:00
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rts
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*--------------------------------------
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DRV.CS.END
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DEVSLOTx0 .BS 1
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2016-03-13 22:07:01 +00:00
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USERMAC .BS 1
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2017-04-17 19:36:00 +00:00
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*--------------------------------------
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DEVSTAT .DA #0
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.BS 3 size
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>PSTR "LanCEGS/L91C96"
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.BS 1
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2017-10-27 06:36:46 +00:00
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.DA #S.DSTAT.T.NET
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2017-04-17 19:36:00 +00:00
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.BS 1 Subtype
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.BS 2 Version
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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2017-04-17 19:36:00 +00:00
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FLAGS .DA #0
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2016-03-13 22:07:01 +00:00
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LINK.STATUS .BS 1 OK/DUPLEX/SPEED
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2017-04-17 19:36:00 +00:00
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MAC .BS 6
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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MAN
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2017-04-17 19:36:00 +00:00
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SAVE /A2OSX.SRC/DRV/LANCEGS.DRV.S
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2016-01-10 22:16:07 +00:00
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ASM
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