2017-12-22 21:24:30 +00:00
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NEW
|
2019-05-02 09:52:32 +00:00
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AUTO 3,1
|
2016-01-10 22:16:07 +00:00
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.LIST OFF
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.OP 65C02
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.OR $2000
|
2018-07-23 15:28:42 +00:00
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.TF DRV/LANCEGS.DRV
|
2016-01-10 22:16:07 +00:00
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*--------------------------------------
|
2018-07-23 15:28:42 +00:00
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.INB INC/MACROS.I
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|
.INB INC/A2OSX.I
|
2018-10-02 15:52:30 +00:00
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.INB INC/MLI.E.I
|
2018-07-23 15:28:42 +00:00
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.INB INC/NIC.I
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.INB INC/NIC.91C96.I
|
2018-08-27 05:39:42 +00:00
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.INB INC/ETH.I
|
2016-01-10 22:16:07 +00:00
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*--------------------------------------
|
2019-09-07 06:41:17 +00:00
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ZPArgPtr .EQ ZPBIN
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DEVSLOT0x .EQ ZPBIN+2
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* File Header (16 Bytes)
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*--------------------------------------
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CS.START cld
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jmp Dev.Detect cld,jmp abs=DRV
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.DA #$61 6502,Level 1 (65c02)
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.DA #1 DRV Layout Version 1
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.DA 0
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.DA CS.END-CS.START Code Length
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2018-08-27 05:39:42 +00:00
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.DA 0
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.DA 0
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.DA 0
|
2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* Relocation Table
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*--------------------------------------
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L.MSG.DETECT .DA MSG.DETECT
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L.MSG.DETECT.OK .DA MSG.DETECT.OK
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L.MSG.DETECT.KO .DA MSG.DETECT.KO
|
2018-08-27 05:39:42 +00:00
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L.DRV.CS.START .DA DRV.CS.START
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L.FD.DEV .DA FD.DEV
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L.FD.DEV.NAME .DA FD.DEV.NAME
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L.SSCANF.MAC .DA SSCANF.MAC
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L.MAC0 .DA DCB+S.DCB.NIC.MAC
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L.MAC1 .DA DCB+S.DCB.NIC.MAC+1
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L.MAC2 .DA DCB+S.DCB.NIC.MAC+2
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L.MAC3 .DA DCB+S.DCB.NIC.MAC+3
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L.MAC4 .DA DCB+S.DCB.NIC.MAC+4
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L.MAC5 .DA DCB+S.DCB.NIC.MAC+5
|
2016-01-10 22:16:07 +00:00
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.DA 0 End Of Reloc Table
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*--------------------------------------
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2018-08-27 05:39:42 +00:00
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Dev.Detect >STYA ARGS
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2016-01-10 22:16:07 +00:00
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>LDYA L.MSG.DETECT
|
2018-08-27 05:39:42 +00:00
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>SYSCALL puts
|
2017-04-17 19:36:00 +00:00
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ldx #$70
|
2017-04-27 20:08:12 +00:00
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ldy #7
|
2017-10-19 15:27:38 +00:00
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.1 lda A2osX.S,y IO based detection, avoid scanning in Disk Controller IO!!!!
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2017-04-17 19:36:00 +00:00
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bne .2
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lda L91C96.BSR+1,x
|
2016-01-10 22:16:07 +00:00
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cmp #DEVID
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2016-03-30 15:54:47 +00:00
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beq .3
|
2018-08-27 05:39:42 +00:00
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.2 dec FD.DEV.NAME+3
|
2016-01-10 22:16:07 +00:00
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txa
|
2017-04-17 19:36:00 +00:00
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sec
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sbc #$10
|
2016-01-10 22:16:07 +00:00
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tax
|
2017-04-27 20:08:12 +00:00
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dey
|
2017-04-17 19:36:00 +00:00
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bne .1
|
2016-01-10 22:16:07 +00:00
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>LDYA L.MSG.DETECT.KO
|
2018-08-27 05:39:42 +00:00
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>SYSCALL puts
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2016-01-10 22:16:07 +00:00
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2017-10-26 16:01:54 +00:00
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lda #MLI.E.NODEV
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2016-01-10 22:16:07 +00:00
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sec
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rts
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.3 stx DEVSLOTx0
|
2019-09-07 06:41:17 +00:00
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sty DEVSLOT0x
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2017-04-17 19:36:00 +00:00
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2018-08-27 05:39:42 +00:00
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jsr Dev.ParseArgs
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bcs .9
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.8 >PUSHW L.FD.DEV.NAME
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>PUSHBI 2
|
2016-10-17 15:47:50 +00:00
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>LDYA L.MSG.DETECT.OK
|
2018-06-21 15:12:10 +00:00
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>SYSCALL printf
|
2018-08-27 05:39:42 +00:00
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>PUSHWI DRV.END
|
2019-07-22 06:31:01 +00:00
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>PUSHWI DRV.CS.END-DRV.CS.START
|
2018-08-27 05:39:42 +00:00
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>PUSHWI DRV.CS.START
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>LDYA L.DRV.CS.START
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>SYSCALL InsDrv
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bcs .9
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>STYA FD.DEV+S.FD.DEV.DRVPTR
|
2018-12-11 16:41:25 +00:00
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>PUSHW L.FD.DEV.NAME
|
2018-08-27 05:39:42 +00:00
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>LDYA L.FD.DEV
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|
>SYSCALL MKDEV
|
2019-09-07 06:41:17 +00:00
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|
bcs .9
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|
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ldx DEVSLOT0x
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lda #A2osX.S.NIC
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sta A2osX.S,x
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* clc
|
2018-08-27 05:39:42 +00:00
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|
.9 rts
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|
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|
*--------------------------------------
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|
Dev.ParseArgs >LDYA ARGS
|
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|
>STYA ZPArgPTR
|
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|
lda (ZPArgPTR)
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|
bne .1
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|
lda A2osX.RANDOM16
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|
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|
|
eor A2osX.TIMER16
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sta DCB+S.DCB.NIC.MAC+3
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|
eor A2osX.RANDOM16+1
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sta DCB+S.DCB.NIC.MAC+4
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|
eor A2osX.TIMER16+1
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sta DCB+S.DCB.NIC.MAC+5
|
2016-01-10 22:16:07 +00:00
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|
|
clc
|
|
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|
rts
|
2018-08-27 05:39:42 +00:00
|
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|
.1 >PUSHW L.MAC5
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>PUSHW L.MAC4
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>PUSHW L.MAC3
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>PUSHW L.MAC2
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>PUSHW L.MAC1
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>PUSHW L.MAC0
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>PUSHBI 12 6 x byte PTRs
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|
>PUSHW L.SSCANF.MAC
|
|
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|
|
>LDYA ZPArgPtr
|
|
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|
>SYSCALL sscanf
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|
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|
bcc .8
|
2018-10-21 20:54:07 +00:00
|
|
|
|
lda #E.SYN
|
2018-08-27 05:39:42 +00:00
|
|
|
|
sec
|
|
|
|
|
.8 rts
|
2016-01-10 22:16:07 +00:00
|
|
|
|
*--------------------------------------
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|
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|
|
CS.END
|
2018-08-27 05:39:42 +00:00
|
|
|
|
ARGS .BS 2
|
|
|
|
|
MSG.DETECT .AZ "LanCeGS/SMSC91C96 Driver."
|
2018-04-11 15:35:51 +00:00
|
|
|
|
MSG.DETECT.OK .AZ "LanCeGS/SMSC91C96 Installed As Device : %S\r\n"
|
2018-08-27 05:39:42 +00:00
|
|
|
|
MSG.DETECT.KO .AZ "Hardware Not Found."
|
|
|
|
|
SSCANF.MAC .AZ "%h:%h:%h:%h:%h:%h"
|
2016-01-10 22:16:07 +00:00
|
|
|
|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
|
|
|
|
FD.DEV .DA #S.FD.T.CDEV
|
|
|
|
|
.DA #0 HANDLER
|
|
|
|
|
.DA #0 BUSID
|
|
|
|
|
.DA #0 DEVID
|
|
|
|
|
.DA 0 BUSPTR
|
|
|
|
|
.BS 2 DRVPTR
|
2018-12-13 16:39:24 +00:00
|
|
|
|
.DA 0 DCBPTR
|
2018-12-11 16:41:25 +00:00
|
|
|
|
.DA 0 BUFPTR
|
|
|
|
|
FD.DEV.NAME .AZ "ETH7"
|
2016-01-10 22:16:07 +00:00
|
|
|
|
*--------------------------------------
|
|
|
|
|
* Driver Code
|
|
|
|
|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
|
|
|
|
ZPIOCTL .EQ ZPDRV
|
|
|
|
|
ZPBufPtr .EQ ZPDRV+2
|
|
|
|
|
Size .EQ ZPDRV+4
|
|
|
|
|
Counter .EQ ZPDRV+6
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DRV.CS.START cld
|
|
|
|
|
jmp (.1,x)
|
|
|
|
|
.1 .DA STATUS
|
2017-07-06 15:30:40 +00:00
|
|
|
|
.DA A2osX.BADCALL
|
|
|
|
|
.DA A2osX.BADCALL
|
|
|
|
|
.DA A2osX.BADCALL
|
|
|
|
|
.DA A2osX.BADCALL
|
|
|
|
|
.DA A2osX.BADCALL
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.DA OPEN
|
|
|
|
|
.DA CLOSE
|
|
|
|
|
.DA READ
|
|
|
|
|
.DA WRITE
|
|
|
|
|
.DA A2osX.BADCALL IRQ
|
2016-01-10 22:16:07 +00:00
|
|
|
|
.DA 0 end or relocation
|
|
|
|
|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
|
|
|
|
STATUS >STYA ZPIOCTL
|
|
|
|
|
|
|
|
|
|
ldy #S.IOCTL.STATCODE
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
beq .1
|
|
|
|
|
cmp #S.IOCTL.STATCODE.GETDIB
|
|
|
|
|
bne STATUS.DCB
|
|
|
|
|
ldx #S.DIB-1
|
|
|
|
|
.HS 2C bit abs
|
|
|
|
|
.1 ldx #3
|
|
|
|
|
|
|
|
|
|
ldy #S.IOCTL.BUFPTR
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
sta .3+1
|
|
|
|
|
iny
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
sta .3+2
|
|
|
|
|
.2 lda DIB,x
|
|
|
|
|
.3 sta $ffff,x SELF MODIFIED
|
|
|
|
|
dex
|
|
|
|
|
bpl .2
|
|
|
|
|
clc
|
|
|
|
|
rts
|
|
|
|
|
STATUS.DCB cmp #S.IOCTL.STATCODE.GETDCB
|
|
|
|
|
bne STATUS.9
|
|
|
|
|
|
|
|
|
|
stz DCB+S.DCB.NIC.LINK
|
2016-03-13 22:07:01 +00:00
|
|
|
|
|
2017-04-17 19:36:00 +00:00
|
|
|
|
ldx DEVSLOTx0
|
2016-03-13 22:07:01 +00:00
|
|
|
|
|
2017-04-17 19:36:00 +00:00
|
|
|
|
stz L91C96.BSR,x
|
|
|
|
|
lda L91C96.0.EPHSR,x
|
|
|
|
|
lda L91C96.0.EPHSR+1,x
|
|
|
|
|
and /L91C96.0.EPHSR.LINK
|
|
|
|
|
beq .1
|
2018-08-27 05:39:42 +00:00
|
|
|
|
lda #S.DCB.NIC.LINK.OK
|
|
|
|
|
tsb DCB+S.DCB.NIC.LINK
|
2016-03-13 22:07:01 +00:00
|
|
|
|
|
2018-08-27 05:39:42 +00:00
|
|
|
|
lda L91C96.0.TCR,x
|
2017-04-17 19:36:00 +00:00
|
|
|
|
lda L91C96.0.TCR+1,x
|
|
|
|
|
and /L91C96.0.TCR.FDSE
|
2018-08-27 05:39:42 +00:00
|
|
|
|
beq .1
|
|
|
|
|
|
|
|
|
|
lda #S.DCB.NIC.LINK.FD
|
|
|
|
|
tsb DCB+S.DCB.NIC.LINK
|
|
|
|
|
.1 ldy #S.IOCTL.BUFPTR
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
sta .4+1
|
|
|
|
|
iny
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
sta .4+2
|
|
|
|
|
ldx #S.DCB.NIC-1
|
|
|
|
|
.3 lda DCB,x
|
|
|
|
|
.4 sta $ffff,x SELF MODIFIED
|
|
|
|
|
dex
|
|
|
|
|
bpl .3
|
|
|
|
|
|
|
|
|
|
clc
|
|
|
|
|
rts
|
|
|
|
|
STATUS.9 lda #MLI.E.BADCTL
|
|
|
|
|
sec
|
2019-10-03 06:25:27 +00:00
|
|
|
|
rts
|
2018-08-27 05:39:42 +00:00
|
|
|
|
*--------------------------------------
|
2019-05-02 09:52:32 +00:00
|
|
|
|
OPEN lda #S.DIB.S.OPENED
|
|
|
|
|
bit DIB+S.DIB.S
|
|
|
|
|
bne .9
|
|
|
|
|
jsr CLOSE
|
2018-08-27 05:39:42 +00:00
|
|
|
|
|
|
|
|
|
* ldx DEVSLOTx0 Done by CLOSE
|
|
|
|
|
|
|
|
|
|
lda #L91C96.0.TCR.FDSE+L91C96.0.TCR.FUDPLX+L91C96.0.TCR.PADEN+L91C96.0.TCR.TXENA
|
|
|
|
|
sta L91C96.0.TCR,x
|
|
|
|
|
lda /L91C96.0.TCR.FDSE+L91C96.0.TCR.FUDPLX+L91C96.0.TCR.PADEN+L91C96.0.TCR.TXENA
|
|
|
|
|
sta L91C96.0.TCR+1,x
|
|
|
|
|
lda #L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
|
|
|
|
|
sta L91C96.0.RCR,x
|
|
|
|
|
lda /L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
|
|
|
|
|
sta L91C96.0.RCR+1,x
|
|
|
|
|
lda #1
|
|
|
|
|
sta L91C96.BSR,x
|
|
|
|
|
lda #L91C96.1.CR.NOWAIT
|
|
|
|
|
sta L91C96.1.CR,x
|
|
|
|
|
lda /L91C96.1.CR.NOWAIT
|
|
|
|
|
sta L91C96.1.CR+1,x
|
|
|
|
|
|
|
|
|
|
ldy #0
|
|
|
|
|
bit USERMAC
|
|
|
|
|
bmi .2
|
|
|
|
|
|
|
|
|
|
.1 lda L91C96.1.IAR,x
|
|
|
|
|
sta S.DCB.NIC.MAC,y
|
|
|
|
|
inx
|
|
|
|
|
iny
|
|
|
|
|
cpy #6
|
|
|
|
|
bne .1
|
|
|
|
|
bra .3
|
|
|
|
|
|
|
|
|
|
.2 lda S.DCB.NIC.MAC,y
|
|
|
|
|
sta L91C96.1.IAR,x
|
|
|
|
|
inx
|
|
|
|
|
iny
|
|
|
|
|
cpy #6
|
2016-03-13 22:07:01 +00:00
|
|
|
|
bne .2
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.3 ldx DEVSLOTx0
|
|
|
|
|
lda #L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
|
|
|
|
|
sta L91C96.1.CTR,x
|
|
|
|
|
lda /L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
|
|
|
|
|
sta L91C96.1.CTR+1,x
|
|
|
|
|
clc
|
|
|
|
|
rts
|
2019-05-02 09:52:32 +00:00
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|
.9 lda #MLI.E.OPEN
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sec
|
2019-10-03 06:25:27 +00:00
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rts
|
2018-08-27 05:39:42 +00:00
|
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|
*--------------------------------------
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|
CLOSE ldx DEVSLOTx0
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stz L91C96.BSR,x
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lda #L91C96.0.RCR.RESET
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.RESET
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sta L91C96.0.RCR+1,x
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lda $C019 we can use VBL as we are not on //c
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.1 eor $C019
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bpl .1
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lda $C019
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.2 eor $C019
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bpl .2
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stz L91C96.0.RCR,x
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stz L91C96.0.RCR+1,x
|
2016-01-10 22:16:07 +00:00
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clc
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|
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|
rts
|
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|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
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|
READ php
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sei
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>STYA ZPIOCTL
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ldx DEVSLOTx0
|
2016-03-13 22:07:01 +00:00
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lda #2
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sta L91C96.BSR,x
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lda L91C96.2.IST,x
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and #L91C96.2.IST.RCV
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2018-08-27 05:39:42 +00:00
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bne .1
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2019-05-12 20:45:11 +00:00
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lda #E.NODATA
|
2018-08-27 05:39:42 +00:00
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.9 plp
|
2016-03-13 22:07:01 +00:00
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sec
|
2016-01-10 22:16:07 +00:00
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rts
|
2018-08-27 05:39:42 +00:00
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.1 lda #L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
|
2016-03-13 22:07:01 +00:00
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sta L91C96.2.PTR,x
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lda /L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
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sta L91C96.2.PTR+1,x
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2016-03-30 15:54:47 +00:00
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lda L91C96.2.DATA,x Get Frame Status Word (lo)
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lda L91C96.2.DATA,x Get Frame Status Word (HI)
|
2017-04-17 19:36:00 +00:00
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asl
|
2016-03-30 15:54:47 +00:00
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asl
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asl #$10 = odd?
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asl if odd, CS
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lda L91C96.2.DATA,x get lo byte count
|
2017-04-27 20:08:12 +00:00
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|
sbc #5 compute Size
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sta Size
|
2018-08-27 05:39:42 +00:00
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pha
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ldy #S.IOCTL.BYTECNT
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sta (ZPIOCTL),y
|
2017-04-27 20:08:12 +00:00
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eor #$ff
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sta Counter
|
2016-03-30 15:54:47 +00:00
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lda L91C96.2.DATA,x get hi byte count
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sbc #0
|
2017-04-27 20:08:12 +00:00
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sta Size+1
|
2018-08-27 05:39:42 +00:00
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iny
|
|
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sta (ZPIOCTL),y
|
2017-04-27 20:08:12 +00:00
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|
eor #$ff
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sta Counter+1
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eor #$ff
|
2018-08-27 05:39:42 +00:00
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ply
|
2019-05-12 20:45:11 +00:00
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>SYSCALL2 getmem
|
2018-08-27 05:39:42 +00:00
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|
bcs .9
|
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|
>STYA ZPBufPtr
|
2019-05-12 20:45:11 +00:00
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phx
|
2018-08-27 05:39:42 +00:00
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phy
|
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ldy #S.IOCTL.BUFPTR+1
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sta (ZPIOCTL),y
|
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dey
|
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pla
|
|
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|
sta (ZPIOCTL),y
|
2016-03-13 22:07:01 +00:00
|
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|
ldx DEVSLOTx0
|
2018-08-27 05:39:42 +00:00
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ldy #0
|
2017-04-27 20:08:12 +00:00
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|
.2 inc Counter
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|
bne .21
|
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|
|
inc Counter+1
|
2017-04-17 19:36:00 +00:00
|
|
|
|
beq .4
|
2017-04-27 20:08:12 +00:00
|
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|
|
.21 lda L91C96.2.DATA,x
|
2018-08-27 05:39:42 +00:00
|
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|
sta (ZPBufPtr),y
|
2016-03-13 22:07:01 +00:00
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|
iny
|
|
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|
bne .3
|
2018-08-27 05:39:42 +00:00
|
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|
inc ZPBufPtr+1
|
2017-04-27 20:08:12 +00:00
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|
.3 inc Counter
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|
bne .31
|
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|
inc Counter+1
|
2017-04-17 19:36:00 +00:00
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|
|
beq .4
|
2017-04-27 20:08:12 +00:00
|
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|
|
.31 lda L91C96.2.DATA,x
|
2018-08-27 05:39:42 +00:00
|
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|
sta (ZPBufPtr),y
|
2016-03-13 22:07:01 +00:00
|
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|
|
iny
|
|
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|
bne .2
|
2018-08-27 05:39:42 +00:00
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|
inc ZPBufPtr+1
|
2016-03-13 22:07:01 +00:00
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|
bra .2
|
|
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|
2017-04-17 19:36:00 +00:00
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|
.4 lda #L91C96.2.MMUCR.REMREL
|
2016-03-13 22:07:01 +00:00
|
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|
sta L91C96.2.MMUCR,x
|
2019-05-12 20:45:11 +00:00
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|
.8 pla hMem
|
2018-08-27 05:39:42 +00:00
|
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plp
|
2016-01-10 22:16:07 +00:00
|
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|
clc
|
2018-08-27 05:39:42 +00:00
|
|
|
|
rts
|
2019-10-03 06:25:27 +00:00
|
|
|
|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
|
|
|
|
WRITE php
|
|
|
|
|
sei
|
|
|
|
|
>STYA ZPIOCTL
|
|
|
|
|
|
2016-03-13 22:07:01 +00:00
|
|
|
|
ldx DEVSLOTx0
|
|
|
|
|
lda #2
|
|
|
|
|
sta L91C96.BSR,x
|
|
|
|
|
|
2018-08-27 05:39:42 +00:00
|
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|
|
ldy #S.IOCTL.BYTECNT
|
|
|
|
|
lda (ZPIOCTL),y
|
2017-04-27 20:08:12 +00:00
|
|
|
|
sta Size
|
|
|
|
|
eor #$ff
|
|
|
|
|
sta Counter
|
|
|
|
|
eor #$ff
|
2016-01-10 22:16:07 +00:00
|
|
|
|
clc
|
2016-03-13 22:07:01 +00:00
|
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|
|
adc #6 3 WORDs more Status, len & Control
|
2016-03-31 20:07:47 +00:00
|
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|
|
|
|
|
|
bne .10
|
|
|
|
|
clc LO byte is 0, no need for an extra empty page
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.10 iny
|
|
|
|
|
lda (ZPIOCTL),y
|
2017-04-27 20:08:12 +00:00
|
|
|
|
sta Size+1
|
|
|
|
|
eor #$ff
|
|
|
|
|
sta Counter+1
|
|
|
|
|
eor #$ff
|
2016-03-13 22:07:01 +00:00
|
|
|
|
adc #0
|
|
|
|
|
.1 ora #L91C96.2.MMUCR.ALLOC
|
|
|
|
|
sta L91C96.2.MMUCR,x
|
|
|
|
|
|
|
|
|
|
ldy #0
|
|
|
|
|
.2 lda L91C96.2.IST,x
|
|
|
|
|
and #L91C96.2.IST.ALLOC
|
|
|
|
|
bne .3
|
|
|
|
|
dey
|
|
|
|
|
bne .2
|
2019-05-12 20:45:11 +00:00
|
|
|
|
lda #E.NODATA
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.9 plp
|
2016-03-13 22:07:01 +00:00
|
|
|
|
sec
|
2019-10-03 06:25:27 +00:00
|
|
|
|
rts
|
|
|
|
|
|
2016-03-13 22:07:01 +00:00
|
|
|
|
.3 lda L91C96.2.AAR,x
|
|
|
|
|
sta L91C96.2.PNR,x
|
2016-03-30 06:30:41 +00:00
|
|
|
|
lda #L91C96.2.PTR.AUTOI
|
2016-03-13 22:07:01 +00:00
|
|
|
|
sta L91C96.2.PTR,x
|
2016-03-30 06:30:41 +00:00
|
|
|
|
lda /L91C96.2.PTR.AUTOI
|
2016-03-13 22:07:01 +00:00
|
|
|
|
sta L91C96.2.PTR+1,x
|
2018-08-27 05:39:42 +00:00
|
|
|
|
ldy #S.IOCTL.BUFPTR
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
sta ZPBufPtr
|
|
|
|
|
iny
|
|
|
|
|
lda (ZPIOCTL),y
|
|
|
|
|
sta ZPBufPtr+1
|
2016-03-30 06:30:41 +00:00
|
|
|
|
ldy #S.ETH.SRCMAC+5 Add Src MAC Address
|
2016-03-13 22:07:01 +00:00
|
|
|
|
ldx #5
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.4 lda S.DCB.NIC.MAC,x
|
|
|
|
|
sta (ZPBufPtr),y
|
2016-03-13 22:07:01 +00:00
|
|
|
|
dey
|
|
|
|
|
dex
|
|
|
|
|
bpl .4
|
|
|
|
|
|
|
|
|
|
ldx DEVSLOTx0
|
2016-03-30 15:54:47 +00:00
|
|
|
|
stz L91C96.2.DATA,x write fake status word
|
2016-03-30 06:30:41 +00:00
|
|
|
|
stz L91C96.2.DATA,x
|
2017-04-27 20:08:12 +00:00
|
|
|
|
lda Size
|
2016-03-13 22:07:01 +00:00
|
|
|
|
pha
|
2016-03-30 15:54:47 +00:00
|
|
|
|
eor #$01
|
2016-03-13 22:07:01 +00:00
|
|
|
|
lsr
|
|
|
|
|
pla
|
2016-03-30 15:54:47 +00:00
|
|
|
|
adc #$05 add 5 if odd, 6 if even
|
2016-03-13 22:07:01 +00:00
|
|
|
|
sta L91C96.2.DATA,x
|
2017-04-27 20:08:12 +00:00
|
|
|
|
lda Size+1
|
2016-03-30 15:54:47 +00:00
|
|
|
|
adc #$00
|
2016-03-30 06:30:41 +00:00
|
|
|
|
sta L91C96.2.DATA,x
|
2016-03-13 22:07:01 +00:00
|
|
|
|
ldy #2
|
2017-04-27 20:08:12 +00:00
|
|
|
|
.5 inc Counter
|
|
|
|
|
bne .51
|
|
|
|
|
inc Counter+1
|
2016-03-13 22:07:01 +00:00
|
|
|
|
beq .70
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.51 lda (ZPBufPtr),y
|
2016-03-13 22:07:01 +00:00
|
|
|
|
iny
|
|
|
|
|
bne .6
|
2018-08-27 05:39:42 +00:00
|
|
|
|
inc ZPBufPtr+1
|
2017-04-27 20:08:12 +00:00
|
|
|
|
.6 inc Counter
|
|
|
|
|
bne .61
|
|
|
|
|
inc Counter+1
|
2016-03-13 22:07:01 +00:00
|
|
|
|
beq .71
|
2017-04-27 20:08:12 +00:00
|
|
|
|
.61 sta L91C96.2.DATA,x
|
2018-08-27 05:39:42 +00:00
|
|
|
|
lda (ZPBufPtr),y
|
2016-03-30 06:30:41 +00:00
|
|
|
|
sta L91C96.2.DATA,x
|
2016-03-13 22:07:01 +00:00
|
|
|
|
iny
|
|
|
|
|
bne .5
|
2018-08-27 05:39:42 +00:00
|
|
|
|
inc ZPBufPtr+1
|
2016-03-13 22:07:01 +00:00
|
|
|
|
bra .5
|
|
|
|
|
.70 lda #0
|
|
|
|
|
sta L91C96.2.DATA,x
|
2016-03-30 06:30:41 +00:00
|
|
|
|
sta L91C96.2.DATA,x
|
2016-03-13 22:07:01 +00:00
|
|
|
|
bra .8
|
2017-04-27 20:08:12 +00:00
|
|
|
|
.71 sta L91C96.2.DATA,x
|
2016-03-30 15:54:47 +00:00
|
|
|
|
lda #%00100000 signal an extra (odd) byte
|
2016-03-30 06:30:41 +00:00
|
|
|
|
sta L91C96.2.DATA,x
|
2016-03-13 22:07:01 +00:00
|
|
|
|
.8 lda #L91C96.2.MMUCR.NQPKT
|
2018-08-27 05:39:42 +00:00
|
|
|
|
sta L91C96.2.MMUCR,x
|
|
|
|
|
plp
|
2017-04-17 19:36:00 +00:00
|
|
|
|
clc
|
2016-01-10 22:16:07 +00:00
|
|
|
|
rts
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DRV.CS.END
|
|
|
|
|
DEVSLOTx0 .BS 1
|
2016-03-13 22:07:01 +00:00
|
|
|
|
USERMAC .BS 1
|
2017-04-17 19:36:00 +00:00
|
|
|
|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
|
|
|
|
DIB .DA #0
|
|
|
|
|
.DA #0,#0,#0 size
|
2017-04-17 19:36:00 +00:00
|
|
|
|
>PSTR "LanCEGS/L91C96"
|
|
|
|
|
.BS 1
|
2018-08-27 05:39:42 +00:00
|
|
|
|
.DA #S.DIB.T.NIC
|
2017-04-17 19:36:00 +00:00
|
|
|
|
.BS 1 Subtype
|
|
|
|
|
.BS 2 Version
|
2016-01-10 22:16:07 +00:00
|
|
|
|
*--------------------------------------
|
2018-08-27 05:39:42 +00:00
|
|
|
|
DCB .DA #S.DCB.T.NIC
|
|
|
|
|
.BS 1 FLAGS
|
|
|
|
|
.BS 1 LINK
|
|
|
|
|
.DA #S.DCB.NIC.SPEED.10
|
|
|
|
|
.HS 000E3A123456 MAC
|
|
|
|
|
.BS 12 IP/MASK/GW
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DRV.END
|
2016-01-10 22:16:07 +00:00
|
|
|
|
MAN
|
2018-12-11 16:41:25 +00:00
|
|
|
|
SAVE USR/SRC/DRV/LANCEGS.DRV.S
|
2016-01-10 22:16:07 +00:00
|
|
|
|
ASM
|