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UTHERNET2 drivers optimisation/bugfix
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A2OSX.BOOT.po
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A2OSX.BOOT.po
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A2OSX.SRC.po
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A2OSX.SRC.po
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@ -46,6 +46,14 @@ W5100.AR.PMAGIC .EQ $0029
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W5100.AR.UIPR .EQ $002A
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W5100.AR.UIPR .EQ $002A
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W5100.AR.UPORT .EQ $002E
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W5100.AR.UPORT .EQ $002E
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W5100.AR.S0.MR .EQ $0400
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W5100.AR.S0.MR .EQ $0400
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W5100.AR.S0.MR.MULTI .EQ $80
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W5100.AR.S0.MR.MF .EQ $40
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W5100.AR.S0.MR.NDMC .EQ $20
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W5100.AR.S0.MR.TCP .EQ $01
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W5100.AR.S0.MR.UDP .EQ $02
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W5100.AR.S0.MR.IPRAW .EQ $03
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W5100.AR.S0.MR.MACRAW .EQ $04
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W5100.AR.S0.MR.PPPOE .EQ $05
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W5100.AR.S0.CR .EQ $0401
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W5100.AR.S0.CR .EQ $0401
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W5100.AR.S0.IR .EQ $0402
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W5100.AR.S0.IR .EQ $0402
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W5100.AR.S0.SR .EQ $0403
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W5100.AR.S0.SR .EQ $0403
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@ -204,7 +212,7 @@ OPEN jsr Reset
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sta W5100.DR,x ...for Socket0 TX Buffer
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sta W5100.DR,x ...for Socket0 TX Buffer
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>AR.SELECT S0.MR
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>AR.SELECT S0.MR
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lda #4 MACRAW
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lda #W5100.AR.S0.MR.MACRAW+W5100.AR.S0.MR.MF
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sta W5100.DR,x
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sta W5100.DR,x
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>AR.SELECT SHAR
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>AR.SELECT SHAR
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@ -283,7 +291,7 @@ GETEVENT.RxOK >AR.SELECT S0.RX.RD
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ldx DEVSLOTx8
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ldx DEVSLOTx8
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ldy #2
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iny
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.2 inc Counter
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.2 inc Counter
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bne .3
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bne .3
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@ -307,8 +315,7 @@ GETEVENT.RxOK >AR.SELECT S0.RX.RD
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adc RXTX.Size+1
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adc RXTX.Size+1
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and /RXTX.MASK
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and /RXTX.MASK
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ora /RX.BASE
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ora /RX.BASE
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pha save HI
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pha
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>AR.SELECT S0.RX.RD
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>AR.SELECT S0.RX.RD
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pla
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pla
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sta W5100.DR,x write HI
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sta W5100.DR,x write HI
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@ -318,7 +325,25 @@ GETEVENT.RxOK >AR.SELECT S0.RX.RD
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>AR.SELECT S0.CR
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>AR.SELECT S0.CR
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lda #$40 RECV
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lda #$40 RECV
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sta W5100.DR,x
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sta W5100.DR,x
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clc
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ldy #S.ETH.DSTMAC
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lda (ZPTmpPTR),y
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.81 iny
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and (ZPTmpPTR),y
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cpy #S.ETH.DSTMAC+5
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bne .81 if EQ, CS
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inc $ff = Broadcast ??
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beq .82
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clc not a broadcast
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.82 lda #$00
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ror
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ldy #S.EVT.DATAHI
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sta (pEvent),y
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* clc cleared by ROR
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rts
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rts
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*--------------------------------------
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*--------------------------------------
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CLOSE jsr Reset
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CLOSE jsr Reset
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