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Kernel 0.94
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@ -1008,6 +1008,7 @@ XDOS.SPVectLo .HS 00000000000000 storage for low byte of smartport entry.
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.HS 00
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.HS 00000000000000
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XRW.D2SeekTime .EQ *
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XDOS.SPVectHi .HS 00000000000000 storage for high byte of smartport entry.
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.HS 00
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.HS 00000000000000
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@ -14,8 +14,14 @@ XRW.START cld $D8 to flag language card bank 1 (main)
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lsr
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lsr
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sta XRW.UnitIndex
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tax
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lda XRW.D2SeekTime-1,x
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bne .10
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lda #30
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sta XRW.D2SeekTime-1,x
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pla
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.10 pla
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and #$7F mask off high bit.
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sta A2L 0SSS0000 for IO indexing
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@ -65,15 +71,7 @@ L59BD lda bloknml
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lsr
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sta XRW.ReqSector
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*--------------------------------------
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ldx A2L
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lda IO.D2.Ph0Off,x
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lda IO.D2.Ph1Off,x
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lda IO.D2.Ph2Off,x
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lda IO.D2.Ph3Off,x
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lda IO.D2.ReadMode,x turn off write enable X = slot $S0
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nop
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nop
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jsr XRW.Reset
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jsr XRW.CheckMotorOn
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@ -101,10 +99,9 @@ L59BD lda bloknml
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plp NZ: indicate drive off by setting z-flag.
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ldy #7
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lda #0 150 ms delay before stepping.
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ldy #6
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.4 jsr XRW.Wait100usecA
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.4 jsr XRW.Wait25600usec 150 ms delay before stepping.
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dey
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bne .4
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@ -155,11 +152,7 @@ L538E lda A4L get command #
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jsr regrwts get 2nd half of block
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dec buf+1
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bcs XRW.E.IO
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XRW.E.OK bit IO.D2.DrvOff,x turn off
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lda #0
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rts
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bcc XRW.E.OK
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XRW.E.IO lda #MLI.E.IO
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.HS 2C BIT ABS
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@ -167,8 +160,12 @@ XRW.E.WP lda #MLI.E.WRTPROT
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.HS 2C BIT ABS
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XRW.E.ND lda #MLI.E.NODEV
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bit IO.D2.DrvOff,x turn off
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sec
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.HS 2C BIT ABS
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XRW.E.OK lda #0
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bit IO.D2.DrvOff,x turn off
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rts
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*--------------------------------------
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regrwts ldy #1
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@ -184,6 +181,9 @@ regrwts ldy #1
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.1 ldy #64
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sty XRW.RetryCnt
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lda #$fe
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sta XRW.BadSeek
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.2 jsr XRW.ReadAddr read next address field.
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bcc .4 if CC, A = current track
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@ -210,7 +210,16 @@ regrwts ldy #1
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.4 cmp XRW.ReqTrack
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beq .5
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lda XRW.ReqTrack
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inc XRW.BadSeek
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bmi .41
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ldx XRW.UnitIndex
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lda XRW.D2SeekTime-1,x
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bmi .41
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asl XRW.D2SeekTime-1,x
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.41 lda XRW.ReqTrack
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jsr XRW.Seek
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bra .1
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@ -538,7 +547,7 @@ wnibl7 pha (3) 7 cycles, then write.
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pla (4)
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wnibl sta IO.D2.WLoad,x (5) nibl write
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ora IO.D2.WShift,x (4) clobbers acc, not carry
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rts (6)
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XRW.Write.RTS rts (6)
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*--------------------------------------
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* delays a specified number of 100 usec intervals for motor timing.
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* on entry: acc holds number of 100 usec intervals to delay.
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@ -546,12 +555,15 @@ wnibl sta IO.D2.WLoad,x (5) nibl write
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* montimel, montimeh are incremented once per 100 usec interval
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* for motor on timing.
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*--------------------------------------
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XRW.WaitSeekTime
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* lda #IO.D2.SeekTime
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phy
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ldy XRW.UnitIndex
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lda XRW.D2SeekTime-1,y
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ply
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.HS 2C BIT ABS
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XRW.Wait25600usec
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lda #0
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.HS 2C BIT ABS
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XRW.WaitSeekTime
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lda #IO.D2.SeekTime
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XRW.Wait100usecA
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phx (3)
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@ -723,6 +735,15 @@ L57CD pla place last byte into user buffer
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sta (buf),y
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XRW.Read.RTS rts
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*--------------------------------------
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XRW.Reset ldx A2L
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lda IO.D2.Ph0Off,x
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lda IO.D2.Ph1Off,x
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lda IO.D2.Ph2Off,x
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lda IO.D2.Ph3Off,x
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lda IO.D2.ReadMode,x turn off write enable X = slot $S0
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rts
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*--------------------------------------
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* A = target track
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*--------------------------------------
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XRW.Seek ldx XRW.UnitIndex
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@ -827,7 +848,7 @@ XRW.ReadAddr ldy #$FC
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bne .2 counter LO
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inc XRW.CheckSum counter HI
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beq rderr
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beq .99
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.2 lda IO.D2.RData,x read nibl
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bpl .2
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@ -872,19 +893,19 @@ XRW.ReadAddr ldy #$FC
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bpl .6 loop on 4 data bytes.
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tay if final checksum non-zero,
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bne rderr then error.
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bne .99 then error.
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.9 lda IO.D2.RData,x
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bpl .9
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cmp #$DE
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bne rderr
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bne .99
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.10 lda IO.D2.RData,x
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bpl .10
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cmp #$AA
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bne rderr
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bne .99
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ldy XRW.UnitIndex Successful Read, update Drive table
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@ -897,7 +918,7 @@ XRW.ReadAddr ldy #$FC
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clc normal read ok
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rts
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rderr sec
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.99 sec
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rts
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*--------------------------------------
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.DO XRWDBG=1
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@ -989,7 +1010,8 @@ XRW.montimeh .HS 00
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XRW.ReqTrack .HS 00
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XRW.ReqSector .HS 00
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.HS 383C4044484C
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.HS FF
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* .HS FF
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XRW.BadSeek .HS 00
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.HS 5054585C606468
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XRW.00XX0000 .HS 00201030 used in fast prenib.
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XRW.EndDataMark .HS DEAAEB table using 'unused' nibbles ($C4,$C5,$C6,$C7)
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